Abstract: A novel projection system includes an illumination source for emitting an illumination beam, a reflective display device for modulating the illumination beam to form a reflected imaging beam, a projection lens group having an optical axis, and a field lens group. The field lens group is de-centered with respect to the optical axis of the projection lens group and is disposed to redirect the illumination beam to illuminate the display device at a non-zero angle of incidence, and to redirect the reflected imaging beam along an optical path parallel to the optical path of the projection lens group. In a particular embodiment the display device is disposed on the optical axis of the projection lens group. In a more particular embodiment, the redirected portion of the optical path of the reflected imaging beam is coincident with the optical axis of the projection lens group.

Abstract: An adjustment apparatus (10) for adjusting the field lens (14) with respect to an LCD imager (13). The field lens (14) may be mounted off center and/or may be only a segment of a complete lens. Guide fingers (20) on an assembly housing (18) fit within guide slots (26) of a field lens mount (16) to prevent relative rotation thereof. The field lens (14) is secured within the field lens mount (16). An internally threaded ring (22) mates with external threads (23) on the field lens mount (16) to move the field lens mount (16) in or out relative to the imager (13). A retainer (28) has preload flexures (30) which press against posts (32) on the field lens mount (16) for providing preload tension thereon. Adjustment teeth (24) on the outside of the threaded ring (22) provide a means for rotating the threaded ring (22).

Abstract: A micro LCD attachment apparatus (10) for affixing an LCD imager (20) to an LCD frame (18) at a fixed relationship optionally determined by a tape (34). A base (12) has an attachment plate (14) and a plurality of vacuum slots (18) for selectively holding the LCD frame (18). The attachment plate (14) has a shaped aperture (22) for accepting the LCD imager (20) and a plurality of UV light pipes (30) for curing an adhesive (32) which is applied to the LCD imager (20). A hold down arm (24) pivots about a pivot stud (26) to position a hold down pin (28) to hold the LCD imager (20) in place on the LCD frame (18) while the adhesive (32) is cured.

Abstract: A test method (80) for testing a reflective LCD array (10) and apparatus including a mirror read pass transistor (45). In the reflective LCD array (10) has a plurality of system cells (36), wherein data is written to a mirror (33). A measurement device (76) which, in one embodiment is a mirror read pass transistor (45) allows read back of voltage on the mirror (33), thereby providing a measurable criteria for determining if the mirror (33) a mirror electrical contact (43) and associated driving circuitry such as a master cell (40), a slave cell (41) and an analog mux (42) are properly connected and functioning.

Abstract: The mechanism of and a solution to the problem of vertical banding in projection systems is disclosed. An offset lens array includes a plurality of lens elements arranged in a plurality of rows that are offset with respect to one another. The offset lens array is incorporated in an illuminator for a projection system. The asymmetrical arrangement of the rows of lens elements in the array with respect to a seam in a color separation element of the projection system substantially reduces the vertical banding in the projected image.

Abstract: An off-axis projection system includes a polarizer, a reflective light modulator, an analyzer, and an aberration compensation element. The polarizer polarizes an illumination beam to form a polarized illumination beam. The reflective light modulator receives the polarized illumination beam along a first optical path, modulates the polarized illumination beam to form an imaging beam, and reflects the imaging beam along a second optical path not parallel to the first optical path. The aberration compensation element is disposed in either or both of the polarized illumination beam and the imaging beam. The separation of the illumination beam and the imaging beam provided by the off-axis architecture facilitates the use single-pass aberration compensation elements, including liquid crystal compensation films and wave retarders. A multi-color projection system is also disclosed.

Abstract: A flat panel display includes a plurality of pixel cells arranged in a rectangular matrix of columns and rows. Each pixel cell includes a pixel electrode, a primary storage element, and a switch for selectively coupling the pixel electrode with the primary storage element and a storage element of another pixel cell in an adjacent row or column. Columns and/or rows of redundant storage elements are provided, such that the switches of pixel cells in the last row or column of the display selectively couple the pixel electrode with a primary storage element and a redundant storage element.

Abstract: A combination CMP-etch method for forming a thin planar layer over the surface of a device includes the steps of providing a substrate including a plurality of surface projections defining gaps therebetween, forming an etchable layer on the substrate, performing a CMP process on the etchable layer to form a planar layer having a first thickness in excess of 1,000 Angstroms, and etching the planar layer to a second thickness less than 1,000 Angstroms. In a particular method, the step of forming the etchable layer includes the steps of forming an etch resistant layer on the substrate, forming a fill layer on the etch-resistant layer, etching the fill layer to expose portions of the etch-resistant layer overlying the projections, and to leave a portion of the fill layer in the gaps, and forming the etchable layer on the exposed portions of the etch-resistant layer and the fill layer.

Abstract: A mechanical convergence fixture apparatus (10) having an LCD frame assembly (12) which is positioned in relation to a projector chassis (14) using an alignment assembly (12) which is positioned in relation to a projector chassis (14) using an alignment assembly (16). The LCD frame assembly (12) has a micro LCD (24) rigidly affixed thereto and a field lens (32) adjustably affixed thereto. A vacuum chuck (40) holds the LCD frame assembly (12) on the alignment assembly (16) while the LCD frame assembly (12) is positioned. A drop of adhesive (62) is then placed on each of a plurality of locating studs (18) and a like plurality of locating holes (20) to affix the LCD frame assembly (12) in position on the chassis (14). The alignment assembly (16) is then detached from the LCD frame assembly (12) to be reused.

Abstract: A multi channel video engine (10) for accepting, dividing, modifying and recombining light to project an image. A housing (12) encloses an optical assembly (28) having a dichroic mirror assembly (58) and a color cube (60). A plurality of LCD assemblies (30) accept light from the dichroic mirror assembly (58), modifies it, and reflects it to the color cube (60). A lens assembly (16) is affixed to a bulkhead (24) of the housing (12) using a lens cradle (14) and lens retainer (18). An output prism (54) aligns light onto a second plane (70) to coincide with an optical axis (72) of the lens assembly (16).

Abstract: A system and method for asserting compound data words on a display pixel according to a field sequential driving scheme is disclosed. In a particular embodiment, a display driver circuit includes an output controller for generating control signals to sequentially assert a first portion of a first compound data word on the display pixel, assert a first portion of a second compound data word on the display pixel, assert a second portion of the first compound data on the display pixel, and assert a second portion of the second compound data word on the display pixel. A particular display driver circuit includes a compound data generator which generates the compound data words from data words of a first type. The first portions of the compound data words are generated from the first type data words according to one predefined mapping scheme, and the second portions are generated according to another predefined mapping scheme.

Abstract: An LCD assembly (10) having an LCD device mounted on a substrate (12) with a flex cable and connector assembly (14) electrically and mechanically attached thereto. A mounting border (16) has a plurality of border screw holes (40) isolated from a main body (30) of the mounting border (16) by a plurality of stress relief slots (34) such that the main body (39) connects to the border screw holes (40) only through a plurality of land areas (44). An aperture mask 18 is interposed between a LCD subassembly (28) and a frame (20). The frame (20) has a lens receptor (42) for accepting a field lens (22) secured in a lens mount. Mounting screws (26) secure the mounting border (16) to the frame (20).

Abstract: A display driver circuit for reducing system interface band width requirements and peak current requirements includes a select line sequencer, for providing a series of select line addresses on an address terminal set, and a select line decoder coupled to the address terminal set, for decoding each of the select line addresses and asserting an update signal on a corresponding one of a plurality of output terminals. Optionally, the select line sequencer generates a series of select sub-line addresses, and the select line decoder is a select sub-line decoder. An optional select address register receives initial select addresses from a system and provides the initial select addresses to the select line sequencer. An alternate display driver circuit including a select line sequencer and a select sub-line sequencer is also described.

Abstract: An improved video display driver circuit (300) having an improved pixel array (302). The pixel array has a plurality of row enable lines (138) which extend from both sides thereof such that the row enable lines (138) are connected at one end to a row decoder (104) and at the other end to a redundant row decoder (304). Upon the occurrence of a circuit discontinuity (450), there will still be a complete circuit from either the row decoder (104) or the redundant row decoder (304) to each of a plurality of pixel cells (200) such that a video image produced by the improved pixel array (302) will not be impaired by the circuit discontinuity (450).

Abstract: A method for manufacturing a planar reflective light valve backplane includes the steps of providing a substrate (e.g., a reflective backplane) including a plurality of surface projections (e.g., pixel mirrors) defining gaps therebetween, forming an etch-resistant layer on the substrate, forming a fill layer on the etch resistant layer, and etching the fill layer to expose portions of the etch resistant layer overlying the projections, leaving a portion of the fill layer in the gaps. A particular method includes an optional step of forming a protective layer over the exposed portions of the etch-resistant layer and the fill layer. In another particular method, the etch resistant layer includes an optical thin film layer and an etch-resistant cap layer.

Abstract: A row decoder (10) for a video display system (12) wherein row output lines (28) of a row predecoder (20) are physically arranged such that adjacent iterations of the output lines (28) will generally not be switching simultaneously where addressing of the output lines (28) is sequential according to numbering and application. A ground trace (32) is provided between iterations of the output lines (28) which will be switching simultaneously. The output lines (28) provide input to a decoding circuit (34) within the row decoder (10). A plurality iterations of predecoder subcircuits (21) each having a compliment of the output lines (28) is to provided such that all of the rows of a pixel array (14) can be addressed.

Abstract: A planar wafer based device (e.g., a reflective light valve backplane) includes a substrate having a plurality of surface projections (e.g., pixel mirrors) defining gaps therebetween, an etch-resistant layer formed on the substrate, and a fill layer formed on a portion of the etch-resistant layer in the gaps. In a particular embodiment, the fill layer is a spin-on coating. An optional protective layer formed on the exposed portions of the etch-resistant layer and the fill layer protects the underlying layers during subsequent processing steps.

Abstract: A display driver circuit includes a word line sequencer for providing a series of row addresses, and a row decoder for decoding each of the row addresses and asserting write signals on corresponding ones of a plurality of output terminals. An optional data path sequencer provides a series of path addresses which are used by an optional data router to route data to particular sub-rows of a display. Additionally, an optional sub-row sequencer provides a series of sub-row addresses to an optional sub-row decoder, which decodes each of the sub-row addresses and asserts write signals on corresponding ones of a second plurality of output terminals. In various embodiments, the row sequencer, the sub-row sequencer, and/or the data path sequencer is/are responsive to data load instructions from a system, such that no Array Write commands are required to write data to a display.

Abstract: A system and method for reducing the phase difference between adjacent gray scale values employ compound data words. The compound data words include a first group of data bits and a second group of data bits. A display driver circuit is configured to provide display control signals causing each bit of the first group of data bits to be asserted on the display pixel for a coequal time period, and causing each bit of the second group of data bits to be asserted on the display pixel for a time period dependent on an associated significance of each bit. Optionally, the display driver circuit further includes a compound data generator configured to provide the compound data words. A method for asserting a compound data word on a display pixel includes the steps of asserting each bit of the first group of bits on the display pixel for a coequal time period, and asserting each bit of the second group of bits on the display pixel for a time period dependent on an associated significance of each bit.

Abstract: A system and method for planarizing n-bit display data into m-bit data. The system includes a plurality of input terminals, a plurality of output terminals, and a first storage bank having a bit-depth less than m. In one embodiment, the first storage bank is a bi-directional shift register including a clock input terminal, for receiving a data shift signal, and a direction terminal for receiving a direction control signal. In a particular embodiment, the bi-directional shift register includes a plurality of flip-flops and a plurality of multiplexers, both arranged in a rectangular array of columns and rows. Optionally, the system includes a second storage bank, and data is shifted into one storage bank while data is being shifted out of the other storage bank.