Patents Assigned to Avago Technologies International Sale Pte. Limited
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Patent number: 10205438Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.Type: GrantFiled: February 8, 2017Date of Patent: February 12, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Mohyee Mikhemar, Amir Hadji-Abdolhamid, Hooman Darabi
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Patent number: 10205975Abstract: Systems, methods and apparatuses for handling trick mode operation using multiple video streams are provided. A media server presents a first video stream having a first level of a video characteristic for display. The media server, in response to receiving a first command, presents a second video stream having a second level of the video characteristic for display while stopping presenting the first video stream for display based on a determination determined using the first level of the video characteristic and the second level of the video characteristic. The first video stream and the second video stream are directed to the same video content.Type: GrantFiled: February 22, 2016Date of Patent: February 12, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Jason W. Herrick, Daniel William English, Wade K. Wan
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Patent number: 10205660Abstract: The present disclosure describes a networking switch of a network and method for operating the networking switch. The networking switch communicates within the network using datagrams, such as packets and/or frames. The frames include packets of a first communication protocol or layer having headers of the first communication protocol or layer. In some situations, the packets of the first communication protocol or layer are embedded with packets of a second communication protocol or layer. Often times, one or more fields of headers of the first communication protocol or layer convey substantially similar or redundant information, such as routing information to provide an example, as one or more fields of headers of the second communication protocol or layer.Type: GrantFiled: June 3, 2016Date of Patent: February 12, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Ian Bruce Bernard Cox, Ariel Hendel
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Patent number: 10203966Abstract: An application launcher and management framework (ALM framework) is provided for enabling and managing the execution of external applications (e.g., third party applications) on a network device. The ALM framework enables external applications to be executed and managed on a network device based upon configuration information specified for the external applications. In certain embodiments, the ALM framework enables an external application to be executed within the network device's network operating system (NOS) as if the application was provided as part of the NOS. By enabling the external application to be integrated with the network device's NOS, the ALM framework enables several services provided by the NOS to be made available to the external application.Type: GrantFiled: October 28, 2016Date of Patent: February 12, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Geng Tian, James J. Chen
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Patent number: 10206084Abstract: A power-efficient, balanced, and reliable true wireless Bluetooth stereo audio solution is provided. Two audio sink devices are used to render audio content received from an audio source. One sink device is connected to the audio source via a primary link. The other sink device sniffs communication on the primary link. The two sink devices are connected via a hybrid link. In some embodiments, a token is passed dynamically between the two sink devices. The sink device that has the token acts as a primary sink device on a primary link with the source. The other sink device acts as a slave to the primary link.Type: GrantFiled: January 27, 2017Date of Patent: February 12, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Xianbo Chen, Chikan Kwan, Shawn Ding
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Patent number: 10205539Abstract: The present disclosure is directed to apparatuses for preventing significant amounts of common mode noise from a PHY transceiver, such as an Ethernet PHY transceiver, from coupling to an unshielded twisted-pair cable. The apparatuses can provide common mode noise isolation, while limiting any common mode noise to differential mode noise (CM-DM) conversion. Common mode noise is generally ignored by a PHY transceiver that receives a differential data signal because of differential signaling. However, when common mode noise is converted to differential mode noise, then data errors can result. Thus, limiting any CM-DM conversion is important.Type: GrantFiled: December 20, 2016Date of Patent: February 12, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Ahmad Chini, Mehmet V. Tazebay
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Patent number: 10200706Abstract: Efficient decoding of video content that may involve intra block copy operations, such as copying pixel data from one region of a frame to another region of the same frame is described. For example, a method to decode the video content may involve identifying the video frame in which intra block copy operation is to be performed, prior to the intra block copy operation being initiated. A video decoder may prefetch the pixel data from the source region to a local buffer with low memory latency such that the source pixel data to be copied into the destination blocks in the video frame is readily available. Thus, costly, and time consuming memory access may be avoided, and in turn a video decoding pipeline may operate smoothly without any stalling.Type: GrantFiled: January 19, 2018Date of Patent: February 5, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventor: Timothy Moore Hellman
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Patent number: 10200187Abstract: In an optical communications system, the thermal pathway for dissipating heat generated by clock and data recovery (CDR) circuitry of an optical communications module is a separate from the thermal pathway that is used to dissipate heat generated by other components of the module. The CDR circuitry is external to the module and is provided with its own heat dissipation device. Keeping the CDR circuitry external to the module and providing it with its own heat dissipation device decouples the thermal pathway for dissipating heat generated by the CDR circuitry from the thermal pathways used for dissipating heat generated by other components of the module. This results in more effective heat dissipation and better component performance.Type: GrantFiled: March 23, 2016Date of Patent: February 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Hui Xu, Sanjeev Gupta, Bob Ritter
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Patent number: 10199082Abstract: A computer memory system, delay calibration circuit, and method of operating a delay calibration circuit are provided. The disclosed method includes providing a delay-line ring oscillator on silicon of a chip, providing at least one counter on the silicon of the chip, and measuring a chip-specific delay for performing an operation with the chip by synchronizing the at least one counter and operation of the delay-line ring oscillator with a timing trigger.Type: GrantFiled: January 18, 2016Date of Patent: February 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Steven Affleck, Jerome Beckmann
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Patent number: 10198063Abstract: A power regulation system for a read channel of a data storage assembly includes a first voltage regulator for supplying power to the front-end decoder and a second voltage regulator for supplying power to the back-end codec. The second voltage regulator may conserve power reduce supply voltage to the back-end codec when the codec operates at a lower sampling frequency. The second voltage regulator may additionally increase supply voltage to the back-end codec in conjunction with an increase in sampling frequency. The system may additionally include a third voltage regulator for supplying a memory structure of the read channel with only the minimum required operating voltage to prevent leakage power.Type: GrantFiled: November 6, 2014Date of Patent: February 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Shaohua Yang, Kapil Gaba
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Patent number: 10200080Abstract: The present disclosure is directed to an apparatus and method for cancelling self-interference caused by full-duplex communication. In a full-duplex communication device, the receiver will generally experience significant self-interference from the full-duplex communication device's own transmitter transmitting a strong outbound signal over the same channel that the receiver is to receive a weak inbound signal. The apparatus and method are configured to adjust a phase and gain of the outbound signal provided at the output of a power amplifier (PA) and inject the phase and gain adjusted outbound signal at the input of a low-noise amplifier (LNA) to cancel the interference from the outbound signal in the inbound signal.Type: GrantFiled: October 24, 2017Date of Patent: February 5, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Alex Mirzaei, Hooman Darabi
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Patent number: 10198316Abstract: Embodiments are related to systems and methods for data storage, and more particularly to systems and methods for storing and accessing data from a flash memory.Type: GrantFiled: October 28, 2015Date of Patent: February 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Razmik Karabed, Zhijun Zhao, Shaohua Yang
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Patent number: 10200001Abstract: At least one example embodiment provides a controller to sample a first signal. The first signal indicates an initial amplitude of an output signal of an oscillator circuit. The controller selects a step amount based on the first signal and a target amplitude of the output signal. The controller generates a control signal for the oscillator circuit based on the selected step amount. The control signal indicates a change in gain for the oscillator circuit according to the selected step amount.Type: GrantFiled: September 15, 2016Date of Patent: February 5, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Jacob K. Easter, Christopher D. Macchietto, Richard Niescier
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Patent number: 10193852Abstract: Canonical name (CNAME) handling is performed in a system configured for global server load balancing (GSLB), which orders IP addresses into a list based on a set of performance metrics. When the GSLB switch receives a reply from an authoritative DNS server, the GSLB switch scans the reply for CNAME records. If a CNAME record is detected and it points to a host name configured for GSLB, then a GSLB algorithm is applied to the reply. This involves identifying the host name (pointed to by the CNAME record) in the reply and applying the metrics to the list of returned IP addresses corresponding to that host name, to reorder the list to place the “best” IP address at the top. If the CNAME record in the reply points to a host name that is not configured for GSLB, then the GSLB sends the reply unaltered to the inquiring client.Type: GrantFiled: July 20, 2009Date of Patent: January 29, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventor: Sunanda Lakshmi Kommula
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Patent number: 10194241Abstract: Systems, devices, and methods are described for providing loudspeaker protection. An upstream loudspeaker model estimation component receives sensed electrical characteristics of a loudspeaker and generates an impedance model from which an excursion model, and associated parameters, of the loudspeaker as well as a gain change parameter may be generated. The impedance components are fitted to features of an estimated impedance, based on the voltage and current sense data, to generate the estimated impedance model that is converted to an excursion model of the loudspeaker. A downstream audio signal processing component, based on the excursion model, or parameters thereof, limits a predicted excursion of the loudspeaker utilizing excursion-constraining processing circuitry that includes a non-linear constraint filter. Processed audio signals associated with the limited excursion are subject to distortion suppression prior to releasing the output audio signals for playback on the loudspeaker.Type: GrantFiled: November 30, 2016Date of Patent: January 29, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventor: Jes Thyssen
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Patent number: 10191855Abstract: Systems and methods presented herein provide for simulated NVDRAM operations. In a host system, a host memory is sectioned into pages. An HBA in the host system comprises a DRAM and an SSD. The DRAM and the SSD are also sectioned into pages and mapped to pages of the host memory. A host processor is operable to generate Input/Output (I/O) requests. An HBA driver is operable to process the I/O requests. The HBA driver is also operable to detect when the pages of the DRAM are accessed, to determine a rate of page reclamation based on the detection, and to reclaim pages of data in the DRAM by moving pages of data from the DRAM into the pages of the SSD based on the determined rate of page reclamation.Type: GrantFiled: July 16, 2014Date of Patent: January 29, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Kishore Kaniyar Sampathkumar, Saugata Das Purkayastha
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Patent number: 10193714Abstract: To improve on power and bandwidth limitations associated with conventional feedforward equalizer (FFE) implementations, the present disclosure provides intersymbol interference (ISI) compensation circuits that do not use delay cells common to FFE structures. In one example, the compensation circuit of the present disclosure comprises a two stage amplifier. Each stage of the amplifier is implemented using a differential pair with degeneration. One of the amplifier stages has a transfer function with a zero in the left half of the s-domain, also called the s-plane, and the other amplifier has a transfer function with a zero in the right half of the s-domain. The amplifier stage with the zero in the left half of the s-domain can be used to provide post-cursor ISI compensation, and the amplifier stage with the zero in the right half of the s-domain can be used to provide pre-cursor ISI compensation.Type: GrantFiled: February 16, 2017Date of Patent: January 29, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventors: Hiroshi Kimura, Haoqiong Chen, Yehui Sun
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Patent number: 10190889Abstract: The invention relates to a counting sensor for counting the number of revolutions or of linear displacements of an object, wherein the counting sensor comprises: one single Wiegand module; at least one sensor element; a processing electronics connected to the sensor element; and a permanent magnet arrangement, which is movable relative to the Wiegand module; wherein the processing electronics is configured to obtain (i) direction informations indicating whether the permanent magnet arrangement moves in one direction or an opposite direction, and (ii) magnetic pole informations; and a data storage for storing a value, which indicates the number of the revolutions or of the linear displacements; wherein the processing electronics is configured: (i) to determine, on the basis of the direction information and the magnetic pole information, the number of the revolutions or of the linear displacements of the object and to store the corresponding value in the data storage, (ii) to perform, on the basis of a sequeType: GrantFiled: May 3, 2017Date of Patent: January 29, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Walter Mehnert, Thomas Theil
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Patent number: 10193509Abstract: An output network connected to an output of a nonlinear unmatched power amplifier that provides an amplified voltage signal at a fundamental frequency. The output network includes multiple acoustic resonators configured to match multiple harmonic frequencies of the amplified voltage signal to one of substantially zero impedance, appearing as a short, or substantially infinite impedance, appearing as an open, resulting in zero voltage or zero current, respectively, to avoid power distribution at the higher harmonic frequencies. Each higher harmonic frequency is higher than a first harmonic frequency of the multiple harmonic frequencies, which is a fundamental frequency.Type: GrantFiled: July 28, 2017Date of Patent: January 29, 2019Assignee: Avago Technologies International Sales Pte. LimitedInventor: Martin Fritz
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Patent number: 10187080Abstract: A keeper based switch driver can generate overlapping differential signals and increase a crossing point of the overlapping differential signals a first predetermined amount. Additionally, the keeper based switch driver can further increase the crossing point of the overlapping differential signals a second predetermined amount and limit signal swing to an absolute value of a drain-source voltage. A microprocessor can also be electrically connected to a DAC cell with keeper based switch driver through a performance detection circuit. The microprocessor can be configured to receive information from a performance detection circuit and control a current of a variable current source in a keeper bias circuit accordingly.Type: GrantFiled: April 26, 2018Date of Patent: January 22, 2019Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITEDInventors: Kumar Thasari, Ullas Singh, Arvindh Iyer, Namik Kocaman