Abstract: The present invention relates to an application specific integrated circuit (ASIC) comprising an integrated central processor unit (CPU) (10), an integrated network interface control (NIC) (11) and at least one integrated input/output (I/O) device (13-16), and a transceiver circuit for buffering and amplifying SCSI signals from such an ASIC, whereby the outputs can be enabled to function as totem-pole or open-drain outputs, for active negation and wired-OR, respectively. According to the invention at least one I/O device is an ATA (16) or SCSI (15) device, with ports for connection to an external transceiver. The invention also relates to such a transceiver circuit for buffering and amplifying SCSI signals on single direction lines from an ASIC, whereby the outputs to the SCSI bus can be enabled to function as totem-pole or open-drain outputs, for active negation and wired-OR, respectively.

Abstract: The present invention relates to a system for communication over a network. The System comprises a network application, a protocol stack and a Medium Access Control layer. Further, the system is functionally and physically divided into a network application device and a network interface device. The network application device comprises the network application and the network interface device comprises the protocol stack and the MAC layer. A physical interface for bidirectional communication is arranged between the two devices. Also, the invention relates to the network application device and the network interface device separately and to a method for transmitting and receiving information via the network.

Abstract: A memory channel means transferring data streams between different blocks and an internal memory means on a data chip, wherein said memory channel means comprises several memory channels. Each channel has source and destination data stream interfaces, wherein each interface is connectable to different blocks, and a flexible address generator generating source and destination addresses for the internal memory means, wherein the order of the data being transferred is changed.

Abstract: An integrated circuit comprises a CPU, ports for external communication, a memory means and a switching means for converting the circuit between a working mode and an initiating mode. The circuit is in itself, in the initiating mode, adapted to receive an initiating signal, comprising external instructions, and to bring the CPU to execute said instructions. According to a method for bringing the integrated circuit to execute instructions, the integrated circuit is in a first step brought into the initiating mode. Thereafter the circuit receives said external signal and uses the integrated CPU to execute said instructions.

Abstract: A method and a multiprotocol network CD-ROM server for providing computer network users possibility to share information on CD-ROM, regardless of other file servers and their locations. The CD-ROM server is a self contained piece of hardware. It provides users connected to different computer networks, using various network protocols, shared access to information of any CD-ROM disc inserted into a connected CD-ROM drive.

Abstract: In-code context data used for exception handling is incorporated into a special call instruction which is recognized by the processor. The information is skipped at the time of the function call and read at the time of the stack unwinding. This special call instruction may be implemented to run at no extra cycle costs compared to normal instructions, except for the external execution time dependencies from such machinery as a cache involved in the instruction fetching, since it would never be necessary during normal execution to actually access the information. The information is only accessed during exception handling.

Abstract: The smart card drive of the present invention includes a smart card device having a microprocessor and a smart card adapter serially connected to a local, dedicated modular computer circuit having a network interface circuit. The combination of these components creates a smart card drive that is able to initiate a network connection and communicate with any peer node in a local area network also equipped with a network interface circuit and network listening software.

Abstract: An on-chip i/o-processor for controlling and communication with peripheral devices, wherein an i/o processor core (12), comprising at least one pin controller (29) for reading and setting physical i/o-pins (6), starting timers and generating interrupts for the i/o processor core (12), at least one timer (26) for sampling i/o-pins (6), setting i/o-pins (6) and generating interrupts for the i/o-processor core (12) at well defined points of time, said i/o-processor core (12) providing instructions for controlling said at least one pin controller (29), said at least one timer (26) and i/o-pins (6), an on chip RAM (3) holding instructions for the i/o processor core (12), at least one register (4) for exchanging information between the i/o-processor (2) and a connected CPU (1) on the same chip and inversely, configurable logic (5), connected between said core (12) and said i/o-pins (6), for synchronization of incoming and/or outgoing signals.