Abstract: A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 ?m2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

Abstract: A stacked III-V multi-junction solar cell with a top and a bottom. A metallic top contact area is formed at the top and has a first layer of metal, a flat metallic bottom contact area formed on the bottom. An opening extends continuously from the top to the bottom and has an upper edge area formed at the top and a lower edge area formed at the bottom. The upper edge area is adjacent to the top contact area and the side wall and the two edge areas are covered with a dielectric layer. The dielectric layer has a top and a bottom. A first metallic top layer is formed on a surface of the first metal layer and on the top of the dielectric layer and a second metallic top layer is formed on a part of the first metal layer adjacent to the upper edge area.

Abstract: A method for producing a via in a III-V multijunction solar cell that comprises a substrate arranged on an underside. The substrate has an upper side and an epitaxial layer system with multiple III-V layers on the upper side, and the epitaxial layer system comprises at least one first III-V solar cell. An organic layer is arranged on the upper side of the first III-V solar cell, and an opening having a width X and a base surface formed in the epitaxial layer system is generated in a first method step with a laser. An opening having a width Y and having a base surface is generated in a second method step, width Y being smaller than width X, and an opening having a width Z is generated in a third method step, the opening not having a base surface, and width Z being smaller than width Y.

Abstract: A method for producing a trench-shaped structure in a III-V multi-junction solar cell with an upper side and an underside. The III-V multi-junction solar cell includes a substrate arranged on the underside, and the substrate has an epilayer system on a front side. The epilayer system has at least one first III-V solar cell formed on the upper side, an organic layer is arranged on the first solar cell, and in a first processing step a first trench with a width X is created via a laser. In a second processing step a second trench with a width Y and with a bottom surface formed in the substrate is created via the laser, wherein the width Y is smaller than the width X, so that a first step is formed with the execution of the second processing step.

Abstract: A semiconductor wafer with a diameter of at least 100 mm for forming semiconductor components, having a substrate with a top and a bottom. The substrate is formed of silicon at the top. Multiple spots having oxygen are formed integrally with the top of the substrate. The spots have oxygen cover at least 0.005% and at most 35% of the top of the substrate. A full-area semiconductor buffer layer sequence integrally covers the top of the substrate and the spots having oxygen. The semiconductor buffer layer sequence has at least one group III nitride layer.

Abstract: A protection of space solar cells in an arrangement in the form of a string that extends in an X direction. In each case two space solar cells directly neighboring in the X direction are electrically connected to one another in series via a metallic connector of a first type. The string has a first end and a second end opposite from the first end, and a protection arrangement is provided directly at one of the two ends along a y direction. The protection arrangement includes a first string protection diode arrangement, a metal strip, and a second string protection diode arrangement provided in the Y direction. The protection arrangement is electrically connected to one of the two ends of the string via two spaced-apart metal strips, and each string protection diode arrangement includes multiple unhoused string protection diodes.

Abstract: A III-N silicon semiconductor wafer having an upper layer region and a lower layer region, wherein the upper layer region has a nitride layer with a formed III-N layer, and the lower layer region includes a silicon layer. The semiconductor wafer has a total thickness of at least 1.2 mm and is disk-shaped, and the semiconductor wafer is divided along a total thickness into the upper layer region and the lower layer region. The upper layer region has a circumferential edge region, and the upper layer region has a first maximum diameter of at least 145 mm, and the upper layer region has a thickness greater than 30 ?m and less than 950 ?m. The lower layer region has a second maximum diameter, and a connection region is formed between the upper layer region and the lower layer region, wherein the connection region has a third diameter.

Abstract: A method for producing a semiconductor wafer comprising silicon and comprising a III-N layer, which has an upper layer region with a top side and a lower layer region with a bottom side. The semiconductor wafer having a total thickness of at least 1.2 mm, and the semiconductor wafer being divided along the total thickness into the upper and lower layer regions. The upper layer region having a peripheral marginal region, and the lower layer region having a second maximum diameter. A connecting region is formed between the upper layer region and the lower layer region. The connecting region having a third diameter, and the third diameter being smaller than the first maximum diameter, comprising producing a nitride layer comprising a III-N layer formed on the upper layer region, and generating a peripheral, edge-filleted or beveled marginal region at the upper layer region.

Abstract: A process for the production of a layer structure of a nitride semiconductor component on a silicon surface, comprising: provision of a substrate having a silicon surface; deposition of an aluminium-containing nitride nucleation layer on the silicon surface of the substrate; optional: deposition of an aluminium-containing nitride buffer layer on the nitride nucleation layer; deposition of a masking layer on the nitride nucleation layer or, if present, on the first nitride buffer layer; deposition of a gallium-containing first nitride semiconductor layer on the masking layer, wherein the masking layer is deposited in such a way that, in the deposition step of the first nitride semiconductor layer, initially separate crystallites grow that coalesce above a coalescence layer thickness and occupy an average surface area of at least 0.16 ?m2 in a layer plane of the coalesced nitride semiconductor layer that is perpendicular to the growth direction.

Abstract: A method for stripping a III-V semiconductor layer epitaxially grown on a semiconductor wafer, and the semiconductor wafer is designed as a substrate and has an upper side, a buffer layer and the semiconductor layer being formed on the upper side, and a carrier layer being formed above the semiconductor layer, and the sacrificial layer having a higher wet chemical etching rate compared to the semiconductor layer, the semiconductor layer being introduced into a receiving device in a process step, and position data of points arranged on the upper side being read out from a memory device in a process step, and a laser approaching the points based on the position data in a process step, and holes having a base being produced through the carrier layer and the layer formed beneath the carrier layer via the laser, the base of the hole being formed within the buffer layer.

Abstract: Protection of space solar cells in an arrangement in the form of a string extending in an X direction, and two directly adjacent space solar cells in the X direction in each case are electrically connected to each other in series with the aid of a metallic connector. The string has a first end and a second end opposite the first end, and a protection arrangement formed along a Y direction is formed on one of the two ends. The protection arrangement has a first string protection diode formed in the Y direction and a metal strip and a second string protection diode. The protection arrangement is electrically connected to one of the two ends of the string and each string protection diode is uncased and has exactly one metal contact on the upper side and exactly one metal contact on the underside.

Abstract: A stacked, monolithic, upright metamorphic, terrestrial concentrator solar cell having exactly five subcells and having a metamorphic buffer, wherein a first subcell has a first lattice constant G1 and consists essentially of germanium, a second subcell has a second lattice constant and GaInAs, a third subcell has the second lattice constant G2 and AlGaInAs, a fourth subcell has the second lattice constant G2 and InP, a fifth subcell has the second lattice constant G2 and InP, G1<G2 applies to the lattice constants, the metamorphic buffer is arranged between the first subcell and the second subcell and has the first lattice constant G1 on a bottom side facing the first subcell and the second lattice constant G2 on a top side facing the second subcell, and all of the semiconductor layers of the concentrator solar cell arranged above the first subcell are epitaxially produced on the preceding subcell.

Abstract: A diode arrangement, including a semiconductor diode with a p/n junction. A first electrical contact is formed on an upper side and a second electrical contact is formed on an underside. The semiconductor being designed in an uncased manner as a flat die and having a planar upper side and a planar underside, and the metal-plated upper side forming the first contact of the semiconductor diode, and the metal-plated underside forming the second contact. A first flat metallic conductor has a first contact surface and a second contact surface spaced a distance apart from the first contact surface by a connecting piece. A second flat metallic connector has a first contact surface and a second contact surface spaced a distance from the first contact surface by a connecting piece. The metal-plated upper side is connected in a materially bonded manner to the first contact surface of the first metallic connector.

Abstract: A stacked, monolithic, upright metamorphic, terrestrial concentrator solar cell having exactly five subcells and having a metamorphic buffer, wherein a first subcell has a first lattice constant G1 and consists essentially of germanium, a second subcell has a second lattice constant and GaInAs, a third subcell has the second lattice constant G2 and AlGaInAs, a fourth subcell has the second lattice constant G2 and InP, a fifth subcell has the second lattice constant G2 and InP, G1<G2 applies to the lattice constants, the metamorphic buffer is arranged between the first subcell and the second subcell and has the first lattice constant G1 on a bottom side facing the first subcell and the second lattice constant G2 on a top side facing the second subcell, and all of the semiconductor layers of the concentrator solar cell arranged above the first subcell are epitaxially produced on the preceding subcell.

Abstract: A vapor phase epitaxy method of growing a III-V layer with a doping profile that changes from a p-doping to an n-doping on a surface of a substrate or a preceding layer from the vapor phase from an epitaxial gas flow, at least one first precursor for an element of main group III, and at least one second precursor for an element of main group V. When a first growth height is reached, a first initial doping level is set by means of a ratio of a first mass flow of the first precursor to a second mass flow of the second precursor in the epitaxial gas flow, and subsequently, by stepwise or continuously changing the ratio of the first mass flow to the second mass flow and by stepwise or continuously increasing a mass flow of a third precursor for an n-type dopant in the epitaxial gas flow.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A method for structuring an insulating layer on a semiconductor wafer includes providing a semiconductor wafer with a top, a bottom and includes multiple solar cell stacks, wherein each solar cell stack is a Ge substrate, which forms the bottom of the semiconductor wafer, a Ge subcell and at least two III-V subcells, in the above order, and at least one passage opening, which extends from the top to the bottom of the semiconductor wafer and has a connected side wall, an insulating layer two-dimensionally deposited on the top of the semiconductor wafer, on the side wall of the passage opening and/or on the bottom of the semiconductor wafer, and the deposition of an etch-resistant filling material by means of a printing process on an area of the top which include the passage opening, and into the passage opening.

Abstract: A stacked multi-junction solar cell with a front side contacted through the rear side and having a solar cell stack having a Ge substrate layer, a Ge subcell, and at least two III-V subcells, with a through contact opening, a front terminal contact, a rear terminal contact, an antireflection layer formed on a part of the front side of the multi-junction solar cell, a dielectric insulating layer, and a contact layer. The dielectric insulating layer covers the antireflection layer, an edge region of a top of the front terminal contact, a lateral surface of the through contact opening, and a region of the rear side of the solar cell stack adjacent to the through contact opening. The contact layer from a region of the top of the front terminal contact that is not covered by the dielectric insulating layer through the through contact opening to the rear side.

Abstract: A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V < E G 2 applying to the layer (A) and E L - E F < E G 2 applying to the layer (B), with EF the energy position of the Fermi level, EV the energy position of the valence band, EL the energy position of a conduction band and EL?EV the energy difference of the semiconductor band gap EG, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.

Abstract: A vapor phase epitaxy method of growing a III-V layer with a doping that changes from a first conductivity type to a second conductivity type on a surface of a substrate or a preceding layer in a reaction chamber from the vapor phase from an epitaxial gas flow comprising a carrier gas, at least one first precursor for an element from main group III, and at least one second precursor for an element from main group V, wherein when a first growth height is reached, a first initial doping level of the first conductivity type is set by means of a ratio of a first mass flow of the first precursor to a second mass flow of the second precursor in the epitaxial gas flow, the first initial doping level is then reduced to a second initial doping level of the first or low second conductivity type.