Abstract: Embodiments of the present disclosure provide an image processing method, an apparatus, an electronic device, and a computer-readable storage medium, relating to the technical field of displays. The method comprises steps of: acquiring a first image and a second image that are adjacent in time-domain; determining dynamic pixels of the second image relative to the first image; determining overdrive gain values of the dynamic pixels; and performing overdrive processing on the second image according to the overdrive gain values. In the embodiments of the present disclosure, for the dynamic pixels, overdrive processing is performed on the image according to the overdrive gain value. Thus, the overdrive effect for the dynamic region of the image is optimized, the technical effect of the overdrive is ensured, and the motion blur problem of the image is effectively improved.

Abstract: The present disclosure provides a receiver circuit and a receiver circuit control method. In the present disclosure, the input data is detected by a detection circuit to obtain a data rate detection result, and the bandwidth of the receiver is automatically adjusted according to the data rate detection result.

Abstract: Embodiments of the disclosure provide a level shift circuit, a chip and a display device. By setting first and second voltage clamping modules, and by adjusting first clamping voltage by controlling bias voltage input to the first voltage clamping module and adjusting second clamping voltage by controlling bias voltage and second bias voltage input to the second voltage clamping module, respective operating and output voltages of the first and the second voltage clamping modules and the shift module are within small range. Therefore, even the level shift circuit is designed by using devices with breakdown voltage lower than the difference between the first and second power supply voltages, the devices in the level shift circuit may be avoid being breakdown. Accordingly, some process platforms that cannot produce high-breakdown voltage devices may produce chips including the level shift circuit in the embodiment, and the restrictions on the process platform are reduced.

Abstract: Embodiments of the present disclosure provide an image compression method, an apparatus, and a computer-readable storage medium, relating to the field of image compression. The method comprises: acquiring a plurality of macroblocks of an image; determining the sub-region(s) of each one of the plurality of macroblocks and a partition color of each macroblock; determining a data compression format corresponding to each macroblock according to pixels in the sub-region(s) of each macroblock and the partition color of each macroblock; and compressing each macroblock based on the data compression format corresponding to each macroblock, and determining the compressed data corresponding to each macroblock. In the embodiments of the present disclosure, while ensuring the image compression efficiency, the image compression format is simplified, the image compression accuracy is guaranteed, and the over drive distortion caused by image compression is reduced.

Abstract: The present application provides a level shift circuit, an integrated circuit, and an electronic device. The level shift circuit comprises: an input module, configured to output a first control signal according to a first power supply voltage signal, first and second input voltages, inverted voltages of the first and second input voltages that received; a control voltage generation module, configured to receive the first control signal, and generate a plurality of node voltages according to the first control signal and a second power supply voltage signal; and output control modules, configured to generate first to fourth output signals according to the node voltages and the first power supply voltage signal, or generate fifth to eighth output signals according to the second power supply voltage signal and the node voltages.

Abstract: Embodiments of the present disclosure relate to the technical field of displays, and disclose a screen correction method, an electronic device, and a computer-readable storage medium. The method comprises: acquiring a first display parameter of pixel points in at least two display regions of a target screen, wherein the first display parameter comprises first spectral tristimulus values; determining a target region in the display regions and determining a second display parameter of pixel points in a non-target region in the display regions according to the first display parameter, wherein the target region is a display region among the display regions where a luminance parameter meets a preset requirement, and the second display parameter comprises second spectral tristimulus values; converting the luminance parameter into a target display parameter with the type of the second spectral tristimulus values; and compensating the second display parameter based on the target display parameter.

Abstract: An apparatus for defending against control flow attack, including: a key acquisition module, configured to acquire response data, which is output by a physical unclonable function PUF module to an input stimulus, and store the response data in a register as key data to be used; an encryption module, configured to encrypt target execution data in a program control flow based on the key data in the process of the processor executing the program control flow, the target execution data including at least one of a target instruction at an indirect jump destination address and a function call return address; a decryption module, configured to decrypt the encrypted target execution data when the processor is to execute the target execution data; and an execution module, configured to continue to execute the program control flow based on the decrypted target execution data.

Abstract: Embodiments of the present application provide a processing method and apparatus for defending against shared storage side channel attacks, an electronic device and a computer-readable storage medium, and relate to the technical field of computers. In the embodiment of the present application, first time information is acquired by a clock thread, and the first time information is obfuscated to obtain second time information; and, the second time information is transmitted to an attack thread by a clock thread. Since the second time information acquired by the attack thread is obfuscated, that is, the second time information is inaccurate, the attack thread cannot successfully complete a side channel attack when it performs side channel attacks based on the inaccurate time information, so that the system can be protected.

Abstract: Embodiments of the present disclosure disclose an instruction scheduling method, an electronic device and a storage medium. The method comprises: determining at least one target memory access instruction in an instruction set corresponding to a micro-architecture model; determining durations consumed by each target memory access instruction in a plurality of instruction running scenarios; and, performing instruction scheduling on each target memory access instruction on the basis of the durations consumed by each target memory access instruction in the instruction running scenarios. By using the embodiments of the present disclosure, memory access instructions can be scheduled on the basis of the durations consumed by the memory access instructions in different instruction running scenarios, so that the applicability is high.

Abstract: A method and an apparatus for adjusting an instruction pipeline, a memory and a storage medium. The method for adjusting the instruction pipeline includes: receiving a move-type instruction, wherein the move-type instruction includes a target operand and a first source operand, and indicates to move a data of a source address indicated by the first source operand to a target address indicated by the target operand; receiving an object instruction located after the move-type instruction in an instruction sequence, wherein the object instruction includes an object source operand, indicating that an object operation is performed with a source address indicated by the object source operand; and replacing the object source operand in the object instruction with the first source operand of the move-type instruction to obtain a modified instruction, in response to the target operand of the move-type instruction being identify to the object source operand of the object instruction.

Abstract: The present application provides a method for controlling an offset voltage in a display device, a display device and a storage medium. The method for controlling an offset voltage in a display device comprises: generating a chopper signal based on at least one of a data output control signal and a polarity inversion control signal; and, controlling, according the chopper signal, the polarity of an offset voltage of an operational amplifier in the display device, so that the offset voltage is equivalently eliminated within at least one of a design space range and a design time range. By using the control method of the present application, without using large-size transistors and providing more signals, the display effect can be ensured and the size of the chip can also be reduced.

Abstract: The present disclosure provides an overcurrent protection circuit, an overcurrent protection method, a clock signal generation circuit and a display device. The overcurrent protection circuit includes N first overcurrent detection circuits, N second overcurrent detection circuits, a first signal generation circuit, a second signal generation circuit, a first level switching circuit, a second level switching circuit and a control circuit. The first signal generation circuit is configured to output a first control signal to the first level switching circuit upon the receipt of a first overcurrent indication signal. The second signal generation circuit is configured to output a second control signal to the second level switching circuit upon the receipt of a second overcurrent indication signal.

Abstract: Embodiments of the present application relate to the field of display driving technology, and disclose a method, an apparatus, an electronic device and a storage medium for processing pixel data. The method comprises: acquiring first image parameters of a first image unit and second image parameters of a second image unit, wherein the first image unit includes pixel data, of a first image, which is located on a first horizontal line, the second image unit includes pixel data, of a second image, which is located on the first horizontal line, and the second image is a previous frame of the first image; and updating the pixel data of the first image unit when the first image parameters do not match the second image parameters. The embodiments of the present application solve the problem of high driving power consumption in the process of outputting screens of the display panel in the prior art.

Abstract: It is provided a driving system, a driving method, a computer system and a computer readable medium. The driving system includes: an input circuit configured to receive an input on-chip voltage and output the on-chip voltage; an adjusting circuit configured to automatically detect a present amplitude of the on-chip voltage output by the input circuit and to output a bias voltage corresponding to the present amplitude of the on-chip voltage to a gate of the driven thin film transistor, wherein a source of the thin film transistor is directly or indirectly coupled to the on-chip voltage, and the bias voltage is lower than the on-chip voltage. The protection of the transistor gate and the adjusting of a receiver threshold voltage for different I/O (input/output) voltages and levels can be completed through automatic detection of the on-chip voltage and automatic adjusting.

Abstract: A slew rate boosting circuit, a source driver chip and a display device are provided in the present disclosure. The slew rate boosting circuit comprises: a first latch configured to receive and store first data; a second latch configured to receive and store second data, the second data being next to the first data; a first level shifter; an amplifier; and a slew rate boosting module configured to receive a high voltage data signal as current input data, and adjust a slew rate of an output stage of the amplifier according to a value of a specified bit of the first data, a value of a specified bit of the second data and the current input data.