Abstract: A technique for calibration of on-chip resistance (R) and capacitance (C) values using an on-board bypass capacitor may include configuring an on-chip switch to selectively couple an on-chip calibration circuit to an on-chip port. The on-chip calibration circuit may include an RC oscillator having an RC time constant (RCTC). The on-board bypass capacitor may be coupled to the on-chip calibration circuit, by using the on-chip port. The on-chip R and C values may be calibrated using the on-chip calibration circuit and the on-board bypass capacitor.

Abstract: Embodiments provide systems and methods for dynamically regulating the clock frequency of an integrated circuit (IC) based on the IC supply voltage. By doing so, the clock frequency is no longer constrained by a worst-case voltage level, and a higher effective clock frequency can be supported, increasing the IC performance. Embodiments include a wave clocking system which uses a plurality of delay chains configured to match substantially the delays of respective logic paths of the IC. As the delays of the logic paths vary with supply voltage and temperature changes, the delay chains matched to the logic paths experience substantially similar changes and are used to regulate the clock frequency of the IC.

Abstract: Aspects of segmented content reference circulation are described. In one embodiment, a marker is received in association with content under display. A type and attribute of the marker are evaluated. The marker may be evaluated as a start, end, or range type of marker, for example. The attribute of the marker may be evaluated as a playback start time or end time, for example. With reference to the start or end time, a segmented resource identifier is generated. The segmented resource identifier may include a uniform resource locator, as a reference to the content under display, and a playback attribute for rendering playback of the content starting at the start time or ending at the end time, for example. After being circulated, a playback device can rely upon the segmented resource identifier to request content for playback based on the start or end time playback attributes.

Abstract: A system and method for efficient matching regular expression patterns across multiple packets. A deep packet inspection system can be embodied in a switch ASIC using a flow tracker and a signature matching engine. The flow tracker can be positioned in an ingress portion of the switch ASIC at a location where packets in a bi-direction flow can be observed and recorded. The flow tracker generates a signature match request that is forwarded to a signature matching engine in an auxiliary pipeline. The signature matching engine is enabled to perform cross-packet signature matching using signature matching state machines and reports the signature matching results to the flow tracker using a response packet that is sent to the ingress pipeline.

Abstract: A semiconductor device based on split multi-gate field-effect transistor radio frequency devices is provided. The semiconductor device includes a substrate and a gate structure above the substrate and orthogonal to a channel axis. The semiconductor device also includes a semiconductor fin structure above the substrate along the channel axis. The semiconductor also includes a gate oxide region beneath the gate structure and in contact with the gate structure and the semiconductor fin structure. The gate oxide region has a first region with a first thickness and a first length. The gate oxide region also has a second region with a second thickness and a second length. The first thickness is greater than the second thickness. The first region and the second region are formed side-by-side along the channel axis.

Abstract: A scannable sequential element is provided. The scannable sequential element includes a master stage that includes a data path configured to receive a data input. The master stage also includes a pass gate located on the data path and configured to selectively pass the data input, in which the data path has only one pass gate. The master stage also includes a test path coupled to the data path and configured to receive a test input. The master stage also includes pass gates located on the test path and configured to selectively pass the test input.

Abstract: A system for cancellation of a reciprocal-mixing noise may comprise a down-converter mixer that may be configured to down convert a radio-frequency (RF) signal and to generate a baseband signal. The RF signal may include a desired signal and a blocker signal. A first signal path may be configured to receive the baseband signal and to generate a first signal. A second signal path may be configured to receive the baseband signal and to generate a second signal. A subtraction module may be configured to subtract the second signal from the first signal and to generate an output signal. The second signal may comprise the reciprocal-mixing noise, and the output signal may comprise the desired signal substantially free from the reciprocal-mixing noise.

Abstract: A near field communications (NFC) device is disclosed that detects a presence of another NFC capable device within its magnetic field. The NFC device generates an unmodulated frequency varying detection sequence to generate a frequency varying magnetic field and/or a modulated frequency invariant detection sequence to generate a carrier-frequency invariant magnetic field. The NFC device samples these magnetic fields and compares these samples to various a priori known responses of various objects to determine whether another NFC device is present within the frequency varying magnetic field and/or the carrier-frequency invariant magnetic field.

Abstract: Systems and methods are used to adjust, e.g., reduce, current driving a transmitter, i.e., to reduce transmitter power consumption, based on an actual value of a received signal from received along a cable. For example, this is very beneficial to an Ethernet system where the received signal is attenuated by the lossy cable. In this case, the transmitter power consumption can be lowered during a normal application where data is transmitted and received through the cable.

Abstract: Communication processing paths include distortions, such as DC offset in the baseband analog path which needs to be accounted for. The use of a digital-to-analog converter (DAC) to inject a DC offset cancellation signal can bring about noise/area/power advantages. The DAC is driven by a mixed signal low pass filter loop. However, the DAC could also be driven in an open loop system, or a combination of open and closed loop. A low noise sign and magnitude DAC with low area and power requirements is implemented using selectively connected programmable current sources to virtual earth input terminals on a transimpedance amplifier (TIA) op-amp circuit. The constant virtual earth voltage eliminates linearity problems that would otherwise exist due to the finite current source output impedance. Current sources are only switched in when required so unneeded sources are out of circuit and do not contribute noise or use any power.

Abstract: A portable computing device includes a radio frequency (RF) wired link, a core module, and a plurality of multi-mode RF units. When one or more of the multi-mode RF units are supporting a high-speed data communication, the core module is operable to detect a blocker that is adversely affecting the high-speed data communication. The core module is further operable to determine whether a radiation pattern alternative for the high-speed data communication will reduce the adverse affects on the high-speed data communication. When the radiation pattern alternative for the high-speed data communication will reduce the adverse affects on the high-speed data communication, the core module is further operable to enable the radiation pattern alternative. The one or more multi-mode RF units are operable to adjust at least one of transmission and reception of the high-speed data communication in accordance with the radiation pattern alternative.

Abstract: Disclosed are various embodiments of a current-mode line driver that may facilitate transmitting signals to a load. The current-mode line driver may comprise a common-mode current sense element that provides a signal corresponding to the common-mode output current of the line driver. A transconductance element receives the signal from the common-mode current sense element and provides a compensating current that is based at least in part on the signal. The compensating current may reduce the common-mode output current of the line driver.

Abstract: Methods, apparatus and computer-readable storage mediums for determining a characteristic of a signal transmitted from a wireless transmitter, using a measurement receiver. A first characteristic, calculated in respect of a first time period, and a second characteristic, calculated in respect of a second time period, are used to extrapolate a measured characteristic, measured over the first time period, to determine a determined characteristic for the second time period.

Abstract: A method and apparatus of transmitting pilot tones and data in multi-carrier spatial multiplexing transmission is disclosed. The method includes a plurality of subscribers transmitting data to a base station through common frequency sub-carrier and symbol time tiles. Each of the multiple subscribers rotating frequency sub-carrier and symbol time locations of pilot tones within the frequency sub-carrier and symbol time tiles.

Abstract: A receiver for a multi-channel communication system can include a down-converter device, an analog-to-digital converter (ADC), and a plurality of digital channel selection devices. The down-converter device can be configured to down-convert a plurality of analog signals from the multi-channel communication system to a plurality of corresponding low intermediate frequency (IF) signals. The ADC can be configured to convert the plurality of corresponding low-IF signals to a plurality of digital signals. Further, each digital channel selection device from the plurality of digital channel selection devices can be configured to select a digital signal corresponding to a channel of interest from the plurality of digital signals for further processing.

Abstract: A wireless access point (AP) radio may be integrated in a cable. The cable may comprise one or more other integrated wireless AP radios. The cable may be communicatively coupled to a wireless controller and the wireless AP radio may receive power from the wireless controller via the cable. Feature information and/or configuration parameter settings may be received by the wireless AP radio from the wireless controller via the cable. The wireless AP radio may provide wireless communication services such as wireless access to a wired network for one or more client devices, based on the feature information and/or the configuration parameter settings. When one or more adjacent wireless AP radios in the cable become non-operational, the wireless AP radio may increase its transmission power to increase its coverage for covering at least a portion of coverage area associated with the one or more non-operational adjacent wireless AP radios.

Abstract: A discrete digital transceiver includes a receiver sample and hold module, a discrete digital receiver conversion module, a transmitter sample and hold module, a discrete digital transmitter conversion module, clock generation module, and a processing module. The receiver sample and hold module samples and holds an inbound wireless signal in accordance with a receiver S&H clock signal. The discrete digital receiver conversion module converts the receiver frequency domain sample pulse train into an inbound baseband signal. The transmitter sample and hold module samples and holds an outbound signal to produce a transmitter frequency domain sample pulse train. The discrete digital transmitter conversion module converts a transmitter frequency domain sample pulse train into the outbound wireless signal. The clock generation module generates S&H clock signals in accordance with a control signal. The processing module generates the control signal such that the S&H clock signals are shifted.

Abstract: The invention discloses an electrical isolator circuit comprising: an input stage comprising a transmitter of an opto-isolator; and an output stage comprising: a receiver of the opto-isolator; an active circuit in series with the receiver between the receiver and a power rail of the output stage; a first resistor connected to an output of the active circuit, and an input for the application of a predetermined voltage to the active circuit, the output stage being configured such that a varying output voltage is developed across the first resistor in response to input of a high voltage AC signal to the input stage. Ideally the output stage is operable to clamp the voltage across the receiver at the level of the predetermined voltage, thereby allowing for an increase in the load resistor and variable output resistor without increasing the time constant to unacceptably having regards to switching requirements.

Abstract: Aspects of a method and system for priority-based digital multi-stream decoding. A multi-stream decoder may be enabled to decode and present multiple streams of a multi-stream multimedia application, simultaneously. The multi-stream decoder may be enabled to determine a priority level for each of the received multiple streams of the multimedia application. A high-priority stream may be decoded and presented at a high frame rate and a relative high resolution level, while a lower-priority stream may be decoded and presented at a low frame rate and a relative low resolution level. The decoded frames may be presented in a picture-in-picture format. The priority level for each of the received multiple streams may depend on user input, a user profile, and/or a display capability.

Abstract: Methods and apparatus are disclosed to simultaneously, wirelessly test semiconductor components formed on a semiconductor wafer. The semiconductor components transmit respective outcomes of a self-contained testing operation to wireless automatic test equipment via a common communication channel. Multiple receiving antennas observe the outcomes from multiple directions in three dimensional space. The wireless automatic test equipment determines whether one or more of the semiconductor components operate as expected and, optionally, may use properties of the three dimensional space to determine a location of one or more of the semiconductor components. The wireless testing equipment may additionally determine performance of the semiconductor components by detecting infrared energy emitted, transmitted, and/or reflected by the semiconductor wafer before, during, and/or after a self-contained testing operation.