Patents Assigned to CBRITE Inc.
  • Patent number: 9306078
    Abstract: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: April 5, 2016
    Assignee: CBRITE INC.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 9257490
    Abstract: A full-color AM OLED includes a transparent substrate, a color filter positioned on an upper surface of the substrate, and a metal oxide thin film transistor backpanel positioned in overlying relationship on the color filter and defining an array of pixels. An array of OLEDs is formed on the backpanel and positioned to emit light downwardly through the backpanel, the color filter, and the substrate in a full-color display. Light emitted by each OLED includes a first emission band with wavelengths extending across the range of two of the primary colors and a second emission band with wavelengths extending across the range of the remaining primary color. The color filter includes for each pixel, two zones separating the first emission band into two separate primary colors and a third zone passing the second emission band.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: February 9, 2016
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 9240437
    Abstract: A process of fabricating a flexible TFT back-panel on a glass support includes a step of providing a flat glass support member sufficiently thick to prevent bending during the processing. A layer of etch stop material is positioned on the upper surface of the glass support member and an insulating buffer layer is positioned on the layer of etch stop material. A TFT back-panel is positioned on the insulating buffer layer and a flexible plastic carrier is affixed to the TFT back-panel. The glass support member is etched away, whereby a flexible TFT back-panel is provided. The TFT back-panel can include a matrix of either OLED cells or LCD cells.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: January 19, 2016
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Fatt Foong, Gang Yu, Guangming Wang
  • Patent number: 9129868
    Abstract: A method of fabricating a TFT and IPS with reduced masking operations includes a substrate, a gate, a layer of gate dielectric on the gate and surrounding substrate surface and a semiconducting metal oxide on the gate dielectric. A channel protection layer overlies the gate to define a channel area in the semiconducting metal oxide. A S/D metal layer is patterned on the channel protection layer and a portion of the exposed semiconducting metal oxide to define an IPS area. An organic dielectric material is patterned on the S/D terminals and at an opposed side of the IPS area. The S/D metal is etched to expose the semiconducting metal oxide defining a first IPS electrode. A passivation layer covers the first electrode and a layer of transparent conductive material is patterned on the passivation layer to define a second IPS electrode overlying the first electrode.
    Type: Grant
    Filed: May 26, 2012
    Date of Patent: September 8, 2015
    Assignee: CBRITE INC.
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong, Liu-Chung Lee
  • Patent number: 9117918
    Abstract: A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: August 25, 2015
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong
  • Patent number: 9099563
    Abstract: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: August 4, 2015
    Assignee: CBRITE INC.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 9070779
    Abstract: A metal oxide thin film transistor includes a metal oxide semiconductor channel with the metal oxide semiconductor having a conduction band with a first energy level. The transistor further includes a layer of passivation material covering at least a portion of the metal oxide semiconductor channel. The passivation material has a conduction band with a second energy level equal to, or less than 0.5 eV above the first energy level.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: June 30, 2015
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Fatt Foong, Juergen Musolf, Gang Yu
  • Patent number: 8962377
    Abstract: A method of fabricating a pixelated imager includes providing a substrate with bottom contact layer and sensing element blanket layers on the contact layer. The blanket layers are separated into an array of sensing elements by trenches isolating adjacent sensing elements. A sensing element electrode is formed adjacent each sensing element overlying a trench and defining a TFT. A layer of metal oxide semiconductor (MOS) material is formed on a dielectric layer overlying the electrodes and on an exposed upper surface of the blanket layers defining the sensing element adjacent each TFT. A layer of metal is deposited on each TFT and separated into source/drain electrodes on opposite sides of the sensing element electrode. The metal forming one of the S/D electrodes contacts the MOS material overlying the exposed surface of the semiconductor layer, whereby each sensing element in the array is electrically connected to the adjacent TFT by the MOS material.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: February 24, 2015
    Assignee: Cbrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 8936973
    Abstract: A method of forming a gate dielectric in each MOTFT of an active matrix includes depositing a layer of gate metal on a substrate and patterning the gate metal to define a matrix of MOTFTs each including a gate electrode with all gate electrodes in each column connected together by a gate metal line and the line in each column connected at one end to the line in the next adjacent column by a gate metal bridging portion. The gate metal is anodized to form a layer of gate dielectric material. A layer of semiconductor metal oxide is deposited over the anodized gate metal and patterned to define an active layer for each MOTFT. Source/drain electrodes are formed on the layer of metal oxide for each MOTFT, and a laser is used to cut the bridging portion electrically connecting each gate metal line to the next adjacent gate metal line.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: January 20, 2015
    Assignee: Cbrite Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Kaixia Yang
  • Patent number: 8907336
    Abstract: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: December 9, 2014
    Assignee: CBrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 8742658
    Abstract: A full-color AM OLED includes a transparent substrate, a color filter positioned on an upper surface of the substrate, and a metal oxide thin film transistor backpanel positioned in overlying relationship on the color filter and defining an array of pixels. An array of OLEDs is formed on the backpanel and positioned to emit light downwardly through the backpanel, the color filter, and the substrate in a full-color display. Light emitted by each OLED includes a first emission band with wavelengths extending across the range of two of the primary colors and a second emission band with wavelengths extending across the range of the remaining primary color. The color filter includes for each pixel, two zones separating the first emission band into two separate primary colors and a third zone passing the second emission band.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: June 3, 2014
    Assignee: CBrite Inc.
    Inventors: Gang Yu, Chan-Long Shieh
  • Patent number: 8679905
    Abstract: A method of forming ohmic source/drain contacts in a metal oxide semiconductor thin film transistor includes providing a gate, a gate dielectric, a high carrier concentration metal oxide semiconductor active layer with a band gap and spaced apart source/drain metal contacts in a thin film transistor configuration. The spaced apart source/drain metal contacts define a channel region in the active layer. An oxidizing ambient is provided adjacent the channel region and the gate and the channel region are heated in the oxidizing ambient to reduce the carrier concentration in the channel area. Alternatively or in addition each of the source/drain contacts includes a very thin layer of low work function metal positioned on the metal oxide semiconductor active layer and a barrier layer of high work function metal is positioned on the low work function metal.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: March 25, 2014
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong
  • Patent number: 8592817
    Abstract: A method of fabricating MOTFTs on transparent substrates by positioning opaque gate metal on the substrate front surface and depositing gate dielectric material overlying the gate metal and a surrounding area and metal oxide semiconductor material on the dielectric material. Depositing selectively removable etch stop material on the semiconductor material and photoresist on the etch stop material to define an isolation area in the semiconductor material. Removing uncovered portions of the etch stop. Exposing the photoresist from the substrate rear surface using the gate metal as a mask and removing exposed portions leaving the etch stop material overlying the gate metal covered. Etching the semiconductor material to isolate the TFT. Selectively etching the etch stop layer to leave a portion overlying the gate metal defining a channel area. Depositing and patterning conductive material to form source and drain areas on opposed sides of the channel area.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: November 26, 2013
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong
  • Publication number: 20130119396
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Application
    Filed: May 9, 2012
    Publication date: May 16, 2013
    Applicant: CBRITE INC.
    Inventors: Gang YU, Chan-Long SHIEH, Hsing-Chung LEE
  • Patent number: 8435832
    Abstract: A method of fabricating MOTFTs on transparent substrates includes positioning opaque gate metal on the front surface of a transparent substrate and depositing transparent gate dielectric, transparent metal oxide semiconductor material, and passivation material on the gate metal and the surrounding area. Portions of the passivation material are exposed from the rear surface of the substrate. Exposed portions are removed to define a channel area overlying the gate area. A relatively thick conductive metal material is selectively deposited on the exposed areas of the semiconductor material to form thick metal source/drain contacts. The selective deposition includes either plating or printing and processing a metal paste.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: May 7, 2013
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 8377743
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: February 19, 2013
    Assignee: CBRITE Inc.
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 8253910
    Abstract: A display is disclosed. The display includes a plurality of pixels configured to emit light. The display also includes a plurality of pixel control circuits that are each configured to regulate emission of light from a pixel. The pixel control circuits each include one or more two-terminal switching devices that include an organic semiconductor.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: August 28, 2012
    Assignee: Cbrite Inc.
    Inventor: Boo Jorgen Lars Nilsson
  • Patent number: 8233212
    Abstract: An electro-optic display includes a “matrix” for confining moving elements of the display (e.g., rotating or twisting elements). The matrix (or at least the viewable portions thereof) may have a high reflectivity, comparable to that of white paper. This results in an overall “whiter” or brighter display. The matrix may include channels to facilitate inter-cell fluid transport and high-density element packing. In some cases, the matrix elements provide a hexagonal arrangement of cells for holding the rotating elements. The rotating elements of the display may be electrically and optically anisotropic hemispherically coated spheres. The hemispherical coating typically provides the necessary charge to create electrical anisotropy.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: July 31, 2012
    Assignee: Cbrite Inc.
    Inventors: Yelena Lipovetskaya, Brian Gobrogge
  • Patent number: 8222077
    Abstract: Two-terminal switching devices of MIM type having at least one electrode formed by a liquid phase processing method are provided for use in active matrix backplane applications; more specifically, MIM devices with symmetric current-voltage characteristics are applied for LCD active matrix backplane applications, and MIM devices with asymmetric current-voltage characteristics are applied for active matrix backplane implementation for electrophoretic displays (EPD) and rotating element displays. In particular, the combination of the bottom metal, metal-oxide insulator and solution-processible top conducting layer enables high throughput, roll-to-roll process for flexible displays.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: July 17, 2012
    Assignee: Cbrite Inc.
    Inventors: Xiong Gong, Kaixia Yang, Gang Yu, Boo Jorgen Larŝ Nilsson, Chan-Long Shieh, Hsing-Chung Lee, Fatt Foong
  • Patent number: 8193594
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: June 5, 2012
    Assignee: CBRITE Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee