Abstract: A method for controlling an efuse circuit is provided. The method includes the following steps. A sample signal of a switch is provided. An error signal is generated according to the sample signal and a reference signal. The error signal is compared with a threshold. A voltage across a control node of the switch and an output node of the switch is clamped to a preset voltage value when the error signal is greater than the threshold.

Abstract: A control circuit used in a switching converter having a switch and an inductor. The control circuit has an error amplifying circuit, a current comparing circuit, a clock generator and a constant OFF time generator. The error amplifying circuit receives a voltage reference signal and a voltage feedback signal indicative of an output voltage signal, and provides an error signal. The current comparing circuit compares the error signal with a current sensing signal indicative of a current flowing through the inductor, and provides a comparing signal to turn the switch OFF. When the switching converter is coupled to a filtering capacitor, the clock generator provides a clock signal to turn the switch ON, and when the switching converter is coupled to a super capacitor, the clock generator is disabled and the constant OFF time generator provides a constant OFF time signal to turn the switch ON.

Abstract: A switching regulator converts an AC input voltage into an output voltage, to power a load. The switching regulator includes a power stage having a main power switch. The main power switch has different ON time durations under different AC input voltage conditions and different load currents.

Abstract: An LDMOS having multiple field plates and manufacturing method. The LDMOS has a semiconductor substrate with an upper surface, an interlayer dielectric layer with an upper surface, a gate conducting layer, a field plate barrier layer, a first field plate and a second field plate. The gate conducting layer has a plate portion and a channel portion, the height of the plate portion to the upper surface of the semiconductor substrate is greater than the height of the channel portion to the upper surface of the semiconductor substrate. The field plate barrier layer disposes in the interlayer dielectric layer between the plate portion and the drain. The first field plate disposes in the interlayer dielectric layer and extends from the field plate barrier layer through the interlayer dielectric layer to the upper surface of the interlayer dielectric layer.

Abstract: A multi-die package structure with an embedded die embedded in a substrate, a flip chip die mounted above the substrate, and an attached die attached onto the flip chip die. The package is compact and low cost.

Abstract: A circuit for controlling a switching mode power supply having a power switch, having: a feedback pulse circuit, configured to receive a feedback signal, and to provide a feedback pulse signal; a load determining circuit, configured to receive the feedback signal, and to provide a load determining signal; a light load pulse circuit, configured to receive the load determining signal and a frequency regulating signal, and to provide a light load pulse signal; a frequency regulating circuit, configured to receive the load determining signal, the light load pulse signal and a normal load pulse signal, and to provide the frequency regulating signal; and a selecting circuit, configured to receive the load determining signal, the feedback pulse signal and the light load pulse signal, and to provide an on control signal and the normal load pulse signal; wherein the on control signal controls an on operation of the power switch.

Abstract: A synchronous rectifier control circuit, used with a synchronous rectification circuit having a primary switch and a synchronous rectifier, having: a drain-source threshold setting circuit, configured to provide a dynamic drain-source voltage threshold based on a drain-source voltage across the synchronous rectifier; a primary switch detecting circuit, configured to provide a primary switch state indicating signal based on a comparison result of the drain-source voltage and the dynamic drain-source voltage threshold; and an on-control circuit, configured to provide a synchronous on signal to turn on the synchronous rectifier when the drain-source voltage decreases to the turn-on threshold, on the premise that the primary switch state indicating signal indicates an on state of the primary switch.

Abstract: A control circuit used in a switch mode power supply is provided. The control circuit has an error amplifier, a first compensation network having a first resistance and a second compensation network having a second resistance. The error amplifier has a first input terminal, a second input terminal and an output terminal. The first compensation network is coupled between the first input terminal and the output terminal of the error amplifier. The second compensation network is coupled to the first input terminal of the error amplifier. When the switch mode power supply enters the transient state, the control circuit increases the first resistance of the first compensation network or decreases the second resistance of the second compensation network.

Abstract: An integrated circuit for a power management circuit is provided. The integrated circuit has a power input pin, a system output pin for providing an output voltage, a switching node pin coupled to a battery through an inductor, a ground pin, a first switch coupled between the system output pin and the switching node pin, a second switch coupled between the switching node pin and the ground pin, and a control circuit. The control circuit controls the first switch and second switch to operate in a buck mode or a boost mode. The first switch is turned OFF for a constant time, and the second switch is turned ON for the constant time.

Abstract: A smart switch system comprising one or more switching devices. Each one of the switching devices include a first pin, a second pin, a current indication pin, a system current limit pin and a power switch for electrically coupling the first pin to the second pin when the power switch is turned on. Each switching device may adaptively adjust an operation current limit value of the switching device based on a system total current limit value received or set at the system current limit pin and a system current indication signal received at the current indication pin.

Abstract: A switching converter with adaptive constant on-time control has a power switch and a control circuit. The switching converter converts an input voltage into an output voltage. When the switching converter is in a light-load state, the on-time of the power switch is controlled to be smaller than the on-time of the power switch in a normal-load state, wherein the normal-load state includes a continuous current mode (CCM) or a discontinuous current mode (DCM).

Abstract: A linear voltage regulator includes a transistor, an error amplifier, a feedback circuit and a compensation circuit. The transistor has a first terminal for receiving an input voltage, a second terminal for providing an output voltage, and a control terminal. The error amplifier has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the output terminal is coupled to the control terminal of the transistor. The feedback circuit receives the output voltage and generates a feedback voltage lower than the output voltage. The compensation circuit is configured to receive the feedback voltage and generate a compensation voltage at the second input terminal of the error amplifier. The compensation circuit includes a compensation capacitor for introducing a zero point into an open-loop transfer function of the linear voltage regulator to improve system stability.

Abstract: An IC package structure including an array of package units formed into a panel-shaped package units array. Each package unit has a continuous and closed metal wall surrounding the periphery of the package unit and at least one IC chip/IC die disposed in the package unit, and wherein each IC chip/IC die has a top surface and a back surface opposite to the top surface. A panel-shaped metal layer corresponding to the panel-shaped package units array can be formed on entire back side of the IC package structure and bonded to the metal wall of each package unit, wherein the back side of the IC package structure refers to the side to which the back surface of each IC chip/IC die is facing.

Abstract: A controller for a multiphase switching converter has a voltage control circuit, a total current control circuit, a frequency divider and a plurality of sub control circuits. The voltage control circuit provides an on-time control signal based on an output voltage. The total current control circuit provides a current control signal based on a total current flowing through the plurality of switching circuits. The frequency divider receives the on-time control signal, and provides a plurality of frequency division signals based on the on-time control signal. The plurality of sub control circuits provides a plurality of switching control signals to control the plurality of switching circuits respectively. Each of the plurality of sub control circuits receives one of the plurality of frequency division signals and the current control signal, and provides one of the plurality of switching control signals.

Abstract: A method for adjusting a release voltage of a power system. The power converter has a power input terminal for receiving a bus voltage, a first resistor coupled between the power input terminal and a sense terminal, a second resistor coupled between the sense terminal and a reference ground, and a bi-directional converter having a first terminal coupled to the power input terminal. The bi-directional converter converts the bus voltage received at the first terminal to a first voltage at a second terminal or converts the first voltage to the release voltage at the first terminal. The method is adjusting the release voltage by changing the ratio of the first resistor to the second resistor.

Abstract: A power converter, a boost off time adaptive adjustment unit and a boost cycle short circuit protection module for controlling an off time of a boost cycle of the power converter. The boost off time adaptive adjustment unit is adapted to generate an off time control signal based at least on an input voltage and an output voltage of the power converter to regulate the off time of the boost cycle to change in an opposite direction to the output voltage when the power converter is operating normally during the boost cycle, and to regulate the off time of the boost cycle to change in a same direction as the output voltage when a short-circuit fault occurs during the power converter operating in the boost cycle.

Abstract: A controller used in a resonant converter having a switching circuit and a resonant tank. The switching circuit has a high side switch and a low side switch. The controller has a feedback processing circuit for providing a reference signal based on a feedback signal. The reference signal changes at a first slope based on the feedback signal when the feedback signal is higher than a first voltage threshold, and the reference signal changes at a second slope based on the feedback signal when the feedback signal is lower than the first voltage threshold. The turning off of the high side switch is controlled by a high side off signal, which is generated based on the reference signal and a voltage sampling signal indicative a voltage across a resonant capacitor of the resonant tank.

Abstract: A controller for a multiphase switching converter has a set generation circuit, a frequency divider, and a plurality of sub control circuits. The set generation circuit provides a set signal based on an output voltage and a total current flowing through the plurality of switching circuits. The frequency divider provides a plurality of frequency division signals based on the set signal. The plurality of sub control circuits provides a plurality of switching control signals to control the plurality of switching circuits respectively. Such that when the total current is larger than a current reference, one of the plurality of switching circuits maintains off temporarily, until the total current is less than the current reference, then the one of the plurality of switching circuits are turned on based on the output voltage and a voltage reference.

Abstract: A lateral transistor having a well region, a body region, a source region, a drain region, a gate structure and a trenched Schottky barrier structure. The trenched Schottky barrier structure extended vertically from a top surface of the well region through the source region and the body region and penetrated into at least a portion of the well region to form a vertical Schottky contact.

Abstract: A short protection method for a power converter having an output terminal for providing an output voltage. The power converter works in a hiccup protection mode when a short fault occurs. The hiccup protection mode has a sleep stage and a reset stage, the short protection method detects the output voltage during the hiccup protection mode and sets the time period of the reset stage based on the detected output voltage. The time period of the reset stage increases with the increase of the detected output voltage.