Abstract: A controller of an isolated switching converter having a primary and secondary switch, the controller includes a valley detection circuit for providing a valley pulse signal in response to valleys of a resonant voltage, a pulse frequency modulation circuit for providing a pulse frequency modulation signal based on a feedback signal indicative of an output voltage, a primary on enable circuit for providing a primary on enable signal based on the pulse frequency modulation signal and valley pulse signal, a secondary logic circuit for generating a secondary control signal to control the secondary switch based on a primary off detection signal, a zero cross detection signal and the primary on enable signal, and a primary logic circuit for generating a primary control signal to control the primary switch based on a synchronous signal electrically isolated from the primary on enable signal.

Abstract: A power supply circuit for a switching mode power supply, having: a charging capacitor coupled to an auxiliary winding; a power supply diode coupled to a power supply capacitor, wherein the charging capacitor has a connecting terminal coupled to the power supply diode, and the charging capacitor and the power supply diode are serially coupled between the auxiliary winding of the switching mode power supply and the power supply capacitor; and a power supply switch coupled between the connecting terminal and a primary ground of the switching mode power supply.

Abstract: A controller of a switching converter includes an error amplifying circuit, a first comparison circuit, a valley detection circuit, a valley selection circuit and a frequency control circuit. The error amplifying circuit generates a compensation signal based on the difference between a reference signal and a feedback signal. The first comparison circuit compares the compensation signal with a modulation signal and generates a pulse frequency modulation signal. The valley detection circuit detects valleys of a resonant voltage of the switching converter and generates a valley pulse signal. The valley selection circuit generates a valley enable signal corresponding to a target valley number based on the pulse frequency modulation signal and the valley pulse signal. The frequency control circuit generates a frequency control signal to control the switching frequency of the first switch based on the valley enable signal and the valley pulse signal.

Abstract: A panel-shaped metal wall grids array for panel level IC packaging and associated manufacturing method. Each metal wall grid in the metal wall grids array has a continuous and closed metal wall of a predetermined wall height. The metal wall grids are connected to form a monolithic panel through a plurality of metal connecting portions. When the panel-shaped metal wall grids array is used for panel level IC packaging, at least one IC chip/IC die is disposed in each metal wall grid with a top surface of each IC chip/IC die facing downwards, and a panel-shaped metal layer matching with the panel-shaped wall grids array may be further formed on the entire back side of the panel-shaped metal wall grids array so that the panel-shaped metal layer is bonded to the metal wall of each metal wall grid.

Abstract: A switching converter has four switches and a control circuit. The control circuit provides a first drive signal to control a first switch and a second drive signal to control a second switch based on a first set signal, and provides a third drive signal to control the third switch and a fourth drive signal to control the fourth switch based on a second set signal. When an output voltage is larger than an input voltage, an on-time period of the third switch is adaptively adjusted according to the input voltage, the output voltage and a first parameter. When the output voltage is less than the input voltage, the on-time period of the third switch is adaptively adjusted according to the input voltage, the output voltage and a second parameter.

Abstract: A position sensing system has a trim unit to trim hall voltages generated by a first sensor and a second sensor in response to an excitation current, to compensate a non-orthogonality of the first sensor and the second sensor.

Abstract: A control circuit for controlling a switching converter having a low quiescent current. The control circuit has an error amplifying circuit, an on time generator, a first comparing circuit and a second comparing circuit. When the switching converter operates in a light load operation mode, the error amplifying circuit and the on time generator are deactivated. Meanwhile, the first comparing circuit compares a current sensing signal indicative of inductor current with a current reference signal to provide an off time control signal during an on state of a low side switch to determine an on moment of a high side switch. The second comparing circuit compares the voltage feedback signal with a voltage reference signal to provide an on time control signal to determine an off moment of the high side switch.

Abstract: A bi-directional buffer for applications using in an I2C or SMBUS or other bus systems. The bi-directional buffer has an input terminal to receive an input voltage signal and an output terminal for providing an output voltage signal, and the output voltage signal follows the input voltage signal. The output voltage signal is regulated to have a first bias voltage greater than the input voltage signal by a first operational amplifier, or to have a second bias voltage greater than the input voltage signal by a second operational amplifier, the second bias voltage is smaller than the first bias voltage.

Abstract: An IC package structure and an IC package unit are disclosed. The IC package includes an array of metal wall grids formed into a panel, each one of the metal wall grids having a continuous and closed metal wall to surround an IC package unit with at least one IC chip/IC die disposed therein. Each IC chip/IC die has a top surface with a plurality of metal pads formed thereon. A panel-shaped metal layer is formed on entire back side of the panel of the array of metal wall grids and bonded to the metal wall of each metal wall grid. A panel-shaped rewiring substrate having a plurality of metal pillars is connected to each IC chip/IC die with each one of the plurality of metal pillars soldered with a corresponding one of the plurality of metal pads.

Abstract: A clock self-testing method and circuit. The clock self-testing method includes introducing a first clock signal and a second clock signal, counting cycles of the first clock signal and the second clock signal respectively beginning at the same moment, and if one of the number of cycles of the first clock signal being counted and the number of cycles of the second clock signal being counted is equal to N, determining whether the remained number of cycles is in a count range from M to N. If the remained number of cycles is out of the count range from M to N, the first clock signal and the second clock signal have errors.

Abstract: A driving circuit providing a driving signal at a driving terminal to drive a power switch. The driving signal has a first driving period and a second driving period. Both the first driving period and the second driving period have a first driving time interval. The driving circuit has a first equivalent on resistor established during the first driving time interval and located between a first voltage node and the driving terminal. The first equivalent on resistor has a first equivalent on resistance during the first driving time interval of the first driving period and has a second equivalent on resistance during the first driving time interval of the second driving period. The first equivalent on resistance and the second equivalent on resistance are not equal.

Abstract: A switching mode power supply preventing a first switch from being falsely triggered. The switching mode power supply detects a peak of an input signal and starts timing a period of time since the arrival of the peak of the input signal is detected. The first switch starts performing the on and off switching operations when the period of time expires.

Abstract: A multiphase switching converter has a plurality of switching circuits coupled in parallel, and a plurality of control circuits configured in a daisy chain. Each control circuit receives a phase input signal, and provides a phase output signal and a switching control signal for controlling a corresponding switching circuit. One of the control circuits is a master control circuit, if a fault is detected by the master control circuit, then the master control circuit provides the phase output signal satisfying a master transfer type, and then the master control circuit changes to a slave control circuit.

Abstract: A phase sequence correction circuit for a voltage converter has a blanking time calculation circuit and a control signal generation circuit. Based on a plurality of delay signals, the blanking time calculation circuit updates a blanking time period during which a immediately following switching circuit is not allowed on. If a sum of the plurality of delay signals is larger than an incremental threshold, then the blanking time signal increases by an incremental step. The control signal generation circuit receives the blanking time signal and provides a plurality of control signals to control a plurality of switching circuits of the voltage converter respectively. If a sum of the plurality of delay signals is larger than an incremental threshold, then the blanking time signal increases by an incremental step.

Abstract: A dimming circuit for dimming a current flowing through a light emitting device, having: a multi-function pin, configured to receive a dimming signal; wherein when the dimming signal is an analog voltage signal, an amplitude of the current flowing through the light emitting device is regulated based on the dimming signal; when the dimming signal is a pulse signal and a frequency of the dimming signal is in a first frequency range, a duty cycle of the current flowing through the light emitting device is regulated based on the dimming signal; and when the dimming signal is the pulse signal and the frequency of the dimming signal is in a second frequency range, the amplitude of the current flowing through the light emitting device is regulated based on the dimming signal.

Abstract: A turn-off protection circuit and a turn-off protection method for a switch unit. The switch unit may include a first set of switching devices coupled between a first circuit node and an output node, and a second set of switching devices coupled between a second circuit node and the output node. The turn-off protection circuit may compare a first circuit node potential at the first circuit node and/or a second circuit node potential at the second circuit node with a switch node potential at the output node to detect a the flow direction of the a freewheeling current when the switch unit is turned off, and turn on and maintain the first set of switching devices or the second set of switching devices on depending on the flow direction of the freewheeling current until the freewheeling current is reduced to a predetermined safe current threshold.

Abstract: A discharge circuit for an X capacitor has a first voltage detection circuit providing a first indicating signal based on a voltage across two input terminals of a switching converter to indicate whether the two input terminals are connected to an AC power source, and a discharge module starting a discharge operation on the X capacitor based on first indicating signal, and the discharge operation discharges the X capacitor during a first time period, and stops discharging the X capacitor and compares a sampled signal with the voltage across the two input terminals during a following second time period.

Abstract: A power management circuit has a power input terminal coupled to a power supply or a load, a power terminal configured to provide an output voltage, and a battery terminal coupled to a battery. The power management circuit further has a current limiting circuit, an over-current indication circuit and an over-current threshold selecting circuit. The current limiting circuit compares a current feedback signal indicative of an output current flowing out of the power terminal with a current threshold signal and generates a square wave signal. The over-current indication circuit generates an over-current indication signal based on the square wave signal. The over-current threshold selecting circuit selects a first over-current threshold voltage or a second over-current threshold voltage as an over-current threshold voltage based on the over-current indication signal, wherein the first over-current threshold voltage is higher than the second over-current threshold voltage.

Abstract: A battery charging circuit providing a charging current to a battery via a charging transistor. A control circuit used to control the battery charging circuit has a system voltage control loop providing a system voltage compensation signal, a charging current control loop providing a charging current compensation signal and a charging transistor control loop providing a charging regulation signal based on a charging transistor reference signal and the system voltage feedback signal.

Abstract: An isolated switching converter has a primary switch and a control circuit. The control circuit has a first sampling circuit, a second sampling circuit, a compensation circuit and a feedback control circuit. The first sampling circuit is coupled to an auxiliary winding of a transformer to receive a voltage on the auxiliary winding and is configured to generate a first feedback signal having an alternating current signal indicative of an output voltage. The second sampling circuit is coupled to the auxiliary winding through a first rectifier and is configured to generate a second feedback signal having a direct current signal indicative of the output voltage. The compensation circuit is configured to generate a compensation signal based on the first feedback signal, the second feedback signal and a reference threshold. The feedback control circuit is configured to generate a primary control signal of the primary switch based on the compensation signal.