Abstract: A high side buck converter includes a high side transistor, a low side transistor, a sensor, a sensing window generator, an error amplifier, a first comparator and an on-time signal generator. The high side and low side transistors are coupled together to form a switch node which is used as the reference ground of the controller. The sensor senses the output voltage and generates a sensing signal. The sensing window generator generates a sensing window signal. The error amplifier amplifies the error between a feedback signal of the sensing signal and a reference signal during the sensing window, and generates an error signal. The first comparator compares the feedback signal with the error signal and generates a first comparison signal. The on-time signal generator generates an on-time signal based on the first comparison signal, so as to control the high side and low side transistors.

Abstract: A switching mode power supply, having: an input port; an output port; an energy storage component and a pair of power switches coupled between input port and the output port; an error amplifier configured to generate an amplified error signal based on the feedback signal and the reference signal; an error comparator configured to generate a frequency control signal based on the amplified error signal and the first sawtooth signal; a peak current generator configured to generate a peak current signal based on the frequency control signal; a peak current comparator configured to generate a current limit signal based on the peak current signal and the current sense signal; and a logic circuit configured to generate a switching signal to control the power switches based on the frequency control signal and the current limit signal.

Abstract: A switching power supply comprising a switching circuit and a controller. The controller comprises a preprocessing circuit, a first multiplier, a first comparing circuit and a logic circuit. The controller comprises a preprocessing circuit, a first multiplier, a first comparing circuit and a logic circuit. The preprocessing circuit generates a first multiplication input signal based on the input voltage and output voltage of the switching circuit. The first multiplier multiplies the first multiplication input signal by a second multiplication input signal and generates a first product signal. The first comparing circuit compares a current sensing signal representative of the input current with the first product signal and generates a first comparison signal. The logic circuit turns off a main switch in the switching circuit when the current sensing signal is larger than the first product signal.

Abstract: A multi-phase switching converter comprising a plurality of switching circuits, a comparing circuit and a control circuit. The comparing circuit generates a comparison signal based on a reference signal and the output voltage of the multi-phase switching converter. The control circuit can turn on the following switching circuit based on the comparison signal only after the time from the current switching circuit being turned on reaches a first time threshold or the off-time of the current switching circuit reaches a second time threshold, wherein the first time threshold is longer than the second time threshold.

Abstract: An isolated switching mode power supply, having: a transformer having a primary winding, a secondary winding and a third winding; a current limit comparator configured to provide a current limit signal based on the current sense signal and the peak current signal; a logic circuit configured to provide a logic control signal based on the frequency control signal and the current limit signal; a startup control circuit configured to generate a startup control signal based on the current sense signal; a load detecting circuit configured to provide a load detecting signal based on the second feedback signal and the switching signal; and a selector configured to provide the logic control signal or the startup control signal based on the load detecting signal.

Abstract: A class D audio amplifier having: an audio control circuit configured to provide a switching signal based on an input signal and a reference signal; an input capacitor coupled between the input signal and the first input terminal of the audio control circuit; an inductor having a first terminal coupled to the switching terminal of the audio control circuit, and a second terminal; an output capacitor having a first terminal coupled to second terminal of the inductor and a second terminal coupled to a load; and a noise suppression circuit having a first terminal coupled to the first input terminal of the audio control circuit, and a second terminal coupled to the switching terminal of the audio control circuit, wherein the noise suppression circuit charges the input capacitor and the output capacitor to reach a preset value.

Abstract: A step-down regulator comprising a pseudo constant on time control circuit is disclosed, comprising an on-time generator configured to receive a switching signal provided by the step-down regulator and a control signal provided by the pseudo constant on time control circuit, and generates an on-time signal; a feedback control circuit configured to receive a feedback signal representative of the output voltage of the step-down regulator and generate an output signal; and a logic control circuit coupled to the on-time generator and the feedback control circuit to receive the on-time signal and the output signal and generating the control signal, and a power stage configured to receive an input voltage and the control signal and generate the switching signal.

Abstract: A constant on-time switching converter includes a switching circuit, an on-time control circuit, a comparing circuit and a logic circuit. The switching circuit has a first switch and is configured to provide an output voltage to a load. The on-time control circuit generates an on-time control signal to control the on-time of the first switch. The comparing circuit compares the output voltage of the switching circuit with a reference signal and generates a comparison signal. The logic circuit generates a control signal to control the first switch based on the on-time control signal and the comparison signal. When the switching frequency of the switching circuit approaches an audible range, the switching converter enters into a sleep mode, the on-time control signal is reduced to increase the switching frequency of the switching circuit.

Abstract: A current control circuit and associated method are disclosed hereby. The current control circuit has a fly-wheel circuit, comprising an inductor, a rectifier and a load; a current sense circuit, detecting a load current, configured to generate a first current signal; a compensating circuit, generating a compensating signal; a control circuit, generating a control signal according to the first current signal and the compensating signal; a first switch, coupled to the fly-wheel circuit, turned ON and OFF according to the control signal. By the effect of the compensating signal, the drift error of the average load current is prohibited.

Abstract: The present disclosure discloses a field effect transistor (“FET”), a termination structure and associated method for manufacturing. The termination structure for the FET includes a plurality of termination cells arranged substantially in parallel from an inner side toward an outer side of a termination area of the FET. Each of the termination cells comprises a termination trench and a guard ring region located underneath the bottom of the termination trench in the semiconductor layer. Each termination trench is lined with a termination insulation layer, and is filled with a first conductive spacer and a second conductive spacer respectively against an inner sidewall and an outer sidewall of the termination trench and spaced apart from each other with a space, and a dielectric layer filling the space between the first and the second spacers.

Abstract: A controller used in a buck-boost converter includes a clock generator, an error amplifying circuit, a comparing circuit, a proportional sampling circuit, a logic circuit, a pulse width increasing circuit, first and second driving circuits. Based on a clock signal generated by the clock generator, the proportional sampling circuit samples the difference between a current sensing signal and a compensation signal generated by the error amplifying circuit, and generates a proportional sampling signal. The pulse width increasing circuit generates a sum control signal based on the proportional sampling signal and a logic control signal generated by the logic circuit, wherein a modulation value adjusted by the proportional sampling signal is added to the pulse width of the logic control signal to generate the pulse width of the sum control signal. The first and second driving circuits generate driving signals based on the sum control signal and the logic control signal.

Abstract: A switching mode power supply comprising a synchronous rectifying control circuit. The synchronous rectifying control circuit comprising an integrating circuit, a first comparison circuit and a logic circuit. The integrating circuit is configured to provide an integrating signal. The first comparison circuit comprises a first input coupled to the output of the integrating signal, a second input configured to receive a first threshold signal, and an output. The logic circuit comprises a first input coupled to the output of the first comparison circuit and an output coupled to a control terminal of the secondary switch, and the secondary switch is configured to be turned OFF when the integrating signal is less then the first threshold signal.

Abstract: An ESD protection structure and a semiconductor device having an ESD protection structure with the ESD protection structure including a patterned conductive ESD protection layer. The ESD protection layer is patterned to have a first portion of a substantially closed ring shape having an outer contour line and an inner contour line parallel with each other. The outer and the inner contour lines are waved lines. The first portion further has a midline between and parallel with the outer and the inner contour lines. The midline is a waved line having a substantially constant curvature at each point of the midline. Therefore the ESD protection layer has a substantially uniform curvature and an increased perimeter which advantageously improve the breakdown voltage and the current handling capacity of the ESD protection structure.

Abstract: A switch mode power supply system has a constant on-time signal generator, a logic circuit, a feedback circuit, a first ramp signal generator, a second ramp signal generator, a switch circuit having a power switch, and a comparator. A feedback signal from the feedback circuit is compensated by the first ramp signal generator, and a reference signal is compensated by the second ramp signal generator. The comparator compares the compensated feedback signal with the compensated reference signal to indicate an off time of the power switch while the constant on-time signal generator decides the on-time of the power switch.

Abstract: A LED driver comprising: a power switch; a transformer comprising a primary winding coupled to the power switch, a secondary winding and a third winding; a current sense circuit configured to sense a current flowing through the power switch and generates a current sense signal; a zero cross detecting circuit configured to detect a current flowing through the secondary winding, and generates a zero cross detecting signal; a compensation circuit configured to compensate the current sense signal based on the current flowing through the third winding; a control circuit configured to receive the compensated current sense signal and the zero cross detecting signal, and wherein the control circuit generates a control signal to control the power switch.

Abstract: A switching regulator configured to provide an output voltage comprises a power stage, an error correction circuit, a comparator, an ON-time generator and a logic circuit. The error correction circuit generates an error correction voltage based on a reference voltage and a feedback voltage representative of the output voltage. The comparator compares the feedback voltage with the difference between the reference voltage and the error correction voltage, and generates a comparison signal. The ON-time generator is configured to provide an ON-time signal. The logic circuit generates a logic control signal to control the power stage based on the comparison signal and the ON-time signal.

Abstract: A switching mode power supply, having: a power switch; an energy storage component coupled to the power switch; a current sense resistor configured to generate a current sense signal; a mode select resistor configured to generate a mode select resistor; a ZCD (Zero Cross Detecting) circuit configured to generate a ZCD signal; and a control circuit configured to provide a switch control signal to control the on and off of the power switch, the control circuit having a multi-function pin configured to receive the mode select signal, the current sense signal and the ZCD signal.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: The present application discloses a control circuit of a switching power converter, wherein the switching power converter comprises a power switch, and is configured to convert an input voltage into an output voltage, the control circuit comprises: a first time generating circuit configured to generate a first time signal; a phase lock circuit configured to generate a second time signal; and a switching signal generating circuit configured to generate a switching signal to control the ON and OFF switching of the power switch. The phase lock circuit generates the second time signal in accordance with the frequency difference between the switching signal and a reference clock signal, so as to get the frequency of the switching signal to be substantially equal to the frequency of the reference clock signal.

Abstract: A multiphase converter has a plurality of phase circuits and a plurality of phase control circuits. Each phase circuit has a switch having a control terminal, and the control terminal of the switch may be configured to receive a drive signal. Each phase control circuit may be corresponding to one of the phase circuits, and each phase control circuit may be configured to provide a phase control signal to adjust an ON-time period or a reference signal for the corresponding phase circuit. The phase control signal may be responsive to the drive signal of the corresponding phase circuit.