Abstract: A circuit for providing a temperature-compensated reference current, the circuit comprising a current mirror and a V.sub.BE multiplier circuit. The current mirror includes a reference transistor with its collector providing the temperature-compensated reference current. The V.sub.BE multiplier circuit connects together the base and collector of the reference transistor so as to provide a voltage differential in a range of values having a greatest lower bound equal to V.sub.BE, and sinks (or supplies) base current to the reference transistor so that the reference current is not appreciably affected by the base current of the reference transistor.

Abstract: A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal to an error control signal derived from an error amplifier or in the alternative to a disable signal. The output of the comparator is latched on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

Abstract: A regulator includes a driver stage having an output port for providing an output voltage, a predriver coupled to the driver to control the output voltage provided by the driver stage, a comparator to compare the driver output voltage to a reference voltage, and a feedback element coupled between the driver output port and the comparator. The driver may include a high side transistor having a collector coupled to a collector of a low side transistor, and a current sensing transistor having a base coupled to a base of the low side transistor.

Abstract: A control circuit for providing fast turn-off of a PNP transistor with output transient protection. An embodiment of the invention provides a current amplifier coupled between a positive voltage supply line and the base of a PNP switching transistor and an input device for providing an input current to the current amplifier. The current amplifier provides a transitory reverse drive current to the base of the PNP switching transistor. The current amplifier and the input device both include transient blocking junctions that block current flow from a positive voltage transient in excess of the positive supply voltage. The current amplifier is a PNP drive transistor in the preferred embodiment. The PNP drive transistor provides a transitory reverse drive current to the base of the PNP switching transistor.

Abstract: A high speed totem pole FET driver circuit with differential cross-conduction prevention. The driver circuit includes first and second switching elements coupled to a first node, and third and fourth switching elements coupled to a second node. The first node is coupled to a first current source, a pulldown circuit, and the input of the third switching element. The second node is coupled to a second current source, a pullup circuit, and the input of the second switching element. Trigger inputs are applied to the inputs of the first and fourth switching elements to switch the first and fourth switches ON and OFF, wherein the two trigger inputs are of opposite phase so that when one input is HIGH (LOW) the other input is LOW (HIGH). The second switching element may include a comparator circuit with its non-inverting input coupled to the second node, its inverting input coupled to a power source via a V.sub.

Abstract: A foldback circuit which responds to a voltage differential between the input and output terminals of a voltage regulator in excess of a foldback threshold by lowering the current limit threshold of a current limit circuit. The foldback circuit includes a transistor with a base coupled to the input voltage and an emitter coupled to the output voltage. The collector when conducting provides a current that decreases the current limit threshold. Diodes in the path between the input and output voltages through the transistor may be used in establishing the foldback threshold.

Abstract: A programmable delay circuit employs a comparator to control an output driver. The comparator compares a ramp signal with a disable signal or an error control signal derived from an error amplifier. The comparator latches the output on until a reset signal is received. The reset signal is produced when the ramp signal is discharged below a predetermined level. The programmable delay circuit is useful in a secondary side post regulator to control a grounded totem pole driver. The totem pole driver in turn controls a switching device coupled to a voltage on a secondary winding.

Abstract: A current limit circuit for preventing voltage overshoot in a driver circuit. A diode is coupled to the output terminal of the driver circuit. The diode's junction capacitance is utilized to reduce a current limit threshold in order to control the rate of change of the output voltage at the output terminal. A bias control circuit regulates a pass transistor to prevent load current provided by the driver circuit from exceeding the current limit threshold. The cathode of the diode is coupled to the output terminal so that the voltage at the cathode of the diode is responsive to the output voltage of the driver terminal. The base of a transistor is coupled to the anode of the diode so that the transistor conducts current at its collector when there is a sufficiently large rate of change in the output voltage. The collector current of the transistor reduces a reference current applied to a current mirror.

Abstract: A control circuit for providing fast turn on of a PNP transistor in which a capacitor charging current is boosted and provided to the base of the PNP transistor. An embodiment of the invention provides a current amplifier in parallel with a current source for coupling to the base of the PNP transistor. The PNP transistor is connected to a positive voltage supply. A capacitor is also coupled to the positive voltage supply for delivering a charging current amplifier. In a further embodiment, an NPN transistor has its base coupled to the capacitor and its collector coupled to the base of the PNP transistor for providing the drive current boost. A diode may be coupled to the capacitor for passing a discharge current to the capacitor when the PNP transistor is off and to block the capacitor current when the PNP transistor is being switched on. A PNP drive transistor may be coupled between the collector of the NPN transistor and the base of the PNP transistor.

Abstract: A voltage regulator with a current limit circuit for limiting pass current in a pass transistor below a current limit threshold and a foldback circuit for lowering the current limit threshold when the voltage differential between the input and output terminals of the voltage regulator exceeds a foldback threshold, where the current limit threshold has a negative temperature coefficient, the current limit circuit comprising two transistors coupled to a sense resistor such that the difference in emitter-to-base voltages of the transistors is equal to the voltage drop of the sense resistor, where the collectors of the two transistors provides first and second currents to first and second resistors, respectively, where the first current is responsive to a pass current flowing through the sense resistor and decreases when the pass current increases, where the second current is independent of the pass current, and the foldback circuit provides a third current to the second resistor when the voltage differential bet

Abstract: A sleep switch connected to a ramp pin, an undervoltage lockout circuit and a hysteretic differential comparator for use in the undervoltage lockout circuit are disclosed. An integrated circuit has a comparator that receives a voltage from the ramp pin which it compares with a control voltage. The sleep switch connected to the ramp pin is activated when the ramp pin is below a predetermined voltage threshold at which point it puts the integrated circuit into a low power consumption sleep mode. The undervoltage lockout circuit includes a detection leg connected between the supply terminal and ground. A current supply is enabled when the voltage across a resistive portion of a detection leg rises above a first threshold. A differential comparator is responsive to the detection voltage for enabling the current supply. The differential comparator may include three transistors arranged to provide first and second detection thresholds so as to establish a hysteresis.

Abstract: A hysteresis generator for providing a comparator with a precision hysteresis reference input. An output of the comparator controls a switch which determines whether or not a reference current is applied to a resistor. The resistor is connected between a reference voltage and an input to the comparator. A buffer amplifier provides the reference voltage to the resistor. The reference current is taken from a second resistor connected between the output of the buffer amplifier and the input of a current mirror. The current mirror applies its output current to the first resistor. A diode may be inserted between the output of the buffer amplifier and the first resistor to make the hysteresis voltage generated by the current applied to the first resistor substantially temperature independent.

Abstract: A thermal shut down circuit with built-in temperature hysteresis, comprising first and second transistors configured as a bistable trigger circuit. The two transistors switch either a first or second emitter current through a bias resistor, thereby establishing a voltage hysteresis. By applying a reference voltage to the base of the first transistor, temperature dependent state transitions occur. A buffer transistor coupled to the collector of the second transistor allows the thermal shut down circuit to turn ON or OFF an auxiliary circuit. Thermal communication between the auxiliary circuit and the base-emitter junction of the first transistor allows the thermal shut down circuit to shut down the auxiliary circuit when the temperature exceeds a shutdown temperature, and thermal hysteresis built into the thermal shut down circuit prevents undesirable ON-OFF oscillation of the auxiliary circuit.

Abstract: An op amp clamp for charging or discharging a capacitor prevents the voltage on the capacitor from going beyond a reference voltage determined by a reference clamp voltage applied to an input of a differential amplifier. The second input of the differential amplifier is connected to the capacitor. The output of the differential amplifier is provided in a feedback loop to the capacitor. The feedback loop includes a charging circuit or a discharging circuit depending upon the function of the op amp clamp. The feedback loop may be arranged with a current mirror in which current generated by the output of the differential amplifier is mirrored in the charging or discharging circuit. A signal to activate charging or discharging is applied at the output of the differential amplifier to activate or deactivate the current mirror.

Abstract: A current slew rate limiter for limiting the rate at which current is applied to the base of an NPN output transistor. Current is applied to the output transistor base via a first output port of a current splitter. The current provided by the second output port of the current splitter is fed back to the input of the current splitter via an NPN current mirror and a PNP current mirror connected in series. A current limiting resistor is provided in at least one of the input and output circuits of the PNP current mirror to limit the maximum output current to the base of the NPN output transistor.

Abstract: A voltage clamp for protecting a load from transients in a supply line comprising pass transistors coupled to a bias circuit path. The bias circuit path determines the clamp turn-on voltage of the voltage clamp and comprises transistors configured as zener diodes and transistors configured as forward biased pn junctions. The pass transistors are coupled to the bias path so as to conduct current from the supply line to ground when the voltage drop across the bias circuit path reaches the clamp turn-on voltage. The collector-to-emitter voltage drops of the pass transistors during current conduction are equal to one another and sum up to the clamp turn-on voltage, and therefore, the pass transistors advantageously share equally the clamp turn-on voltage drop across their collector-to-emitter junctions. The bias circuit path is temperature compensated so that the clamp turn-on voltage is substantially independent of temperature.

Abstract: A totem pole driver with cross conductive protection and default low impedance state output employs a totem pole output formed by top and bottom output transistors. A first circuit path switches the bottom output transistor on or off in response to a switching signal. A second circuit path, slower than the first circuit path, switches the top output transistor on in response to the switching signal after the bottom output transistor is switched off. A third circuit path switches the top output transistor off in response to a sync signal known to lead the switching signal. An emergency voltage supply is made available to hold the bottom output transistor on and the top output transistor off if the regulated circuit voltage is lost.

Abstract: A programmable oscillator comprising a switching circuit, a first driver circuit, and a second driver circuit, the oscillator being programmable to switch at a first switching frequency or a second switching frequency by utilizing only one external capacitor and two external resistors. Only one driver circuit is active at a time to charge and discharge the capacitor at one of the switching frequencies. The driver circuits are made active or inactive by a control circuit.

Abstract: A latchable comparator including a comparator and a circuit having a reset input. When the comparator produces a first state, it is latched when the reset input is in the non-reset state. In this state, the comparator receives a comparison signal having a high or low value and a latch signal being outside the range of voltages extending between the low and high values. A reset signal causes the latch signal to be replaced by a comparator reference signal. Further disclosed is a latchable comparator including a comparator and a flip-flop. The comparator has a ramp input, a control input, a first reference input and a second reference input. The flip-flop provides latch signals to each of the first and second reference inputs when its reset input is in the non-reset state and said comparator is generating a first state and maintains the latch signals until a reset signal is received.

Abstract: A switching voltage controller with improved rejection of supply voltage transients, wherein the switching of the voltage controller is controlled by sensing the current through an inductor to provide a current sense signal proportional to the sensed current and comparing the current sense signal voltage to the voltage of a peak signal and the voltage of a valley signal. An error amplifier provides a control signal proportional to the voltage difference between the output voltage of the voltage controller and a reference voltage source. The switching voltage controller provides for improved rejection of transients in the supply voltage by forcing the valley signal to be a first voltage differential .DELTA.' volts below the control signal and the peak signal to be a second voltage differential .DELTA." volts above the control signal, where .DELTA." and .DELTA.' are functions of the supply voltage to the voltage controller such that the rate of change of .DELTA." and .DELTA.