Abstract: An output driver for providing a gate voltage to an external positive-channel field-effect transistor (PFET) device. A capacitor accumulates charge which, upon switching by an input switching signal, is applied, in addition to the supply voltage, to the base of a drive circuit NPN transistor to rapidly pull the PFET gate voltage, derived at the emitter of the drive circuit NPN transistor, up to the supply voltage. An active voltage limiter, coupled in parallel with the drive circuit, limits excursion of the gate voltage with respect to the supply voltage.

Abstract: A pulse width modulator that provides a square wave signal whose duty cycle is proportional to a control voltage and inversely related to the power supply voltage applied to the circuit. The pulse width modulator compensates the output voltage applied across a load for variations in the power supply voltage.

Abstract: A negative input voltage comparator that compares a negative input voltage signal against a positive voltage signal in a circuit, such as an integrated circuit. The negative input voltage signal is effectively isolated from the circuit by means of a series resistor in the base-emitter circuit of a transistor which is connected in the output leg of a current comparator.

Abstract: A circuit providing start-up capability and foldback protection to a voltage regulator. A start-up circuit provides a start-up signal to initiate current flow to a load and also provides a foldback signal to set a current limit threshold under an over-load or short-circuit condition. A signal generator circuit operating on the regulated output voltage of the voltage regulator provides a current limit signal and a start-up control signal. The start-up circuit provides the start-up signal in response to the start-up control signal. The current limit signal sets the current limit threshold under normal operating conditions after start-up.

Abstract: A method and circuit for reducing the leading edge spike in a current sense signal. The current sense signal is a measure of the current through a switched power device controlled by a switching regulator controller. The slew rate of the current sense signal is limited to prevent the slew rate from exceeding a predetermined maximum. The limited slew rate signal is provided to the switching regulator controller. A transconductance amplifier may be used to limit the slew rate of the current sense signal. A capacitor at the output of the transconductance amplifier contributes to controlling the maximum slew rate of the amplifier. The capacitor is charged by the current output of the amplifier to provide a voltage signal for use in place of the original current sense signal. A switch may be provided for selecting between the slew rate limited current sense signal and the original current sense signal.

Abstract: A low voltage indicator circuit including a self-biased driver circuit. A voltage at the output terminal is used to create a bias voltage to operate the driver when less than a threshold voltage is present on at least one voltage supply line. A transistor for supplying base drive current to the driver has a base coupled to the at least one voltage supply line in one embodiment and to the bias circuit in other embodiments. The transistor in the one embodiment provides base drive current to the driver when voltage on the at least one voltage supply line is less than the voltage on the output terminal by at least a predetermined amount. In other embodiments, the bias circuit may include a FET or resistor coupled between the output terminal and the base of a bias circuit transistor. The bias circuit transistor has a terminal connected to a bias resistor for providing current through the bias resistor when the bias circuit transistor is turned on.

Abstract: An overcurrent limit circuit in which the output transistor and current sense transistor share a common collector and common base. A reference voltage is compared with a voltage derived from a current sense resistor. The circuit limits the current to the base of the output transistor in response to the reference voltage threshold being reached at the current sense resistor. A Vbe comparator comprised of two transistors may be used with a first bias current to both transistors and a second bias current to one of the two transistors.

Abstract: A transistor overcurrent protection circuit using an error amplifier to make a voltage comparison between a threshold voltage and the collector voltage of a current sensing transistor. The current sensing transistor is arranged in a circuit such that the collector current of the current sensing transistor is a measure of the collector current of an output transistor. A driver transistor has its emitter connected to the base of the output transistor. A source of control current to the drive transistor is coupled to the output of the error amplifier. When the collector voltage of the current sense transistor falls below the threshold voltage, the error amplifier causes the control current to the drive transistor to be reduced so as to reduce the collector current of the output transistor.

Abstract: An error detection circuit having an output transistor of one conductivity type and a sense transistor and error detector transistor of an opposite conductivity type. An input voltage is provided at the collector of the output transistor and an output voltage is taken from the emitter of the output transistor. An emitter of the sense transistor is connected to the input voltage and the collector of the sense transistor is connected to the base of the output transistor. An emitter of the error detector transistor is connected to the collector of the sense transistor and a base of the error detector transistor is connected to the base of the sense transistor. The error detector transistor conducts when the sense transistor saturates indicating that the input voltage and output voltage have come within a predetermined voltage of one another.

Abstract: A threshold controlled circuit in which hysteresis precedence is ensured by greatly enhancing the gain of the hysteresis loop with respect to the regulator control loop. The number of gain stages in the hysteresis loop exceeds the number of gain stages in the control loop. In order to ensure hysteresis precedence, the gain of the hysteresis loop times the regulator control shutdown current must exceed the gain of the control loop multiplied by the hysteresis current.

Abstract: In the transistor power output stages disclosed herein, short-circuit protection is provided with respect to output terminals through which a reversible motor or other load is to be energized. An output stage connected between the load and one of the supply leads provides current gain for energizing the load at a current level which is a function of the level of drive current provided to the output stage. Drive current is provided only at a first level independently of the voltage at the output terminal and a sensing means provides drive current at an increased level when the voltage at the output terminal is in a normal range, e.g. close to the voltage at the respective supply lead.

Abstract: A method for powering up an integrated circuit and circuit for implementing the method. A first charging current is used to slowly charge a capacitor used in the integrated circuit upon connecting the power. A power-up signal is provided to initialize digital circuitry until the first charging current raises the voltage of the capacitor above a threshold value. Once a capacitor is charged to another predetermined threshold, a second charging current is activated. The two charging currents are thereafter used as the total charging current on the capacitor. If the capacitor is grounded, the initial power-up scheme is re-initiated.

Abstract: A positive temperature coefficient current source having reduced reference current requirements. The output transistors are each buffered by another transistor in a Darlington pair configuration. The reference current required for the circuit is reduced while maintaining a positive temperature coefficient for the current source.

Abstract: A power factor correction circuit in which a divided-down version of a rectified input waveform is sampled approximately at its peak by a sample-and-hold circuit. The peak value is then processed to produce a correction signal which is subtracted from the original divided down rectified signal. This produces a reference signal which is then multiplied by the output of an error amplifier to produce a sinusoidal reference signal for the input current. The output of the error amplifier which is used is that which is sampled periodically when the divided-down rectified signal approaches zero volts. The sinusoidal reference is used by peak and valley comparators whose other inputs come from a current sense amplifier. The outputs of the comparators are used to switch a shunting transistor which controls the input current to achieve near unit y power factor.

Abstract: The one-shot multivibrator disclosed herein provides precise timing at high speed by controlling the charging and discharging of a timing capacitor over a voltage swing which is compensated so as to be essentially independent of any temperature-dependent offset voltages such as base-emitter drops.

Abstract: In the voltage controlled oscillator disclosed herein, the charging and discharging of a timing capacitor is controlled by a differential input comparator which establishes precisely defined switching thresholds. The comparator input circuit is provided with an internally generated, temperature compensated input bias current which substantially relieves the timing components from providing bias current, thereby facilitating a wide range of operation.

Abstract: A circuit for decreasing the minimum duty ratio of a switching element in a power converter in response to a signal indicating that sensed current exceeds a second threshold. The circuit turns off the switching element when the sensed current exceeds a first threshold. The minimum duty ratio may be decreased, for example by increasing the period of the switching element or by increasing the "off" time of the switching element. The circuit protects against current runaway.

Abstract: A supply bias circuit in which supply current is provided through a resistor coupled to a timing circuit such that this resistor acts as a low pass filter in conjunction with the timing capacitor. Supply current is passed from the timing current through a second resistor and into logic circuitry. The logic circuitry is further connected to the timing circuitry so that it receives extra current each time the capacitor discharges.

Abstract: The under voltage lockout circuit disclosed herein is useful in a switching mode power supply of the type which, in operation, powers its own regulator circuitry. The lockout circuit operates to inhibit energization of the power supply, including its own regulator, until a voltage reference is established which can control the operation of a comparator which monitors the supply voltage available to the regulator circuitry.

Abstract: In the voltage controlled current source disclosed herein, temperature compensation is provided by offsetting base emitter voltage drops in a pair of bipolar transistors of complementary conductivity types. The control voltage is applied through a resistor to the emitter of a first transistor connected in common base mode. The base voltage of the first transistor is obtained from the emitter of a transistor of complementary conductivity type, the base of which is connected to a stable voltage source. The collector current of the first transistor is then applied to a current mirror to obtain an output current which is highly proportional to the control voltage.