Patents Assigned to Chunghwa Precision Test Tech. Co., Ltd.
  • Patent number: 9970960
    Abstract: A probe having a sliding rail is provided and includes a probe head, a probe tail, an elastic element made of an elastic material and connected between the probe head and the probe tail, and a sliding rail assembly. The sliding rail assembly includes a slide rail and a position limit protrusion. The slide rail has a fixed end and a free end. The fixed end is fixedly connected to the probe tail, and the free end extends to the probe head. The position limit protrusion is fixedly connected to the probe head, and has a sliding slot formed thereon through which the slide rail can pass. The sliding rail assembly is made of a conductive material, and a cross-section area of the slide rail is greater than a cross-section area of the elastic material of the elastic element.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: May 15, 2018
    Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventor: Chih-Peng Hsieh
  • Publication number: 20180059140
    Abstract: A probe device of a vertical probe card is provided and includes a die assembly and at least one pin assembly. The die assembly includes a first die, a second die, and a middle die disposed between the first die and the second die. The at least one pin assembly has a first pin, a second pin, and at least one electrical connector. The at least one electrical connector is connected to the first pin and the second pin. The at least one pin assembly is electrically contacted with at least one contact pad of a device under test. The at least one contact pad leans against the at least one pin assembly, so that the at least one pin assembly generates a deformation in a longitudinal direction.
    Type: Application
    Filed: February 17, 2017
    Publication date: March 1, 2018
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH
  • Publication number: 20180017593
    Abstract: A probe structure is provided, including two probe heads for electrically contacting with the two objects, respectively, an elastic buffer portion forming a hollow space therein, a conductive portion being disposed within the hollow space and thereby being surrounded by the elastic buffer portion, and having two ends respectively electrically being connected to the two probe heads. When the two probe heads do not contact with the two objects electrically, the conductive portion is linearly extended between the two probe heads.
    Type: Application
    Filed: February 8, 2017
    Publication date: January 18, 2018
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH, Chih-Peng HSIEH
  • Publication number: 20170367183
    Abstract: A circuit board with via capacitor structure is introduced herein, including a base, a deposition layer, disposed on the base, having at least a via in the deposition layer, at least a thin film capacitor, each thin film capacitor disposed in each via, each thin film capacitor having a body, a second terminal, and a first terminal, the second terminal and the first terminal located on two opposite sides of the body; at least a first electrode, each first electrode electrically connected to the first terminal of each thin film capacitor; and at least a second electrode, each second electrode electrically connected to the second terminal of each thin film capacitor.
    Type: Application
    Filed: January 12, 2017
    Publication date: December 21, 2017
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wen Tsung LI, Kai Chieh HSIEH, I Hsing WENG
  • Publication number: 20170332490
    Abstract: A support structure located at a bottom of a ball grid array (BGA) is provided. The support structure includes a printed circuit board (PCB) having first positioning pin holes, an interface plate having second positioning pin holes which correspond to the first positioning pin holes arranged on the PCB, a support film arranged on the PCB and having support portions, and positioning components penetrating the first positioning pin holes and the second positioning pin holes corresponding to the first positioning pin holes to assemble the support film on the PCB and the interface plate.
    Type: Application
    Filed: February 17, 2017
    Publication date: November 16, 2017
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Yung-Tai SU, Ching-Fang CHENG, Ti-Chiang CHIU
  • Publication number: 20140084955
    Abstract: A fine pitch interposer structure includes a Multi-core base substrate and a plurality of buildup laminates. A surface of each Multi-core base substrate has a first circuit layer, and a second circuit layer which is electrically connected to the first circuit layer. The buildup laminates are stacked on the surface of the Multi-core base substrate. Each buildup laminate includes a photosensitive dielectric layer, and a plurality of blind vias with a pre-determined interval therebetween which are correspondingly arranged on each of the plurality of vias formed on the photosensitive dielectric layer. The blind vias are electrically connected to the first circuit layer. At least one blind via of one buildup laminate is superimposed on another blind via of another buildup laminate.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 27, 2014
    Applicant: CHUNGHWA PRECISION TEST TECH CO., LTD.
    Inventors: YUAN-CHIANG TENG, KAI-CHIEH HSIEH, WEN-TSUNG LEE
  • Patent number: 8264249
    Abstract: The present invention provides on IC test substrate for testing various signals, a combined flexible and rigid PCB included in the structure is applicable to perform a mission including for example: stabilizing power input/output, signal transfer by a connector; general, power, and high frequency signal transmission in preserved integrity state.
    Type: Grant
    Filed: August 2, 2009
    Date of Patent: September 11, 2012
    Assignee: Chunghwa Precision Test Tech. Co., Ltd.
    Inventors: Wen-Tsung Lee, Kuan-Chun Tseng
  • Publication number: 20120187972
    Abstract: A wafer level testing structure, disposed between a wafer and a prober, for transmitting the electrical signal of the wafer to the prober, the wafer level testing structure includes: a socket and a probe interface board disposed between the socket and the prober, wherein the probe interface board is electrically coupled to the prober, and a plurality of pogo pins is inserted through the socket, and one end of the plurality of pogo pins is electrically coupled to the wafer, the other end of the plurality of pogo pins is electrically coupled to the probe interface board, thereby the electrical signal of the wafer transmits from the probe interface board to the prober.
    Type: Application
    Filed: September 25, 2011
    Publication date: July 26, 2012
    Applicant: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventor: WEN-TSUNG LEE