Abstract: A combination standoff and LED includes a surface mount solder standoff which can be either threaded or unthreaded, and a surface mount LED disposed and fixed in the center of the base of the standoff. The combination standoff and LED is adapted to receive a lightpipe via the either threaded or unthreaded portion of the surface mount solder standoff. This combination standoff and LED results in a single piece of hardware which simplifies the physical PCBA layout design and removes any Computer Aided Design (CAD) placement errors that would normally be present if two separate hardware components were placed together manually.

Abstract: Systems and methods implemented in a network element in a Segment Routing network include, for a service having two or more candidate paths and responsive to a failure on a current candidate path of the two or more candidate paths, setting an eligibility flag for the current candidate path; and selecting another candidate path of the two or more candidate paths, for the service, based on their eligibility flag.

Abstract: A Printed Circuit Board (PCB) and methods for manufacturing the PCB board are provided. The PCB includes a plurality of layers; a signal pad, at a first layer of the plurality of layers, connected to a signal transmission trace strip line, at a second layer of the plurality of layers, wherein the signal pad is configured to connect to a surface mount Radio Frequency (RF) connector that is configured to interface an RF signal with the signal pad; a PCB ground cage structure through the plurality of layers, surrounding the signal pad; and extended ground reference planes located at the first layer and a third layer of the plurality of layers, wherein the extended ground reference planes extend into a volume of the PCB ground cage structure.

Abstract: An apparatus comprises circuitry configured to generate a predicted error signal by applying to a digital signal a distortion model characterized by parameters configured to model circuit component mismatches in a digital-to-analog converter (DAC), circuitry configured to generate a pre-compensated digital signal using the digital signal and the predicted error signal, and circuitry configured to provide the pre-compensated digital signal to the DAC for conversion into an analog signal.

Abstract: Systems and methods include detecting a fast fiber transient on a span based on analyzing power data, wherein the power data is for any of optical wavelengths of traffic channels, optical service channel (OSC) wavelengths, and telemetry from a network element; and responsive to detecting the fast fiber transient, causing an optical time domain reflectometer (OTDR) trace on the span with a specific configuration based on the fast fiber transient.

Abstract: A node in a Segment Routing network includes circuitry configured to signal first service Segment Identifiers (SIDs), for one or more first Ethernet services configured at the node, to other nodes in the Segment Routing network, receive second service SIDs for one or more second Ethernet services configured at the other nodes in the Segment Routing network, and configure the second service SIDs for one or more second Ethernet services. The first service SIDs and the second service SIDs can be signaled by one of Interior Gateway Protocol (IGP) and Border Gateway Protocol (BGP).

Abstract: Systems and methods for micro-loop avoidance include detecting a remote link failure in a network and identifying an associated Point of Local Repair (PLR); determining destinations in the network that are impacted due to the remote link failure; and installing of a temporary tunnel to the PLR. The steps can further include sending traffic destined for nodes impacted by the remote link failure via the temporary tunnel to the PLR. The temporary tunnel can be implemented by a node Segment Identifier (SID) for the PLR.

Abstract: A Provider Edge (PE) node includes a plurality of ports including an inter-chassis port to a second PE node, a port connected to a root node, and one or more ports connected to leaf nodes, wherein the plurality of ports are in an Ethernet Tree (E-Tree), and wherein the root node is dual-homed to the PE node and the second PE node; switching circuitry configured to switch traffic between the plurality of ports; and circuitry configured to designate the inter-chassis port as one of a leaf node and a root node in the E-Tree instance, and manage a designation of the inter-chassis port based on a status of the port connected to the root node. The designation is changed in a data plane instead of in a control plane.

Abstract: A lazy graph construction with compression includes receiving a query related to a network; one of generating a site graph for the network and accessing the site graph already in memory; performing a search on the site graph based on the query; accessing data in a database and generating, in the memory, a plurality of sub-graphs using the data, for the query; and providing a solution to the query based on the search and a search of the plurality of sub-graphs. The site graph can be at a site level and includes network elements and associated connections in the network, and the plurality of sub-graphs can be at an intra-site level including any of component-to-component connections and intra-component connections.

Abstract: An apparatus includes a plurality of layers arranged on top of one another and including at least one ground layer and a signal layer; a first set of signal pads and a second set of signal pads on the signal layer; and a slot formed in the at least one ground layer between the first set of signal pads and the second set of signal pads. The apparatus can include an optical assembly housed by the plurality of layers and connected to the first set of signal pads and the second set of signal pads. The optical assembly can include a micro Intradyne Coherent Receiver (?ICR), a Coherent Driver Modulator (CDM), or a Coherent Optical Subassembly (COSA).

Abstract: A stress compensating pick-up tool for aligning a companion chip with a host chip includes a tool tip and an actuator. The tool tip holds the companion chip, and includes a first tip portion and a second tip portion. The actuator applies a force to the tool tip, wherein the force causes the first tip portion and the second tip portion to rotate in opposite directions with respect to one another to optically align a portion of the companion chip with a corresponding portion of the host chip.

Abstract: An optical interface includes circuitry configured to operate the optical interface at a first rate, subsequent to a requirement to suberate the optical interface to a second rate, determine which services are affected, signal a partial failure for the one or more affected services, and operate the optical interface at a second rate that is less than the first rate. The optical interface can be a Flexible Optical (FlexO) or ZR interface.

Abstract: A hollow core fiber (HCF) link is characterized by structural properties selected to support and sustain light propagation in a fundamental mode and in at least one higher-order mode. Connected to a proximal end of the HCF link, there is a mode coupler configured to couple a data signal into the fundamental mode and to couple an obfuscating signal into the at least one higher-order mode for simultaneous propagation of the data signal and the obfuscating signal on the HCF link, where the obfuscating signal substantially overlaps the data signal in spectral content. At a distal end of the HCF link, there is a mode splitter configured to split a first optical signal detected in the fundamental mode from a second optical signal detected in the at least one higher-order mode.

Abstract: A modular optical add/drop system supporting a Colorless, Directionless, and Contentionless (CDC) architecture includes a first Contentionless Wavelength Selective Switch (CWSS)-based optical add/drop device; and one or more channel pre-combiners each having a common port with a transmit port and a receiver port, at least two local add/drop ports, components configured to combine channels between the at least two local add/drop ports and the common port, and a splitter and a combiner connected to the common port, wherein a first output of the splitter and the combiner is connected to the first CWSS-based optical add/drop device. The modular optical add/drop system can further include a second CWSS-based optical add/drop device, wherein a second output of the splitter and the combiner is connected to the second CWSS-based optical add/drop device.

Abstract: An integrated circuit can include one or more photonic layers that include a plurality of photonic integrated circuit portions. A first optical coupler is configured to couple an optical mode of an optical wave to a first photonic integrated circuit portion in the one or more photonic layers. A second optical coupler is configured to couple an optical mode of an optical wave to a second photonic integrated circuit portion that is optically uncoupled to the first photonic integrated circuit portion. The second photonic integrated circuit portion comprises a polarization-sensitive photonic component, and an optical splitter comprising at least one input port optically coupled to the polarization-sensitive photonic component and at least two output ports including a first output port and a second output port.

Abstract: An optical transmitter device (14) includes a digital signal processor ‘DSP’ (20) having digital hardware (30). The DSP is operative to generate (102,202,302) shaped bits from a first set of information bits, and to apply (104,204,304) a systematic forward error correction ‘FEC’ scheme to encode the shaped bits and a second set of information bits, where the first set of information bits and the second set of information bits are disjoint sets. Unshaped bits and the shaped bits are mapped to selected symbols or are used to select symbols from one or more constellations. The selected symbols are mapped to physical dimensions. Each unshaped bit is either one of the second set of information bits or one of multiple parity bits resulting from the FEC encoding. In this manner, a target spectral efficiency is achieved.

Abstract: A node configured to operate in a network that operates one or more of Internet Protocol version 6 (IPv6) and Segment Routing over IPv6 (SRv6), the node includes circuitry configured to determine a packet is to be sent to a second node in the network, with both the node and the second node utilizing Reduced Mode micro-Segment Identifiers (uSIDs), and include an identifier in an IPv6 header of the packet denoting a destination address of the packet includes uSIDs. The circuitry can be further configured to include the identifier responsive to a determination the second node supports the identifier.

Abstract: Systems and methods in a node in an MPLS network include determining a plurality of services supported at the node; determining a bitmask to represent the plurality of services supported at the node, wherein the bitmask includes a starting service and each subsequent bit representing another service of the plurality of services and with each bit in the bitmask set based on the plurality of services supported at the node; and transmitting an advertisement to other nodes in the network with the bitmask based on the plurality of services supported at the node. The steps can further include transmitting a packet associated with a service of the plurality of services with an MPLS label stack including one or more transport labels for a destination of the packet, a service label identifying the service, and a source label identifying a source Internet Protocol (IP) address of the packet.

Abstract: A transmitter generates a first electrical signal comprising a first low-frequency signal, an empty period, and a pump pulse having a first frequency; and a second electrical signal comprising a second low-frequency signal and at least two probe pulses, each probe pulse having a second frequency that differs from the first frequency. The transmitter modulates first and second optical subcarriers having different polarizations using the first and second electrical signals, respectively. The transmitter generates an optical signal from the first and second optical subcarriers, wherein the first and second low-frequency signals overlap in time, wherein the empty period overlaps in time with one of the probe pulses, and wherein the pump pulse overlaps in time with another one of the probe pulses. The optical signal is detected at a receiver over an optical link, and the receiver uses the optical signal to estimate nonlinear phase shift in the optical link.

Abstract: Systems and methods for incrementally eliminating Border Gateway Protocol—Labeled Unicast (BGP-LU) in a multi-region network include receiving BGP-LU updates from one or more Area Border Router (ABR) nodes in a multi-region network with the ABR nodes between two areas including a first area utilizing Segment Routing without utilizing BGP-LU and a second area utilizing BGP-LU; and, responsive to a request from a first node in the first area to reach a second node in the second area, providing a Segment Identifier (SID) list to the first node where the SID list is determined based on the Segment Routing in the first area and the BGP-LU updates from the second area.