Patents Assigned to Cirrus Logic, Inc.
  • Patent number: 11658559
    Abstract: A system may include a power converter configured to receive an input voltage and generate an output voltage and a controller configured to control operation of the power converter based on a comparison of a current associated with the power converter to a threshold current and control the threshold current as a function of the input voltage.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Graeme G. Mackay, Jason W. Lawrence
  • Patent number: 11656711
    Abstract: Embodiments described herein relate to methods and apparatuses for configuring a plurality of virtual buttons on a device. For example, each of the plurality of virtual buttons may be activated or deactivated based on a mode of operation of the device. By activating and deactivating different combinations of the plurality of virtual buttons depending on the mode of operation of the device, the inadvertent engagement of virtual buttons which would otherwise not be used in that mode of operation may be avoided.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Thomas Lorenz, Anthony Stephen Doy
  • Patent number: 11659326
    Abstract: A method, comprising: obtaining one or more accelerometer signals derived from an accelerometer; and determining one or more parameters of wind at the accelerometer based on the one or more accelerometer signals.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Vitaliy Sapozhnykov, Thomas I. Harvey, Hock Lim, David Watts
  • Patent number: 11658673
    Abstract: The present disclosure relates to circuitry comprising: digital circuitry configured to generate a digital output signal; and monitoring circuitry configured to monitor a supply voltage to the digital circuitry and to output a control signal for controlling operation of the digital circuitry, wherein the control signal is based on the supply voltage.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Ross C. Morgan, Tahir Rashid, Jonathan Taylor
  • Patent number: 11658623
    Abstract: The present disclosure relates to Class D amplifier circuitry comprising a mode controller configured to dynamically adjust an operational switching mode of the Class D amplifier over a range between a Class AD mode and a Class BD mode.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Toru Ido
  • Patent number: 11653855
    Abstract: A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: May 23, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Yanto Suryono, Toru Ido
  • Patent number: 11652405
    Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, John L. Pennock, Peter J. Frith
  • Patent number: 11653150
    Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, Mark James McCloy-Stevens, John Bruce Bowlerwell, Yanto Suryono, Xin Zhao, Morgan Timothy Prior
  • Patent number: 11651168
    Abstract: This application relates to computing circuitry, and in particular to analogue computing circuitry suitable for neuromorphic computing. An analogue computation unit for processing data is supplied with a first voltage from a voltage regulator which is operable in a sequence of phases to cyclically regulate the first voltage. A controller is configured to control operation of the voltage regulator and/or the analogue computation unit, such that the analogue computation unit processes data during a plurality of compute periods that avoid times at which the voltage regulator undergoes a phase transition which is one of a predefined set of phase transitions between defined phases in said sequence of phases. This avoids performing computation operations during a phase transition of the voltage regulator that could result in a transient or disturbance in the first voltage, which could adversely affect the computing.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 11652406
    Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes, two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/?3VV, +/?VV/5 or +/?VV/6.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Peter J. Frith, John L. Pennock
  • Patent number: 11652455
    Abstract: A signal processing system may include a signal path and a chop management circuit. The signal path may comprise a chopper configured to chop a differential input signal to the signal path at a chopping frequency and a low-pass filter downstream of the chopper and configured to filter out intermodulation products of a direct current offset of the signal path and intermodulation products of an aggressor on the differential input signal in order to generate an output signal. The chop management circuit may be communicatively coupled to the chopper and configured to, based on operational parameters associated with the signal path, dynamically manage energy of one or more clock signals used to define the chopping frequency.
    Type: Grant
    Filed: February 11, 2021
    Date of Patent: May 16, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Ravi K. Kummaraguntla, Christophe J. Amadi, John L. Melanson, Axel Thomsen, John C. Tucker, Eric J. King
  • Patent number: 11644493
    Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Saurabh Singh, Chandra B. Prakash, Eric Kimball, Cory J. Peterson, Ryan Lobo
  • Patent number: 11644521
    Abstract: Circuitry comprising: a voltage monitoring path; a current monitoring path; a reference element of a predefined impedance; and processing circuitry, wherein in operation of the circuitry in a calibration mode of operation: the voltage monitoring path is operative to output a signal indicative of a voltage across the reference element in response to a reference signal applied to the reference element; the current monitoring path is operative to output a signal indicative of a current through the reference element in response to the reference signal; and the processing circuitry is operative to: receive the signal indicative of the voltage across the reference element and the signal indicative of the current through the reference element; generate an estimate of an impedance of the reference element; and determine a compensation parameter for an element of the circuitry for compensating for a difference between the estimate of the impedance and the predefined impedance of the reference element.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Ryan A. Hellman, Viral Parikh, Siddharth Maru, Tejasvi Das
  • Patent number: 11644494
    Abstract: Circuitry for driving a load, the circuitry comprising: driver circuitry; load sensing circuitry; and a parameter estimation engine, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal supplied to the driver circuitry, and wherein the circuitry is operable to perform a calibration operation in which the parameter estimation engine generates a circuit parameter for use in the load sensing mode based, at least in part, on a signal generated by the circuitry in response to a calibration stimulus signal supplied to the driver circuitry.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Chandra B. Prakash, Tejasvi Das, Siddharth Maru
  • Patent number: 11644370
    Abstract: A system for performing force sensing with an electromagnetic load may include a signal generator configured to generate a signal for driving an electromagnetic load and a processing subsystem configured to monitor at least one operating parameter of the electromagnetic load and determine a force applied to the electromagnetic load based on a variation of the at least one operating parameter.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Emmanuel Marchais, Kathryn Rose Holland, Carl Lennart Ståhl, Eric Lindemann
  • Patent number: 11646708
    Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry comprises amplifier circuitry configured to receive a drive signal and to output an output signal, based on the drive signal, to the piezoelectric transducer, a variable capacitor configured to be coupled in series with the piezoelectric transducer, and control circuitry. The control circuitry is configured to control a capacitance of the variable capacitor to compensate for hysteresis in the piezoelectric transducer and to control a gain of the amplifier circuitry to compensate for signal attenuation caused by the variable capacitor.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: May 9, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: John P. Lesso, Toru Ido
  • Patent number: 11641546
    Abstract: A method for minimizing post-playback oscillation during playback of a haptic playback waveform to a haptic transducer may include determining whether a frequency response of the haptic playback waveform has a notch with a notch frequency at approximately a resonant frequency of the haptic transducer and, responsive to the notch frequency differing from the resonant frequency, modifying the haptic playback waveform for playback to the haptic transducer by shifting the notch frequency to approximately the resonant frequency.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: May 2, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Kok Chin Chang, Marco Janko, Kyle Wilkinson
  • Patent number: 11641558
    Abstract: A method and apparatus for detecting a microphone condition of a microphone, the method comprising: applying an electrical stimulus to a microphone; measuring an electrical response to the electrical stimulus at the microphone; comparing the electrical response to an expected response; and determining the microphone condition based on the comparison.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: May 2, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Anindya Bhattacharya, Bhoodev Kumar, Jaimin Mehta, Yongsheng Shi, Aleksey S. Khenkin, John L. Melanson
  • Patent number: 11639911
    Abstract: The present disclosure relates to circuitry for determining a temperature coefficient value of a resistor. The circuitry comprises circuitry for supplying an AC current signal to the resistor, circuitry for measuring a first voltage across the resistor when the AC current signal is supplied; and processing circuitry configured to determine the temperature coefficient value based on the first voltage.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: May 2, 2023
    Assignee: Cirrus Logic, Inc.
    Inventors: Ravi K. Kummaraguntla, Kathryn R. Holland
  • Patent number: 11638078
    Abstract: There is described a switchable microphone device which may be switched between a digital output mode and an analog output mode. There is further described a system for use of such a device, which allows for the switching between analog and digital computing modes.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: April 25, 2023
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso