Abstract: In accordance with an embodiment of the present invention, a fax decoding/re-encoding system for transferring fax images between a sending fax machine and a receiving fax machine includes a decoder responsive to an encoded fax image defined by rows of scan lines. The decoder decodes the scan lines of the encoded fax image and generates run-length representation of the encoded fax image. A scanline manipulation device is responsive to the run-length representation for manipulating the same and generating a manipulated fax image without generating a bitmap of the encoded fax image. The fax decoding/re-encoding system further including a re-encoder responsive to said manipulated fax image and adaptive to generate a re-encoded fax image that is substantially the same as the encoded fax image, wherein the fax decoding/re-encoding system avoids the need for a bitmap for generating a re-encoded fax image thereby substantially reducing re-encoding time.

Abstract: Methods and apparatus are provided improving data access efficiency in a storage area network. Mechanisms are provided to allow a virtual disk address to be efficiently mapped to a particular physical partition in a virtual disk while recognizing the mirroring, striping, and concatenation characteristics associated with the virtual disk. A variety of indices are used to allow direct access of a physical partition upon identification of a virtual disk address.

Abstract: A wireless computer data network includes several untethered mobile units that make ad-hoc data connections with an Internet-connected base station using the IEEE-802.11a standard. Each unit includes a radio transceiver fully integrated on a single semiconductor chip. The receiver portion is a double-conversion superheterodyne type, and shares the same intermediate and local oscillator frequencies with a two-stage up-conversion transmitter. Two on-chip synthesizers that each include a voltage-controlled oscillator and phase-locked loop can be operated independently for each conversion stage, or operated in offset mode. External reference frequencies can be injected for voltage-controlled oscillator and phase-locked loop testing, chip characterization, and automatic compensation modeling. Each mobile and base unit can be outfitted with transmit/receive antenna transfer switches, RF-power amplifiers, and low-noise receiver amplifiers to increase operating range.

Abstract: Provided is a method and apparatus for inband testing of an echo canceller. The apparatus includes a signal generator for generating an excitation signal including a preamble portion and a test portion. The echo canceller receives the excitation signal at a decoder. The decoder differentiates the preamble from the test portion and obtains control information by decoding the preamble portion. A controller configures the echo canceller during testing according to the control information obtained from the preamble portion. A strength of the present invention is that the preamble portion allows precise control of the echo canceller during testing by synchronizing the test control to the location of the preamble. This allows exacting control of the echo canceller during testing to within a single sample time of the excitation signal, e.g., 125 microseconds.

Abstract: An apparatus in a node of a wireless network for setting the data rate for sending data to a remote node, and a method for setting the data rate. The method includes receiving a packet from the remote node, determining a measure of signal quality for the received packet; and selecting the data rate for communicating to the remote node according to at least the determined signal quality. The measure of signal quality is a measure of the EVM of the received packet. One implementation conforms to one or more variants of the IEEE 802.11 standard that uses OFDM packets.

Abstract: Devices, software and methods are provided for determining a quality of service for a Voice over Internet Protocol (VoIP) connection. A round trip time of packets is measured between the devices that are exchanging voice data. In addition, at least one performance parameter is determined, such as packet delay or packet loss. A quality of service is then determined from the round trip time and the performance parameter.

Abstract: A frequency synthesizer, a calibrator thereof, and an operating controller thereof are described. The synthesizer comprises a main charge pump that drives a voltage controlled oscillator (VCO) through a loop filter. The calibrator includes a second, replica charge pump that can also drive the VCO, but is set up to output only its maximum or minimum analog output control voltage. Since the construction and characteristics of the replica charge pump duplicate the main charge pump, the main charge pump's minimum and maximum analog control outputs can be cloned out to the VCO on demand. A VCO calibration procedure therefore includes switching the VCO to each of its ranges set by a bank of fixed capacitors, and using the replica charge pump to drive the VCO to its minimum and maximum frequency for each range setting.

Abstract: A converter to convert an N-bit input in a linear scale to an M-bit output in a logarithmic scale. The converter includes a set of K subrange converters each coupled to a respective number of bits of the N-bit input that represents a subrange of the N-bit input, each subrange converter to convert the subrange into a respective output that would be the M-bit output if the most significant set bit in the N-bit input was in the subrange. The converter further includes a range selector having the N-bit input as an input, to indicate which of the subranges to select for an output, and a selector having as inputs the outputs of the subrange converters and coupled to the range selector to select the output of one of the subrange converters as the M-bit output. In one embodiment, the converters operate in parallel.

Abstract: A system and method for the switching of control between redundant controllers is presented. The status of the redundant controllers is monitored to determine if switching of control between controllers is required. The monitoring and switching system is hardware based with control being implemented via a state machine.

Abstract: A novel and useful mechanism of synchronizing and aligning a plurality of data streams. The invention comprises a plurality of sync machines and an alignment circuit which in combination function to synchronize and align multiple variable length cell streams. Each sync machine is operative to control the output clocking of a corresponding FIFO queue. The data stream output of each FIFO queue is monitored by a sync machine and all the sync machines are coupled to the alignment circuit. In operation, the sync machines synchronize to the cells by searching for the error checks sequence (ECS) at the end of each cell. Upon synchronization being achieved for all the data streams, the alignment circuit causes each sync machine to freeze its respective FIFO until the ECS arrives on the data stream most delayed in time. Once the ECS is received on the slowest data stream, the alignment circuit releases the hold and consequently the FIFOs are released by the sync machines.

Abstract: The invention replicates a packet requiring high availability and transmits it from two or more ports of a switch, for example a wiring closet Layer 2 switch. The parent packet carries a unique sequence number. The copies of the packet each carry the parent packet's unique sequence number. Each copy of the packet then travels on separate pathways through routers (Layer 3 network devices). The pathways are maintained separate by assigning high costs in a LSP routing sense to links connecting the two paths, and by assigning low costs to links along the desired paths. The two identical packets converge on the destination station. The destination station accepts the first packet with a particular sequence number, and discards any later packets with the same sequence number. In the event that a link in one path has a catastrophic failure, then the packet travelling along the other path reaches the destination station and service remains operative without interruption.

Abstract: An apparatus and technique off-loads responsibility for maintaining order among requests directed to a same address on a split transaction bus from a processor to a split transaction bus controller, thereby increasing the performance of the processor. The present invention comprises an ordering circuit that enables the controller to defer issuing a subsequent (write) request directed to an address on the bus until a previous (read) request directed to the same address completes. By off-loading responsibility for maintaining order among requests from the processor to the controller, the invention enhances performance of the processor since the processor may proceed with program execution without having to stall to ensure such ordering. The ordering circuit maintains ordering in an efficient manner that is transparent to the processor.

Abstract: A novel and useful apparatus for and method of in-band clock compensation for use in synchronous communication systems. The clock compensation mechanism is implemented in each module and is operative to compensate for the differences between the clocks among the various modules in the system. The mechanism operates in band wherein special clock compensation symbols are periodically inserted into the data stream itself. Additional clock sync symbols are added to the data stream depending on the current level of the FIFO queue on the module or card. The insertion (or non-insertion) of additional symbols functions to compensate for the faster (or slower) clock of the module when compared to that of the reference.

Abstract: A method and apparatus for providing computer network access points the capability for multiple-level accounting. A gateway device located at the access point is capable of generating Internet protocol accounting start and stop requests based on various events that need to be accounted for when a user accesses a network. These events include the user account logon, the service establishments and the Point to Point protocol (PPP) connections between the gateway device and public and private domains within the network. The counter is capable of tracking the duration of sessions and connections and the byte-count associated with the specified session or connection. The gateway device communicates with an accounting server which stores the accounting requests and matches start requests with subsequent stop requests.

Abstract: A communications system extending over a cellular region and formed of a plurality of wireless cells. The communications system extends over a cellular region formed of a plurality of wireless cells. Each cell covers an area which includes a portion of the cellular region. Each particular cell includes a base station having a transmitter for transmitting a particular cell signal having parameters including a transmitting frequency and a transmitting power. The particular cell signal is transmitted to cover a portion of the cell region. Each of the base stations includes a parameter detector for detecting the other parameters of the other cell signals from the other cells in the cellular region. A parameter controller controls the particular parameters for the particular cell. The parameters for the particular cell are based upon the other parameters for the other cell signals so that the particular cell signal does not interfere with the other cell signals in the cellular region.

Abstract: A distributed computer network testing system includes a test controller and at least one test agent. One or more test agents are configured with interpreters configured to execute instructions contained in a test script. When the test begins, the test controller publishes the test script to an event engine that broadcasts the script on the network. Test agents subscribing to the test script receive the script. Script receipt is the event that triggers test script execution by each interpreter on each subscribing test agent. Each test agent sends test results to the test controller that, in turn, sends all results to a test analysis agent. The analysis agent analyzes the test results and produces a test report that is output to the user.

Abstract: A content-aware flow switch intercepts a client content request in an IP network, and transparently directs the content request to a best-fit server. The best-fit server is chosen based on the type of content requested, the quality of service requirements implied by the content request, the degree of load on available servers, network congestion information, and the proximity of the client to available servers. The flow switch detects client-server flows based on the arrival of TCP SYNs and/or HTTP GETs from the client. The flow switch implicitly deduces the quality of service requirements of a flow based on the content of the flow. The flow switch also provides the functionality of multiple physical web servers on a single web server in a way that is transparent to the client, through the use of virtual web hosts and flow pipes.

Abstract: A frequency synthesizer, a calibrator thereof, and an operating controller thereof are described. The synthesizer comprises a main charge pump that drives a voltage controlled oscillator (VCO) through a loop filter. The calibrator includes a second, replica charge pump that can also drive the VCO, but is set up to output only its maximum or minimum analog output control voltage. Since the construction and characteristics of the replica charge pump duplicate the main charge pump, the main charge pump's minimum and maximum analog control outputs can be cloned out to the VCO on demand. A VCO calibration procedure therefore includes switching the VCO to each of its ranges set by a bank of fixed capacitors, and using the replica charge pump to drive the VCO to its minimum and maximum frequency for each range setting.

Abstract: An add/drop node used in an optical network having two fiber paths for carrying light corresponding to a plurality of channels in opposite directions may include a pair of add/drop modules that correspond to one of the plurality of channels. This arrangement advantageously provides a simple approach for connecting the components of an add/drop node.

Abstract: A monolithic transceiver integrated circuit that includes a substrate, a transmitter subsystem of one or more subcircuits on the substrate, and a receiver subsystem of one or more, subcircuits on the substrate. Also included is a bias current supply coupled to the receiver and transmitter subsystems to provide bias current. The bias current supply includes a first bias circuit on the substrate coupled to, and to supply bias current to, a first subcircuit of the transmitter subsystem. The first bias circuit includes a first current modulator having a first switch input to indicate that the bias current is to start or stop being supplied to the first subcircuit. The first current modulator is to control the rate of change of supplied bias current in response to the first switch input. The first subcircuit may be a power amplifier. The control of the rate of change reduces oscillator pull in at least one oscillator included in the integrated circuit.