Abstract: The invention relates to a pressure maintaining gas cylinder valve. It consists of a pressure retaining device: The axis of the pressure retaining device and that of the valve element are in the same vertical plane; the pressure retaining device has a mounting base, a spring and a valve are located in the mounting base: the valve is in the valve element near the air outlet; the front section of the valve is near the air outlet, while the rear section of the valve is in the mounting base; the spring is between the valve and the mounting base. Because the invention has no eccentricity, the gas channel is smoother and the volume of the cylinder valve is greatly reduced. The mounting seat of the pressure retaining device not only provides support for the valve and spring, but also ensures that the stroke of the valve element is not interfered.

Abstract: Provided are a method and an apparatus for writing data into an SSD. The method includes: configuring, in the SSD, a low-level cell for storing open block data to form a low-level cell block; in response to receiving a data write instruction, writing data into a high-level cell of the SSD, the high-level cell has a unit capacity higher than that of the low-level cell; in response to that an existing time of a block that is not full of data in the high-level cell exceeds an open block status threshold value, determining the block that is not full of data as an open block and storing the open block in pending list; and in response to the existence of the open block in the pending list, transferring the open block to the low-level cell block through an internal memory, and closing the open block in the low-level cell block.

Abstract: A quantum computing system includes a cryostat to support a low-temperature vacuum environment during operation of the quantum computing system; a quantum processor positioned in the cryostat; a first electronic control module external to the cryostat; a second electronic control module within the cryostat; at least one optical transmission line connecting the first electronic control module external to the cryostat with the second electronic control module internal to the cryostat, the optical transmission line being configured to transmit optical signals to and from the second electronic control module during operation of the quantum computing system; and a plurality of signal lines connecting the second electronic control module with the quantum processor, a first subset of the signal lines being configured to transmit microwave signals to and from the quantum processor during operation of the quantum computing system.

Abstract: A display device includes a sub-pixel connected to a scan write line, a first data line, and a second data line. The sub-pixel includes a light emitting element, a first pixel driving unit configured to generate a control current according to a first data voltage of the first data line, a second pixel driving unit configured to generate a driving current applied to the light emitting element according to a second data voltage of the second data line, and a third pixel driving unit configured to apply the driving current to the light emitting element according to the control current of the first pixel driving unit. The first pixel driving unit includes a first transistor to generate the control current according to the first data voltage, a second transistor configured to apply the first data voltage of the first data line to a first electrode of the first transistor.

Abstract: A semiconductor device includes a stacked structure disposed on a substrate. The stacked structure includes a plurality of insulation layers and a plurality of electrode layers alternately stacked in a third direction intersecting with first and second directions. A plurality of channel structures extends through the stacked structure in the third direction. A first wiring group includes a plurality of first horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. A second wiring group includes a plurality of second horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. Each of the plurality of first and second horizontal wirings are connected to corresponding one of the plurality of channel structures. A first line identifier is disposed between the first wiring group and the second wiring group.

Abstract: A unit pixel is provided. The unit pixel includes a transparent substrate, a first light blocking layer disposed on the transparent substrate and having windows that transmit light, an adhesive layer covering the first light blocking layer, a plurality of light emitting devices disposed on the adhesive layer to be arranged on the windows, and a second light blocking layer covering side surfaces of the light emitting devices.

Abstract: Disclosed is a method for obtaining information on sub-units partitioned from a picture. The method comprises: decoding, from a bitstream, CTU size information indicating the size of coding tree units (CTUs) within the picture; decoding, from the bitstream, sub-picture partition information expressing sub-pictures within the picture in units of the CTU sizes; decoding, from the bitstream, partition information related to partition of the picture into one or more tiles; and decoding, from the bitstream, partition information related to partition of the picture into one or more slices.

Abstract: A cover member of an electronic device according to various embodiments of the present disclosure may comprise: a substrate film layer; a metal oxide layer disposed on the upper surface of the substrate film layer and formed by sputtering; a transparent member attached/disposed on the upper surface of the metal oxide layer; a primer layer disposed on the lower surface of the substrate film layer and made of a semi-transparent material; and a photocurable resin layer disposed on the lower surface of the primer layer, the photocurable resin layer comprising, on a surface thereof, a pattern structure in a designated stereoscopic shape. Other embodiments are also possible.

Abstract: An offer decay generation model determines, for a particular customer, a personalized optimal offer decay curve of an incentive corresponding to a product provided by an enterprise, where the offer decay curve defines a set of decreasing incentive values and respective time intervals during which each incentive value is valid. The offer decay generation model is trained on historical data indicative of customers, customer interactions, offered incentives, resulting outcomes of the incentives, and time intervals elapsing between incentives and resulting outcomes. As such, the optimized offer decay curve is structured to maximize a probability that the particular customer is motivated to accept the incentive offer, purchase a product, and/or further interact with the enterprise during the lifetime of the offer decay curve. The offer decay curve may unique to the individual customer, and may be further customized based on other parameters such as location, time/day/date, inventories, etc.

Abstract: A display apparatus including a main display area, a component area, and a peripheral area, the display apparatus includes: a substrate; an auxiliary sub-pixel arranged in the component area on the substrate; an auxiliary pixel circuit arranged in the peripheral area on the substrate; a connection line connecting the auxiliary sub-pixel to the auxiliary pixel circuit; an auxiliary scan line arranged in the peripheral area on the substrate and connected to the auxiliary pixel circuit; and an auxiliary scan driving circuit arranged in the peripheral area on the substrate and configured to output a scan signal to the auxiliary pixel circuit through the auxiliary scan line.

Abstract: A coin entering from a depositing port of a coin selector is identified by a denomination while passing through a coin passage. A coin of a predetermined denomination is stored, and a coin of a denomination other than the predetermined denomination is discharged to the outside. Provided is a coin selector including a removal mechanism that suitably removes a coin clogged in a coin passage. The coin selector includes a first pushing portion and a second pushing portion that push a coin in a moving direction of the coin and a direction intersecting with the moving direction in the coin passage from a depositing port for depositing the coin to a dispensing port for discharging the coin. When the coin is clogged, the coin is pushed by a pushing unit to eliminate the coin clogging, and the clogged coin is discharged to the dispensing port.

Abstract: A transmission line includes a first interlayer connection conductor connecting a first signal conductor and a first mounting electrode, a second interlayer connection conductor connecting a second signal conductor and a second mounting electrode, a third and fourth interlayer connection conductors respectively including third and fourth interlayer connection conductors, and each connecting first and second ground conductors between the first and second signal conductors.

Abstract: An image processing method and device, a camera apparatus and a storage medium are provided. The image processing method includes: acquiring an initial image, and the initial image corresponds to an RGB data format; dividing the initial image into a plurality of image blocks; converting each image block in the plurality of image blocks from the RGB data format into a YUV data format, wherein Y is a luminance value, and U and V are chromatic value; inverting a luminance value Y of a target image block into a darkness value D, and the target image block is at least one of the plurality of image blocks; coding DUV data of the target image block and YUV data of a non-inverted image block so as to obtain target image data of the initial image.

Abstract: An electronic device is provided. The electronic device includes a memory, a fingerprint sensor, a display module, and a processor operatively connected to the memory, the fingerprint sensor, and the display module. The processor may acquire a fingerprint image through the fingerprint sensor, if the first fingerprint recognition operation fails, acquire the first fingerprint image up to the release time of a touch for fingerprint recognition, if the touch is released, determine whether a second fingerprint image is acquired for a predetermined time, if the second fingerprint image is acquired for the predetermined time, determine whether the similarity between the first fingerprint image and the second fingerprint image is greater than or equal to a predetermined threshold, and if the similarity between the first fingerprint image and the second fingerprint image is greater than or equal to the predetermined threshold, recognize the fingerprint.

Abstract: An electronic apparatus is provided. The electronic apparatus according to the disclosure includes: a display, a communication interface comprising communication circuitry, a memory, and a processor. The processor may be configured to: based on acquiring a user command for executing an application stored in the memory, execute the application, based on acquiring a request for access for information stored in the memory through the communication interface while executing the application, acquire access control information of another electronic apparatus related to the electronic apparatus for the application and a relevance between the user and the user of the another electronic apparatus, acquire guide information for guiding a response to the request for access based on the access control information and the relevance, and control the display to display a message including the guide information.

Abstract: Provided is a virtual machine (VM) management method of simulating a change in deployment of VMs deployed on physical servers including a first physical server and a second physical server physically separated from the first physical server and scheduling deployment of VMs and predicting workload of VMs.

Abstract: Disclosed are a railway vehicle and a storage battery circuit breaker box thereof. The storage battery circuit breaker box comprises a circuit breaker box body, where mounting bases are arranged on side walls of the circuit breaker box body; a mounting positioning plate and a waterproof protection plate are fixedly mounted on a surface of one side of the circuit breaker box body; the mounting positioning plate is of a rectangular annular structure with an opening provided in the bottom thereof; the waterproof protection plate is located at the inner side of the mounting positioning plate; the waterproof protection plate is of a door-shaped structure; and perspective windows and a switch mounting hole are provided at the circuit breaker box body. The circuit breaker box can be mounted inside a vehicle body, maintenance by maintenance personnel outside the vehicle is facilitated, and the sealing requirements can also be met.

Abstract: A device includes a substrate and a fin isolation structure between a first gate structure and a second gate structure. The first gate structure wraps around a first vertical stack of nanostructure channels overlying a first fin. The second gate structure wraps around a second vertical stack of nanostructure channels overlying a second fin. The fin isolation structure extends from an upper surface of the first gate structure to an upper surface of the substrate. A trench isolation structure is between the first fin and the fin isolation structure, and has different etch selectivity than the fin isolation structure.

Abstract: In certain aspects, a memory device includes an array of memory cells, a plurality of word lines, and a plurality of slit structures. Each memory cell includes a vertical transistor, and a storage unit coupled to the vertical transistor. The array of memory cells is arranged in rows in a first direction and columns in a second direction. Two adjacent rows of the memory cells are staggered with one another, and two adjacent columns of the memory cells are staggered with one another in a plan view. Each word line extends in the second direction. Each slit structure extends in the second direction and separating two adjacent word lines of the plurality of word lines in the first direction.

Abstract: A three-dimensional (3D) memory device includes a first substrate, a first semiconductor structure, and a second semiconductor structure. The first semiconductor structure is disposed on the first substrate. The first semiconductor structure includes a second substrate, and a peripheral device disposed over the second substrate, and the peripheral device is formed facing the first substrate. The second semiconductor structure is disposed on the first semiconductor structure. The second semiconductor structure includes a doped semiconductor layer, and a memory array structure disposed between the doped semiconductor layer and the first semiconductor structure.