Abstract: A bit-matrix processor including a pair of optoelectronic matrices and a controller for causing the matrices to perform Boolean Matrix transforms to perform logical operations, wherein Boolean logical equivalents include logical AND to replace element-wise multiplication, and logical OR instead of summation. According to one embodiment, the processor includes an optical source matrix for receiving input binary data; a passive optical replicator for replicating a pattern on the optical source matrix and projecting it onto a Spatial Light Modulator (SLM); a database loading device for loading data onto the SLM thereby to perform logical AND with the optical source matrix data; an integrating device for integrating light from the SLM onto a photodiode matrix; and an output signal processing device.

Abstract: A packet switching system for a packet transfer network, the system having an architecture including a plurality of line cards, each including an ingress path pipeline, with processing elements, and an egress buffer, and an electro-optical In/Out (IO) interconnect coupling the line cards to one another in a full mesh connectivity, in the absence of a switch fabric, wherein the ingress path pipeline of each line card is coupled by means of the electro-optical IO interconnect to the egress buffer of each of the plurality of line cards.

Abstract: An optoelectronic chip assembly including a printed circuit board (PCB) coupled to a substrate, an aperture formed through the printed circuit board and through the substrate, a heat sink, an array of active electro-optical elements mounted in the aperture and connected to a driving chip controlled by the PCB, wherein the driving chip is coupled to the heat sink. Preferably, the assembly further includes a plurality of passive optical elements disposed for optical communication and data transfer with said active electro-optical elements, but thermally isolated therefrom.