Patents Assigned to Comsys Communications & Signal Processing Ltd.
  • Publication number: 20040034676
    Abstract: A method and apparatus for performing a radix-4 fast Hadamard transform (FHT) with reduced complexity that utilizes only seven operations and for directly determining the maximum output of a fast Hadamard transform using either a radix-4 transform or radix-2 transform without actually generating the outputs. To find the maximum value of the output of a fast Hadamard transform and its corresponding index, the N−1 stages of a conventional N stage fast Hadamard transform are computed while a find-maximum stage is inserted in place of the Nth stage. The invention also provides a methodology for constructing fast Hadamard transforms of the form H2N using radix-4 FHTs and permuting the results to achieve the correct outputs.
    Type: Application
    Filed: August 15, 2002
    Publication date: February 19, 2004
    Applicant: Comsys Communication & Signal Processing Ltd.
    Inventors: Ehud Reshef, Idan Alrod
  • Publication number: 20030235238
    Abstract: A method and apparatus for estimating channel tap delays of multipath components in a CDMA received signal. The search for the tap delays are split into two phases namely, a phase 1 and a phase 2 search. The phase 1 search is a coarse resolution quick search adapted to generate a rough estimate of the location of the tap delays. During this phase, the candidate codes are summed and the input signal correlated with the code sum creating an ambiguity in the code associated with the multipath. A finer resolution slower phase 2 search resolves the code ambiguity present in the initial rough estimates of the phase 1 search. Additional phase 2 correlations may be performed to implement a code-tracking loop.
    Type: Application
    Filed: June 24, 2002
    Publication date: December 25, 2003
    Applicant: Comsys Communication & Signal Processing Ltd.
    Inventors: Jacob Schelm, Ophir Shabtay, Yaniv Avital, Ehud Reshef
  • Patent number: 6529559
    Abstract: An apparatus for and method of reducing the soft output information packet to be computed by a soft symbol generator. The reduced soft output information packet generated by the soft symbol generator is subsequently used by a soft symbol to soft bit mapper which functions to convert soft symbol decision information into soft bit decision information. A symbol competitor table is constructed that includes the most likely symbol competitors for each bit of the symbol. The table is populated with m entries for each possible symbol value, where m represents the number of bits per symbol. Symbol competitors am retrieved from the table in accordance with hard decisions. Soft symbol information is generated only for symbol competitors rather than for all possible symbols thus substantially reducing the size of the information packet.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: March 4, 2003
    Assignee: Comsys Communication & Signal Processing Ltd.
    Inventor: Ehud Reshef
  • Patent number: 6470047
    Abstract: A novel and useful apparatus for and method of interference reduction in a communications receiver. The invention first finds the channel estimate and the noise vector from the receive signal. An interference detector is then used to choose an appropriate compensation filter and select between adaptive and deterministic moving average models for noise prediction. After compensation filtering, a new channel estimate and noise vector is calculated. The new noise vector is used to determine noise whitening coefficients if the adaptive model is used. In the deterministic model case, the coefficients do not need to be calculated since they are already known, having been calculated a priori. The noise whitening coefficients are then used in an equalizer such as a Viterbi algorithm based equalizer.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: October 22, 2002
    Assignee: Comsys Communications Signal Processing Ltd.
    Inventors: Alexander Kleinerman, Ariel Zaltsman, Edo Navon, Yuval Bachar
  • Patent number: 5864714
    Abstract: An apparatus for and method of implementing a novel buffer ba full duplex communication system is disclosed. The disclosed invention is particularly useful in native sign processing systems wherein heavy contention of processor resources typically exist, such as in systems running multi-tasking operating systems. The communication system of the present invention includes a receiver, transmitter, echo canceler. CODEC and telephone hybrid. The major components of the system operate on a buffer of input samples consisting of a set of input bits. The communication system operates to generate a buffer of output samples consisting of a set of output bits. The invention utilizes a novel buffer switching mechanism to optimize the tradeoff between processing response time, on one hand, and robustness to interrupt latency and processor implementation on the other hand.
    Type: Grant
    Filed: April 16, 1996
    Date of Patent: January 26, 1999
    Assignee: Comsys Communication & Signal Processing Ltd.
    Inventors: Nir Tal, Ron Cohen, Zeev Collin