Abstract: Disclosed herein are various embodiments of an application specific integrated circuit (ASIC). The ASIC includes a plurality of functional units. Each functional unit may include a plurality of connections. The ASIC may also include a plurality of input and/or output pins configured to couple the ASIC to a circuit board. A programmable client may be associated with each pin, and each programmable client may be programmed to selectively connect the pin with which it is associated to one of the plurality of connections of one of the plurality of functional units. In various embodiments, the programmable client may be embodied as a multiplexer or a crossbar switch. Further, the programmable client may be programmed using any of boot firmware, hardware jumpers, and/or non-volatile programming registers.

Abstract: A packet switching node in a pipelined architecture processing packets received via an input port associated with the packet switching node performs a method, which includes: determining a packet frame type; selectively extracting packet header field values specific to a packet frame type, including packet addressing information; ascribing to the packet a preliminary action to be performed; searching packet switching information tracked by the packet switching node based on extracted packet addressing information; formulating a preliminary switch response for the packet; classifying the packet into a packet flow; modifying the preliminary switch response in accordance with one of the preliminary action, the packet flow into which the packet was classified, and a default port action corresponding to the input port; modifying the packet header in accordance with one of the preliminary action, the packet flow, and the default port action; and processing the packet.

Abstract: An automatic Video Detector (“AVD”) for detecting the transmission format of a received video signal is disclosed. The AVD may include a video detector array module and a state machine. The video detector array module may include a video line detector and a sub-carrier frequency detection module in signal communication with the video line detector.

Abstract: According to an exemplary embodiment, an integrated circuit includes a first circuit block having a first power bus. The integrated circuit further includes a second circuit block having a second power bus, where the first power bus is isolated from the second power bus. The integrated circuit further includes a first dedicated ESD bus, where the first dedicated ESD bus provides a discharge path from the first power bus to the second power bus and from the second power bus to the first power bus. The first power bus can be coupled to the first dedicated ESD bus by a first pair to bi-directional diodes, and the second power bus can be coupled to the first dedicated ESD bus by a second pair of bi-directional diodes.

Abstract: A system for signal processing is provided. A sampling delay system generates a plurality of sampling delay values. A plurality of programmable delays each receives one of the sample delay values. A plurality of sample and hold units, each coupled to one of the programmable delays, generates a sample of a received signal in response to an input from the programmable delay.

Abstract: There is provided a method of communicating diagnostic information between a Universal Serial Bus (USB) host and a USB device, the USB host including a host USB controller, a main driver and a host main application. The method comprises establishing a data pipe in a data class interface between the USB host and the USB device for data communication; establishing a diagnostic information pipe in the data class interface between the USB host and the USB device for diagnostic information communication; monitoring the data class interface between the host USB controller and the main driver using a filter driver; intercepting the diagnostic information in the diagnostic information pipe of the data class interface using the filter driver; directing the diagnostic information intercepted by the filter driver to a host diagnostics application; and directing the data in the data pipe of the data class interface to the main driver.

Abstract: Disclosed are a method and apparatus for generating a controlled spectrum of modulated energy. A single data stream is splintered into substreams. Each substream is used to modulate a portion of the modulated spectrum. Each substream is transformed into a numerical phase and amplitude representation of a portion of the spectrum to be modulated. The combined numerical representations are then converted to a time-domain representation and filtered to eliminate undesired side-lobes.

Abstract: Disclosed is a method of validating the contents of a real-time clock in a digital circuit. A plurality of memory elements create a first random signature value when power is newly applied to a circuit. The plurality of memory elements maintain the first random signature value while power to the circuit is maintained. The first random signature value is stored as a reference value such that the reference value is not altered by a power interruption. When power to the circuit is lost and then regained, a second random signature value is created. The second random signature value likely will no longer match the reference value because both the reference value and the second signature are random. When the reference value does not match the signature value, the real-time clock value is considered invalid. User input may be employed to correct the real-time clock value.

Abstract: There is provided a demodulator system comprising a first input to receive a first analog signal at a first rate; a second input to receive a second analog signal at the first rate; a MUX coupled to the first input and the second input to receive the first analog signal and the second analog signal, and to multiplex the first analog signal and the second analog signal to generate a multiplexed analog output; an ADC to receive the multiplexed analog output and generate a multiplexed digital output, the ADC operating at a second rate, the second rate substantially equal to the first rate multiplied by a total number of input analog signals; a DEMUX to receive the multiplexed digital output and generate a first digital output having a first bitstream and a second digital output having a second bitstream corresponding to the first analog signal and the second analog signal.

Abstract: A system for determining an optimal sampling phase is provided. The system includes a plurality of analog to digital converters, each receiving an analog signal and a clock phase signal and generating an output. A clock generator receives a reference clock and generates a plurality of clock phase signals. A sampling phase system receives the plurality of outputs of the analog to digital converters and generates an optimal sampling phase.

Abstract: Systems and methods for implementing a temperature compensated two-stage ring oscillator are described. At least one embodiment includes a system for generating a clock signal comprising a self-starting oscillator comprising two delay stages in a ring configuration. The two-stage ring oscillator is configured to generate the clock signal, wherein the delay stages are configured such that the two-stage ring oscillator has a single right-half plane (RHP) pole in each of the two delay stages where feedback is always positive. For some embodiments, the system further comprises a compensation module configured to sense temperature and process variations and adjust a supply voltage for the two-stage ring oscillator to compensate for temperature and process variations in order to maintain a constant frequency clock signal. For such embodiments, the compensation module comprises a replica circuit configured to mirror operation of the n-channel devices within the two-stage ring oscillator.

Abstract: The topology of a digital subscriber line loop can play an important role in provisioning service. For example, knowledge of certain topological features in a loop can enable telecommunications companies to make better decisions about the kinds of services that can be provisioned on that loop. Additionally, knowledge of those topological features can also assist field engineers in troubleshooting problems in the field. A topology recognition engine can provide key topological features such as the loop length, presence of single and multiple bridge taps and the length of single bridge taps on a loop.

Abstract: Impulse noise from nearby or intense electrical sources can disrupt communications over digital subscriber lines (DSL). The characterization of the nature, timing and length of impulse noise sources present on a DSL loop is a critical first step in mitigating the effect of impulse noise on DSL communications. DSL standards provide histograms for impulse length and inter-arrival time of impulses. These histograms can be used to derive the nature, maximum frequency and other statistics related to impulse noise on a DSL line.

Abstract: According to an exemplary embodiment, a semiconductor structure includes an NFET situated over a substrate. The semiconductor structure further includes a P+ substrate tie ring surrounded the NFET. The P+ substrate tie ring includes a salicide layer situated on a P+ diffusion region. The semiconductor structure further includes an N well ring situated between the NFET and the P+ substrate tie ring, where the N well ring increases snap-back conduction uniformity in the NFET. The semiconductor structure further includes an N+ active ring situated between the NFET and the P+ substrate tie ring, where the N+ active ring surrounds the NFET and connects the P+ substrate tie ring to the N well ring. The N+ active ring includes a salicide layer situated on an N+ diffusion region, where the salicide layer of the N+ active ring connects the N well ring to the P+ substrate tie ring.

Abstract: The present invention solves the problem set forth above by providing a method for accelerating the production of a standalone copy of a document by a peripheral device. The invention employs a white space map of the document to be copied. The map is generated by the ASIC chip and is used by the device to identify areas of the outputted copy that do not require ink or toner. This reduces the processing resources necessary to print the copy, thus speeding up copy production.

Abstract: In accordance with some embodiments, a communication system is described that comprises a soft-output detector configured to receive a transmit signal and output reliability information regarding the received signal. In accordance with such embodiments, the detector comprises a symbol combiner configured to operate in both a repetition mode and a non-repetition mode, wherein repetition mode comprises receiving a plurality of signals for the transmit signal.

Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.

Abstract: Systems and methods for reducing the peak-to-average ratio (PAR) at the transmitter can reduce the dynamic range required in various analog components. PAR can be reduced by applying a time-domain compensation signal which reduces the magnitude of peaks in the time-domain signal prior to transmission where the time-domain compensation signals use tones that are reserved for the purpose of reducing the PAR. The reservation of these reserved tones for PAR can be implemented by altering the typical startup procedures in a digital subscriber line (xDSL) system. The use of the reserved tones to reduce the PAR can be implemented using a low complexity algorithm or using an adaptive technique.

Abstract: A wideband RF tracking filter having a set of parallel tuned resonator amplifier stages with a de-Q resistor for each subband is disclosed. The resonant amplifier contains programmable tuned LC tank impedance and an array of parallel voltage to current converters (V2I) for each subband. The de-Q resistor together with the array of V2I converters provides a flat gain over each subband and each of the other subbands covering different frequencies.

Abstract: In a semiconductor chip, a thermal adhesive is used to bond an internal heat spreader to an active functional die. In an alternative embodiment a dummy die is place directly on top of the active functional die and a thermal adhesive is used to bond an internal heat spreader to the dummy die. This provides a direct and relatively low thermal conductivity path from the heat source, i.e., the functional device to the top of the package, that is, the internal metal heat spreader which is also exposed to the air.