Abstract: Modern electronic devices are getting more portable and smaller leading to smaller distances between speakers. In particular, computers are now so compact that the notebook computer is one of the most popular computer types. However, with the proliferation of media available in digital form, both music recordings and video features, the demand for high quality reproductions on computers has increased. Systems and methods for producing wider speaker effects and immersion effects disclosed can enhance a listener's experience even in a notebook computer.

Abstract: A method for establishing a circuit connection over a network. Determining a channel quality profile of a medium connecting a source node and a destination node. Determining a throughput required to support a data rate requirement of an application that sources data. Determining a modulation type and modulation density at one or more frequency according to the channel quality profile. Selecting one or more of a set of frequencies, modulation types and modulation densities to support the throughput. Communicating the selection to nodes attached to the medium.

Abstract: Encrypted storage often introduces unwanted latency in access. This delay can result in a processor having to wait for critical data thus slowing performance. Generally speaking, the latency is at most an issue when reading from encrypted storage, since the processor may need the information read from encrypted storage to proceed. During a write operation, there typically is not an issue because the processor does not need to wait for the end of the write operation to proceed. A variant of counter (CTR) mode for a block cipher can be used to perform the majority of the decryption operation without knowledge of the ciphertext, therefore the majority of the decryption operation can be performed concurrently with the retrieval of the ciphertext from memory. In order to further secure the encrypted storage, a light encryption can be performed to further obfuscate the ciphertext.

Abstract: A high availability backplane architecture. The backplane system includes redundant node boards operatively communicating with redundant switch fabric boards. Uplink ports of the node boards are logically grouped into trunk ports at one end of the communication link with the switch fabric boards. The node boards and the switch fabric boards routinely perform link integrity checks when operating in a normal mode such that each can independently initiate failover to working ports when a link failure is detected. Link failure is detected either by sending a link heartbeat message after the link has had no traffic for a predetermined interval, or after receiving a predetermined consecutive number of invalid packets. Once the link failure is resolved, operation resumes in normal mode.

Abstract: Systems and methods are described for selecting tones for far-end crosstalk (FEXT) mitigation. In particular, systems and methods are described for performing far-end crosstalk (FEXT) mitigation within a digital subscriber line (xDSL) system. One embodiment is a method that comprises determining a first set of function values relating to a per-tone signal-to-noise ratio (SNR) for a user among a plurality of users for a number of tones, wherein the number of tones is less than or equal to a total number of tones available for transmission. The method further comprises estimating coefficients for performing FEXT mitigation for the number of tones, performing FEXT mitigation on the number of tones based on the estimated coefficients, and performing FEXT mitigation on a selected group of tones from among the number of tones, wherein the selected group of tones is less than or equal to the number tones.

Abstract: A hardware-based failover scheme enabling rapid end-to-end recovery is provided. Hardware logic periodically generates, transmits, receives, and processes heartbeat packets, sent from one end of the communications network to another, and then returned back. If a communications network node or communications link failure is being experienced along the transport path, then the hardware logic rapidly swaps the affected traffic conveyed to a pre-established backup transport path, typically within microseconds. Advantages are derived from the rapid failover effected end-to-end which enables continued delivery of provisioned communications services improving the resiliency and/or availability of a communications network.

Abstract: Many speakers, especially small speakers are susceptible to distortion if too much power is applied in certain vulnerable frequency bands. The distortion can be prevented by applying equalization to the audio signal driving the speaker. An equalizer can be configured to suppress the audio signal in the vulnerable frequency bands. The equalizer monitors the power in the vulnerable frequency bands and suppresses those vulnerable frequency bands only when they have sufficient power to distort. In this fashion, undesired audio effects due to the equalization can be avoided.

Abstract: A barrier layer can be attached in a semiconductor package to one or more sensitive devices. The barrier layer can be used to obstruct tampering by a malicious agent attempting to access sensitive information on the sensitive device. The barrier layer can cause the sensitive device to become inoperable if physically tampered. Additional other aspects of the protective packaging provide protection against x-ray and thermal probing as well as chemical and electrical tampering attempts.

Abstract: In today's environment class-D amplifiers are used to provide an integrated solution for applications such as powered audio devices due to their advantages in power consumption and size over more traditional analog amplifiers. Due to power output requirements, the output stages of power drivers such as class-D amplifiers require a supply voltage in excess of the technologically allowed voltage for the switches in the output stage. A level shifter is used to ensure voltages supplied to the output switches do not exceed the technological limits. An ideal level shifter should provide the optimal voltage swing to output switches under all process, supply voltage and temperature (PVT) variations. The ideal level shifter should also provide fast transitions when the control signal changes from high to low and low to high.

Abstract: Systems for suppressing image noise are provided. In this regard, one embodiment includes a system for suppressing image noise comprising a low noise amplifier (LNA) configured to amplify a received RF signal, an RF variable gain attenuator with an image rejection filter with programmable bandwidth configured to suppress image noise and image interference, and an RF mixer configured to perform frequency translation.

Abstract: Consumer infrared (CIR) systems typically are used in remote control systems. Most CIR systems expect a known carrier frequency and encoding scheme. However, there are many applications of a universal CIR receiver which can receive and decode CIR signals regardless of the carrier frequency or encoding scheme. A CIR receiver circuit is disclosed which can both decompose a received CIR signal into run length representation and detect the carrier frequency. The result can then be supplied to a host device for further processing, interpretation and/or actions.

Abstract: Disclosed herein are various embodiments of an application specific integrated circuit (ASIC). The ASIC includes a plurality of functional units. Each functional unit may include a plurality of connections. The ASIC may also include a plurality of input and/or output pins configured to couple the ASIC to a circuit board. A programmable client may be associated with each pin, and each programmable client may be programmed to selectively connect the pin with which it is associated to one of the plurality of connections of one of the plurality of functional units. In various embodiments, the programmable client may be embodied as a multiplexer or a crossbar switch. Further, the programmable client may be programmed using any of boot firmware, hardware jumpers, and/or non-volatile programming registers.

Abstract: A packet switching node in a pipelined architecture processing packets received via an input port associated with the packet switching node performs a method, which includes: determining a packet frame type; selectively extracting packet header field values specific to a packet frame type, including packet addressing information; ascribing to the packet a preliminary action to be performed; searching packet switching information tracked by the packet switching node based on extracted packet addressing information; formulating a preliminary switch response for the packet; classifying the packet into a packet flow; modifying the preliminary switch response in accordance with one of the preliminary action, the packet flow into which the packet was classified, and a default port action corresponding to the input port; modifying the packet header in accordance with one of the preliminary action, the packet flow, and the default port action; and processing the packet.

Abstract: A system is described for performing combined equalization. The system comprises a time domain equalizer (TEQ) configured to receive a signal and shorten a CIR (channel impulse response) of the received signal, a Fast Fourier Transform (FFT) module for demodulating the received signal, and an equalization block for reducing inter-carrier interference (ICI) and inter-symbol interference (ISI). The equalization block comprises at least one of: a feed forward equalizer and a feed back equalizer. The system further comprises a slicer circuit configured to generate a hard-limited decision for a symbol corresponding to the received signal.

Abstract: An automatic Video Detector (“AVD”) for detecting the transmission format of a received video signal is disclosed. The AVD may include a video detector array module and a state machine. The video detector array module may include a video line detector and a sub-carrier frequency detection module in signal communication with the video line detector.

Abstract: According to an exemplary embodiment, an integrated circuit includes a first circuit block having a first power bus. The integrated circuit further includes a second circuit block having a second power bus, where the first power bus is isolated from the second power bus. The integrated circuit further includes a first dedicated ESD bus, where the first dedicated ESD bus provides a discharge path from the first power bus to the second power bus and from the second power bus to the first power bus. The first power bus can be coupled to the first dedicated ESD bus by a first pair to bi-directional diodes, and the second power bus can be coupled to the first dedicated ESD bus by a second pair of bi-directional diodes.

Abstract: A system for signal processing is provided. A sampling delay system generates a plurality of sampling delay values. A plurality of programmable delays each receives one of the sample delay values. A plurality of sample and hold units, each coupled to one of the programmable delays, generates a sample of a received signal in response to an input from the programmable delay.

Abstract: There is provided a method of communicating diagnostic information between a Universal Serial Bus (USB) host and a USB device, the USB host including a host USB controller, a main driver and a host main application. The method comprises establishing a data pipe in a data class interface between the USB host and the USB device for data communication; establishing a diagnostic information pipe in the data class interface between the USB host and the USB device for diagnostic information communication; monitoring the data class interface between the host USB controller and the main driver using a filter driver; intercepting the diagnostic information in the diagnostic information pipe of the data class interface using the filter driver; directing the diagnostic information intercepted by the filter driver to a host diagnostics application; and directing the data in the data pipe of the data class interface to the main driver.

Abstract: Provided herein is a method for accelerating the production of a standalone copy of a document by a peripheral device. The invention employs a white space map of the document to be copied. The map is generated by the ASIC chip, preferably at an early stage in the processing pipeline, and is used by the device to identify white areas of the outputted copy that do not require subsequent image processing calculations and do not require ink or toner markings on the paper. Use of the white space map allows the system to reduce the processing resources necessary to image process and subsequently physically print the copy, thus speeding up copy production.

Abstract: Disclosed are a method and apparatus for generating a controlled spectrum of modulated energy. A single data stream is splintered into substreams. Each substream is used to modulate a portion of the modulated spectrum. Each substream is transformed into a numerical phase and amplitude representation of a portion of the spectrum to be modulated. The combined numerical representations are then converted to a time-domain representation and filtered to eliminate undesired side-lobes.