Patents Assigned to Core Logic Inc.
  • Publication number: 20120087414
    Abstract: An apparatus and method for processing video data is disclosed. In an embodiment, the video data processing apparatus comprises a decoding unit configured to decode a frame image, divided into a number of slices and then encoded, on a slice basis and to deblock-filter a number of the decoded slices except boundary portions between the decoded slices and a slice edge deblock filter unit configured to comprise a number of slice edge deblock filters operated in conjunction with the decoding unit and to in parallel deblock-filter the boundary portions between the decoded slices using a number of the slice edge deblock filters. Accordingly, the boundary portions between slices can be efficiently deblock-filtered.
    Type: Application
    Filed: March 17, 2010
    Publication date: April 12, 2012
    Applicant: CORE LOGIC INC.
    Inventor: Seungpyo Shin
  • Patent number: 8150200
    Abstract: A method for reducing image noise with edge tracking comprises receiving input of an object image data for conversion and a size data of a matrix, namely, a conversion area of the image data; calculating a statistical difference value between each pixel of the image data and a pixel adjacent to the pixel in a predetermined direction and calculating edge map data obtained from the calculation in each predetermined direction; and converting an object pixel for conversion of the image data using calculation pixels located in the matrix of the image data, wherein the conversion step outputs main calculation pixels, namely, calculation pixels having a statistical difference value below a predetermined level with a value of the object pixel among the calculation pixels based on the edge map data, and converts the object pixel using a statistical calculation value of the main calculation pixels.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: April 3, 2012
    Assignee: Core Logic, Inc.
    Inventor: Young-Sin Lee
  • Patent number: 8149962
    Abstract: Techniques, systems and apparatus are described for estimating a frequency shift. An apparatus for estimating a frequency shift includes a fast Fourier transform unit to transform a signal of a time domain into a frequency domain and output fast Fourier transform symbols. A complex conjugate multiplier is in communication with the fast Fourier transform unit and output a continual pilot correlation between every two of the fast Fourier transform symbols output from the fast Fourier transform unit. A correlation memory unit is in communication with the complex conjugate multiplier to store the continual pilot correlation output from the complex conjugate multiplier. An adder is in communication with the correlation memory unit to add the continual pilot correlations stored in the correlation memory unit and generate an output signal comprising estimated values of the frequency shift.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: April 3, 2012
    Assignee: Core Logic, Inc.
    Inventor: Yung-Hoon Jo
  • Patent number: 8125528
    Abstract: An apparatus for digital image stabilization according to the present invention comprises an image signal processing module for receiving image signals generated under first and second exposure value conditions (first exposure value condition>second exposure value condition) from an image sensor, and outputting digital image signals of a first size and a second size (first size<second size) corresponding to the first exposure value condition and the second exposure value condition, respectively; and an applied image processing module for determining adaptively the second exposure value condition from the first exposure value condition, changing an exposure attribute of the image sensor from the first exposure value condition to the second exposure value condition, receiving the image signals of the first size and the second size, and correcting a property of the image signal of the second size based on the image signal of the first size.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: February 28, 2012
    Assignee: Core Logic Inc.
    Inventor: Young-Sin Lee
  • Patent number: 8111296
    Abstract: The present invention relates to apparatus and method for generating a panorama image, and a computer readable medium stored thereon computer executable instructions for performing the method. The apparatus for generating a panorama image according to the present invention comprises an input unit for receiving a plurality of input object images for panorama image generation; an edge detecting unit for outputting edge data of the input object images; a matching area output unit for outputting a matching area, namely, a standard area for pattern matching, within the edge data; a pattern matching unit for matching patterns of a plurality of the object images based on the matching area; and a stitching unit for generating a plurality of the object images into a panorama image based on the matched patterns.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: February 7, 2012
    Assignee: Core Logic, Inc.
    Inventor: Kim Min-Seok
  • Patent number: 8106824
    Abstract: Techniques, systems and apparatus are described for tracking a satellite signal. In one aspect, an apparatus includes a tracking module to generate a satellite-based measurement result by tracking a satellite signal received from a satellite. The tracking module includes sub-tracking modules with each sub-tracking module configured to generate the satellite-based measurement result by using a different integral time.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: January 31, 2012
    Assignee: Core Logic, Inc.
    Inventor: Sung Chun Bu
  • Patent number: 8099656
    Abstract: Techniques, systems and computer program products are described for providing a Reed Solomon decoder. The Reed Solomon decoder includes a syndrome polynomial generator to generate syndrome polynomials for subchannel data received from subchannels. In addition, a syndrome polynomial selector selects one of the generated syndrome polynomials according to a preset priority. An error location/error value polynomial generator generates an error location polynomial and an error value polynomial by applying a first algorithm to the selected syndrome polynomial. Also an error location/error value calculator calculates an error location by applying a second algorithm to the error location polynomial and calculates an error value by applying a third algorithm to the error value polynomial. Further, an error corrector corrects an error included in the received subchannel data by applying the calculated error location and the calculated error value to the received subchannel data.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 17, 2012
    Assignee: Core Logic, Inc.
    Inventor: Tae-Gyu Ryu
  • Publication number: 20120002724
    Abstract: An encoding device and method of using a bit rate control method which accurately predicts a target bit amount, provides excellent quality, and is applicable to a real-time environment through a simple mechanism, and a multimedia apparatus including the encoding device. The encoding device includes a group-of-pictures (GOP)-based bit assigning unit for assigning a GOP-based bit amount targetGOP, a macroblock-based bit assigning unit for assigning a macroblock-based bit amount for all macroblocks included in the GOP, a quantizing device for checking a current buffer state, determining a quantization parameter (QP) by using an alternating current (AC) coefficient obtained by transforming a macroblock if a buffer occupancy rate is lower than a predetermined limit rate, and performing quantization by using the determined QP, and a variable length coding (VLC) unit for performing VLC.
    Type: Application
    Filed: March 17, 2010
    Publication date: January 5, 2012
    Applicant: CORE LOGIC INC.
    Inventor: Seong Hee KIim
  • Patent number: 8090458
    Abstract: The present invention relates to a method of calculating temporal information of frame-based audio stream data, and more particularly, to a method of calculating temporal information of frame-based audio stream data, in which it can calculate time related information depending on the playback of stream data even when bitrate or timetable information is not included in header information when audio or voice stream data consisting of a frame format are played back. Audio and voice stream data applied at this time includes stream data of a type in which several frames form one bit stream block as well as stream data constructed on a frame basis.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: January 3, 2012
    Assignee: Core Logic Inc.
    Inventor: Hun Joong Kim
  • Patent number: 8089379
    Abstract: Techniques, apparatus and systems are described for performing variable length decoding. In one aspect, a variable length decoding apparatus includes a first computation unit to determine whether a symbol corresponding to an input data is included in an upper group or a lower group of a variable length code tree. Responsive to the determination, when the symbol corresponding to the input data is included in the lower group, the first computation unit detects look-up table information corresponding to a subgroup that includes the symbol corresponding to the input data within the lower group that includes multiple subgroups. The variable length decoding apparatus includes a second computation unit to detect the symbol corresponding to the input data by searching a look-up table corresponding to the look-up table information when the look-up table information is received from the first computation unit.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: January 3, 2012
    Assignees: Core Logic, Inc., SNU R&DB Foundation
    Inventors: Ki Wook Yoon, Venkata Krishna Prasad Arava, Ki Young Choi, Man Hwee Jo, Hyouk Joong Lee
  • Patent number: 8078835
    Abstract: A processor for performing floating-point operations includes an array of processing elements arranged to enable a floating-point operation. Each processing element includes an arithmetic logic unit to receive two input values and perform integer arithmetic on the received input values. The processing elements in the array are connected together in groups of two or more processing elements to enable floating-point operation.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: December 13, 2011
    Assignee: Core Logic, Inc.
    Inventors: Hoon Mo Yang, Man Hwee Jo, Il Hyun Park, Ki Young Choi
  • Publication number: 20110299690
    Abstract: A method and apparatus for transmitting audio data is disclosed. In the method of sending audio data, audio data to be sent are divided into basic channel audio data and supplementary audio data for services of a high channel. When a left channel or a right channel is selected in response to a word selection signal in accordance with the standards of a serial bus, the basic channel audio data corresponding to a selected channel are sent, and at least one of the supplementary audio data is sent during the remaining time until another channel is selected in response to the word selection signal. Accordingly, audio data of a high channel, such as a 5.1 channel, can be sent without a design change using a serial bus for supporting a 2 channel, such as an I2S bus.
    Type: Application
    Filed: February 23, 2010
    Publication date: December 8, 2011
    Applicant: CORE LOGIC INC.
    Inventor: Donghwan Lee
  • Patent number: 8055092
    Abstract: An image processing apparatus is provided, including a brightness change level classifying unit, a dynamic weight calculating unit, and a brightness correcting unit. The brightness change level classifying unit compares a brightness change average value representing brightness changes from a pixel of interest to neighboring pixels around the pixel of interest with an upper threshold value and a lower threshold value and classifies the brightness change level of the pixel of interest into three types of levels according to the result of the comparison. An upper threshold value and a lower threshold value are predetermined based on the brightness of the pixel of interest. The dynamic weight calculating unit calculates different dynamic weights according to the brightness change level of the pixel of interest. The brightness correcting unit corrects the brightness of the pixel of interest, based on the dynamic weights.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: November 8, 2011
    Assignee: Core Logic, Inc.
    Inventor: Bong-Su Kang
  • Patent number: 8046564
    Abstract: Techniques, systems and apparatus are described for providing a processing element (PE) structure forming a floating point unit (FPU)-processing element. Each processing element includes each of two multiplexers (MUXes) to receive data from one or more sources including another PE, and select one value from the received data. The processing element includes an arithmetic logic unit (ALU) in communication with the two multiplexers to receive the selected value from each multiplexer as two input values, and process the received two input values to generate results of the ALU.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: October 25, 2011
    Assignee: Core Logic, Inc.
    Inventors: Hoon Mo Yang, Man Hwee Jo, Il Hyun Park, Ki Young Choi
  • Patent number: 8040279
    Abstract: Techniques, systems and computer readable medium are disclosed for measuring a position of an object device. A position measuring apparatus includes a receiving unit designed to receive a signal transmitted from an object device for position measurement. The position measuring apparatus also includes a position computing unit designed to compute a position of the object device by applying Angle Of Arrival (AOA) and Time Of Arrival (TOA) techniques using the received signal. The position measuring apparatus also includes a medium channel estimating unit designed to estimate a channel of a medium, through which the received signal penetrates on a transmission path, using the received signal. The position measuring apparatus also includes a position correcting unit configured to compute a delay time caused by the received signal penetrating the medium using the estimated medium channel and correcting the position of the object device computed by the position computing unit using the delay time.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: October 18, 2011
    Assignee: Core Logic, Inc.
    Inventor: Yung-Hoon Jo
  • Patent number: 8000559
    Abstract: A method of correcting image distortion and an apparatus for processing an image using the method are provided, where the method can overcome the disadvantages of the conventional methods of correcting lens distortion and can minimize image quality degradation at outer portions,. The method includes: receiving an image from a wide-angle lens; extracting a distortion coefficient of the distortion in the image caused by the wide-angle lens; correcting the distortion of the image by using the extracted distortion coefficient; and displaying a corrected image. The apparatus includes: a wide-angle lens for receiving an image; an image processing unit comprising a distortion coefficient extracting unit for extracting a distortion coefficient of distortion in the image caused by the wide-angle lens and a distortion correcting unit for correcting the distortion of the image using the extracted distortion coefficient; and a display unit for displaying a corrected image.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: August 16, 2011
    Assignee: Core Logic, Inc.
    Inventor: Sung Jin Kwon
  • Patent number: 8000523
    Abstract: An image processing apparatus according to the present invention comprises an object area extracting unit for extracting an object area including an object pixel and pixels adjacent to the object pixel from a bayer pattern image; a fault pixel judging unit for determining if the object pixel is a fault pixel based on levels of the adjacent pixels and a fault pixel judgment standard range that varies according to a level of the object pixel; and a fault pixel correcting unit for correcting the level of the object pixel determined to be a fault pixel based on a level average value of the adjacent pixels and a fault pixel correction standard range that varies according to the level average value of the adjacent pixels. Therefore, the present invention can remove a hot pixel and noise effectively.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: August 16, 2011
    Assignee: Core Logic, Inc.
    Inventor: Bong-Su Kang
  • Patent number: 7952615
    Abstract: Apparatus for digital image stabilization using object tracking includes an image signal processing unit that outputs a first digital image obtained under a first exposure value condition and a plurality of second digital images obtained under a second exposure value condition. The apparatus also includes a shaky hand compensating unit that compensates for motion in comparative second digital images relative to a reference second digital image by tracking an object in either a binary image or a reverse binary image of a respective second digital image that has the most objects (i.e., in the binary or reverse image). The compensating unit then generates a shaky hand compensated image by overlapping the motion-compensated images with the reference image. The apparatus further includes an image property correcting unit that corrects a property of the shaky hand compensated image based on a property of the first digital image.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: May 31, 2011
    Assignee: Core Logic, Inc.
    Inventor: Young-Sin Lee
  • Patent number: 7952614
    Abstract: Apparatus for digital image stabilization using object tracking can produce a digital still image free of an image blurring phenomenon caused by shaky hands without separate hardware and can produce an image that is bright, clear, and noise free. The apparatus includes an image signal processing unit that outputs a first digital image obtained under a first exposure value condition and a plurality of second digital images obtained under a second exposure value condition. The apparatus also includes a shaky hand compensating unit that compensates for motion in comparative second digital images relative to a reference second digital image using object tracking. The compensating unit then generates a shaky hand compensated image by overlapping each compensated comparative image with the reference image. The apparatus further includes an image property correcting unit that corrects a property of the shaky hand compensated image based on a property of the first digital image.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: May 31, 2011
    Assignee: Core Logic, Inc.
    Inventor: Young-Sin Lee
  • Patent number: 7928793
    Abstract: Techniques, systems and apparatus are described for providing a voltage selection circuitry and a DC-to-DC converter having such voltage selection circuitry. The voltage selection circuitry includes a first terminal voltage sensing unit that senses a voltage of a first terminal and a second terminal voltage sensing unit that senses a voltage of a second terminal. The voltage selection circuitry also includes a comparison unit connected to the first terminal voltage sensing unit and the second terminal voltage sensing unit. The comparison unit compares the voltage of the first terminal with the voltage of the second terminal and outputs a comparison signal indicating a difference between the sensed voltages of the first and second terminals. The voltage selection circuitry includes a selection unit that selects a higher voltage from the sensed voltages of the first and second terminals in response to the comparison signal.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: April 19, 2011
    Assignee: Core Logic, Inc.
    Inventors: Shin-Woo Lee, Jin-Sang Kim