Patents Assigned to Cryptography Research, Inc.
  • Patent number: 11416625
    Abstract: Systems and methods for protecting cryptographic keys stored in a non-volatile memory. An example method may comprise: storing a device root key in a non-volatile memory; storing a volatile key in a volatile memory; storing a masked cryptographic key in the non-volatile memory, wherein the masked cryptographic key is produced by combining a cryptographic key and the device root key; storing a masked device root key in the non-volatile memory, wherein the masked root key is produced by combining the device root key and the volatile key; and erasing the device root key from the non-volatile memory.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 16, 2022
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Mark Evan Marson, Michael A. Hamburg
  • Patent number: 11403014
    Abstract: A request associated with one or more privileges assigned to a first entity may be received. Each of the one or more privileges may correspond to an operation of an integrated circuit. Information corresponding to the first entity and stored in a memory that is associated with the integrated circuit may be identified. Furthermore, the memory may be programmed to modify the information stored in the memory that is associated with the integrated circuit in response to the request associated with the one or more privileges assigned to the first entity.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: August 2, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Benjamin Che-Ming Jun, William Craig Rawlings, Ambuj Kumar, Mark Evan Marson
  • Patent number: 11386236
    Abstract: A method of and system for gate-level masking of secret data during a cryptographic process is described. A mask share is determined, wherein a first portion of the mask share includes a first number of zero-values and a second number of one-values, and a second portion of the mask share includes the first number of one-values and the second number of zero-values. Masked data values and the first portion of the mask share are input into a first portion of masked gate logic, and the masked data values and the second portion of the mask share are input into a second portion of the masked gate logic. A first output from the first portion of the masked gate logic and a second output from the second portion of the masked gate logic are identified, wherein either the first output or the second output is a zero-value.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: July 12, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Andrew John Leiserson, Mark Evan Marson, Megan Anneke Wachs
  • Patent number: 11353504
    Abstract: A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second plurality of logic gates at the first value based on a second portion of the input signals. A subsequent first output at a particular value may be generated by the first plurality of logic gates based on a first portion of a second plurality of input signals and a subsequent second output may be generated by the second plurality of logic gates based on a second portion of the second plurality of input signals. A value of the subsequent second output may be complementary to the particular value of the subsequent first output.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: June 7, 2022
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Michael Hutter, Matthew Pond Baker
  • Patent number: 11329010
    Abstract: An anti-tamper layer is applied to a blank wafer. The layered wafer is then diced into shield dies. A shield die is oxide-to-oxide bonded to the top of an active die such that removing the shield die will damage the active die. The shield die may be sized and positioned such that wirebond pads along one or more edges of the active die remain exposed. The exposed wirebond pads may be used to electrically connect, via wirebonds, the active die to a substrate. A second shield die may be attached to the bottom of the active die to help protect against the use of bottom-to-top delayering.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: May 10, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Scott C. Best, Ming Li, Gary B. Bronner, Mark Evan Marson
  • Patent number: 11307253
    Abstract: An indication of an operating mode of an asynchronous circuit may be received. A determination may be made as to whether the operating mode of the asynchronous circuit corresponds to a self-test of the asynchronous circuit. In response to determining that the operating mode of the asynchronous circuit corresponds to the self-test, a first clock signal may be provided to a first portion of a self-test component in a feedback path of the asynchronous circuit and a second clock signal may be provided to a second portion of the self-test component in the feedback path of the asynchronous circuit. Furthermore, a test value may be generated based on the first clock signal and the second clock signal.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: April 19, 2022
    Assignee: Cryptography Research, Inc.
    Inventor: Matthew Pond Baker
  • Patent number: 11310227
    Abstract: The embodiments described herein describe technologies for Module management, including Module creation and Module deployment to a target device in an operation phase of a manufacturing lifecycle of the target device in a cryptographic manager (CM) environment. One implementation includes a Root Authority (RA) device that receives a first command to create a Module and executes a Module Template to generate the Module in response to the first command. The RA device receives a second command to create a deployment authorization message. The Module and the deployment authorization message are deployed to an Appliance device. A set of instructions of the Module, when permitted by the deployment authorization message and executed by the Appliance device, results in a secure construction of a sequence of operations to securely provision a data asset to the target device.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 19, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Michael Hamburg, Benjamin Che-Ming Jun, Paul C. Kocher, Daniel O'Loughlin, Denis Alexandrovich Pochuev
  • Patent number: 11308196
    Abstract: Pairing data associated with a second device may be received at a first device. The pairing data may be received from a server. A first authentication proof may be generated based on the pairing data received from the server. A second authentication proof may be received from the second device. Furthermore, an authentication status of the second device may be updated based on a comparison of the first authentication proof that is based on the pairing data received from the server and the second authentication proof that is received from the second device.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 19, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Benjamin Che-Ming Jun, Matthew Evan Orzen, Joel Patrick Wittenauer, Steven C. Woo
  • Patent number: 11301216
    Abstract: The embodiments described herein describe technologies of self-timed pattern generators. The self-timed pattern generators can be used to form a random number generator to generate a random digital value. Asynchronous digital logic in a first generator asynchronously updates a next state based on a current state, a second state of a second generator that is before the first generator in the chain or ring topology, and a third state of a third generator that is after the first generator in the chain or ring topology. The self-timed pattern generators are to output a random digital value based at least in part on the current state output from the first generator.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: April 12, 2022
    Assignee: Cryptography Research, Inc.
    Inventor: Scott C. Best
  • Patent number: 11303436
    Abstract: Systems and methods for performing cryptographic data processing operations employing non-linear share encoding for protecting from external monitoring attacks. An example method includes: receiving a plurality of shares representing a secret value employed in a cryptographic operation, such that the plurality of shares includes a first share represented by an un-encoded form and a second share represented by an encoded form; producing a transformed form of the second share; and performing the cryptographic operation using the transformed form of the second share.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: April 12, 2022
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventor: Elke De Mulder
  • Patent number: 11250134
    Abstract: A container corresponding to executable code may be received. In response to receiving the container, a container manager resident in a memory of a computation environment may be executed to verify the container. The container manager may be verified by a boot loader of the computation environment. Permissions of the container to access the resources of a computation environment may be determined after the verification of the container by the container manager. Access to one or more resources of the computation environment may be provided by transferring control to the one or more resources from the container manager to the container based on the permissions of the container for the resources of the computation environment.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: February 15, 2022
    Assignee: Cryptography Research, Inc.
    Inventor: Ambuj Kumar
  • Patent number: 11251935
    Abstract: A value corresponding to an input for a cryptographic operation may be received. The value may blinded by multiplying the value based on an exponentiation of a random number raised to an exponent value that is associated with a public key. A cryptographic operation may be performed based on the blinded value.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: February 15, 2022
    Assignee: Cryptography Research, Inc.
    Inventor: Michael Tunstall
  • Patent number: 11228422
    Abstract: Input signals may be received. Furthermore, a control signal controlling the implementation of a Differential Power Analysis (DPA) countermeasure may be received. One of the input signals may be transmitted as an output signal based on the control signal. A cryptographic operation may be performed based on the first output signal that is transmitted based on the control signal.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: January 18, 2022
    Assignee: Cryptography Research, Inc.
    Inventors: Christopher Gori, Pankaj Rohatgi
  • Patent number: 11216389
    Abstract: A container from a first root of trust associated with a first root entity may be received. The container may correspond to a mapping of a resource of an integrated circuit that is associated with the first root entity. The container may be verified based on a key that corresponds to the first root of trust and that is stored in the integrated circuit at manufacturing of the integrated circuit. An identification may be made that an assignment of the resource from the container corresponds to assigning the resource from the first root of trust to a new root of trust. A new key corresponding to the new root of trust may be generated. Information corresponding to the new key may be stored into a memory of the integrated circuit. Furthermore, the new key may be used to delegate the resource to a subsequent container.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: January 4, 2022
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Ambuj Kumar, William Craig Rawlings
  • Patent number: 11200348
    Abstract: A side-channel attack resistant circuit topology for performing logic functions. This topology includes combinatorial logic to perform the at least one logic function. A logic input selector alternately supplies, in response to a first timing reference signal, an input to the combinatorial logic with noise generating input values and valid input values. A first latch input selector alternately supplies, in response to the first timing reference signal, a first memory element input with noise generating input values and valid logic output values. The valid logic output values are received from the combinatorial logic. A first memory element latches the valid logic output values in response to a second timing reference signal.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: December 14, 2021
    Assignee: Cryptography Research, Inc.
    Inventors: Roberto Rivoir, Elke De Mulder, Jean-Michel Cioranesco
  • Patent number: 11101981
    Abstract: Share values for use in a cryptographic operation may be received and the cryptographic operation may be performed based on the share values. A pseudorandom number that is to be used by the cryptographic operation may be identified and the pseudorandom number may be generated based on a portion of the share values that are used in the cryptographic operation. The cryptographic operation may then be performed based on the generated pseudorandom number.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: August 24, 2021
    Assignee: Cryptography Research, Inc.
    Inventors: Pankaj Rohatgi, Elke De Mulder, Michael Hutter
  • Patent number: 11082224
    Abstract: A first entity may provide a request to transmit data from the first entity to a second entity. The first entity may receive a session key from the second entity in response to the request where the session key is encrypted by a second key that is based on a combination of a public key and a location associated with the second entity. A location associated with the first entity may be identified. Furthermore, a first key may be generated based on a combination of the location associated with the first entity and a private key that corresponds to the public key. The first key may decrypt data encrypted by the second key when the location associated with the first entity corresponds to the location associated with the second entity.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: August 3, 2021
    Assignee: Cryptography Research, Inc.
    Inventors: Ambuj Kumar, Mark Evan Marson, Daniel Robert Beitel
  • Patent number: 11074349
    Abstract: A method for device authentication comprises receiving, by processing hardware of a first device, a message from a second device to authenticate the first device. The processing hardware retrieves a secret value from secure storage hardware operatively coupled to the processing hardware. The processing hardware derives a validator from the secret value using a path through a key tree. The first device then sends the validator to the second device.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: July 27, 2021
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Paul C. Kocher, Pankaj Rohatgi, Joshua M. Jaffe
  • Patent number: 11063755
    Abstract: An indication of a key generation function may be received from a server. A random value may be received based on a volatile memory of a device. A cryptographic key may be generated based on the key generation function from the server and the random value that is based on the volatile memory of the device. The cryptographic key may be stored at a non-volatile memory of the device.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: July 13, 2021
    Assignee: Cryptography Research, Inc.
    Inventor: Helena Handschuh
  • Patent number: 11042488
    Abstract: A symmetric key that is stored at a device may be received. A public key from a remote entity may also be received at the device. Furthermore, a derived key may be generated based on a one way function between the symmetric key that is stored at the device and the public key that is received from the remote entity. The derived key may be encrypted with the public key and transmitted to the remote entity. The encryption of the derived key with the public key may provide secure transmission of the derived key to an authorized remote entity with a private key that may be used to decrypt the encrypted derived key.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: June 22, 2021
    Assignee: Cryptography Research, Inc.
    Inventor: Ambuj Kumar