Patents Assigned to Cryptography Research, Inc.
  • Patent number: 9923890
    Abstract: The embodiments described herein describe technologies for pre-computed data (PCD) asset generation and secure deployment of the PCD asset to a target device in an operation phase of a manufacturing lifecycle of the target device in a cryptographic manager (CM) environment. One implementation includes a Root Authority (RA) device that receives a first command to generate a unique PCD asset for a target device. In response, the RA device generates the PCD asset and packages the PCD asset for secure deployment of the PCD asset to the target device and to be used exclusively by the target device. The RA device deploys the packaged PCD asset in a CM system for identification and tracking of the target device.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: March 20, 2018
    Assignee: Cryptography Research, Inc.
    Inventors: Michael Hamburg, Benjamin Che-Ming Jun, Paul C. Kocher, Daniel O'Loughlin, Denis Alexandrovich Pochuev
  • Patent number: 9923719
    Abstract: Encrypted data transmitted from a second entity to a first entity may be received. The encrypted data may be encrypted by a location based public key based on a public key and a location associated with the second entity. A location associated with the first entity may be identified. A location based private key may be generated based on a private key that corresponds to the public key and the location associated with the first entity. Furthermore, the encrypted data may be decrypted with the location based private key when the location associated with the first entity matches the location associated with the second entity.
    Type: Grant
    Filed: November 23, 2015
    Date of Patent: March 20, 2018
    Assignee: Cryptography Research, Inc.
    Inventors: Ambuj Kumar, Mark Evan Marson, Daniel Robert Beitel
  • Patent number: 9853974
    Abstract: Systems and methods for implementing access control by systems-on-chip (SoCs). An example SoC may comprise an access control unit employed to: receive a message comprising an access control data item; validate the message using a value of a message digest function of contents of the message and a value of a state variable reflecting a state of communications between the access control unit and a programming agent that has initiated the message, wherein the value of the state variable is derived from a previous value of the message digest function calculated within a current communication session between the access control unit and the programming agent; update the state variable using the value of the message digest function of the contents of the message; and control, using the access control data item, access by an initiator device to a target device.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: December 26, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Craig E. Hampel, Jean-Michel Cioranesco, Rodrigo Portella do Canto, Guilherme Ozari de Almeida, Christopher Gori
  • Patent number: 9852572
    Abstract: Methods and apparatuses for increasing the leak-resistance of cryptographic systems are disclosed. A cryptographic token maintains secret key data based on a top-level key. The token can produce updated secret key data using an update process that makes partial information that might have previously leaked to attackers about the secret key data no longer usefully describe the new updated secret key data. By repeatedly applying the update process, information leaking during cryptographic operations that is collected by attackers rapidly becomes obsolete. Thus, such a system can remain secure against attacks involving analysis of measurements of the device's power consumption, electromagnetic characteristics, or other information leaked during transactions. Transactions with a server can be secured with the token.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: December 26, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventor: Paul C. Kocher
  • Patent number: 9768957
    Abstract: A request to generate a first key may be received. A device generated key that is stored in a memory may be received in response to the request. Furthermore, a first entity identification (ID) that is stored in the memory may be received. The first key may be generated based on the first entity ID and the device generated key that are stored in the memory.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: September 19, 2017
    Assignee: Cryptography Research, Inc.
    Inventor: Ambuj Kumar
  • Patent number: 9755822
    Abstract: A method and system for a countermeasure to power analysis attacks, where an impedance element is coupled to a power source providing power to a cryptographic module causing a measurable power supply noise, a timing sequence is generated, and the impedance element is decoupled from the power source based on the timing sequence to cause the measurable power supply noise to vary according to the timing sequence.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: September 5, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Minghui Han, Megan Wachs, Hai Lan
  • Publication number: 20170250967
    Abstract: A base key that is stored at a device may be received. A network identification may further be received. A device identification key may be generated based on a combination of the network identification and the base key. Furthermore, the device identification key may be used to authenticate the device with a network that corresponds to the network identification.
    Type: Application
    Filed: August 24, 2015
    Publication date: August 31, 2017
    Applicant: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Philippe Alain Martineau, Ambuj Kumar, William Craig Rawlings
  • Publication number: 20170249099
    Abstract: A request associated with one or more privileges assigned to a first entity may be received. Each of the one or more privileges may correspond to an operation of an integrated circuit. Information corresponding to the first entity and stored in a memory that is associated with the integrated circuit may be identified. Furthermore, the memory may be programmed to modify the information stored in the memory that is associated with the integrated circuit in response to the request associated with the one or more privileges assigned to the first entity.
    Type: Application
    Filed: August 31, 2015
    Publication date: August 31, 2017
    Applicant: Cryptography Research Inc.
    Inventors: Benjamin Che-Ming JUN, William Craig RAWLINGS, Ambuj KUMAR, Mark Evan MARSON
  • Patent number: 9729331
    Abstract: A request associated with a revocation of a key may be received. A hash value corresponding to the key that is stored in a memory may be identified. Furthermore, the hash value that is stored in the memory may be corrupted in response to the request associated with the revocation of the key.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: August 8, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Ambuj Kumar, Benjamin Che-Ming Jun
  • Publication number: 20170085368
    Abstract: Systems and methods for performing cryptographic data processing operations in a manner resistant to external monitoring attacks. An example method may comprise: executing, by a processing device, a first data manipulation instruction, the first data manipulation instruction affecting an internal state of the processing device; executing a second data manipulation instruction, the second data manipulation instruction interacting with said internal state; and breaking a detectable interaction of the first data manipulation instruction and the second data manipulation instruction by executing a third data manipulation instruction utilizing an unpredictable data item.
    Type: Application
    Filed: May 15, 2015
    Publication date: March 23, 2017
    Applicant: Cryptography Research, Inc.
    Inventors: Sami James Saab, Pankaj Rohatgi, Craig E. Hampel
  • Publication number: 20170061121
    Abstract: A side-channel attack resistant circuit topology for performing logic functions. This topology includes combinatorial logic to perform the at least one logic function. A logic input selector alternately supplies, in response to a first timing reference signal, an input to the combinatorial logic with noise generating input values and valid input values. A first latch input selector alternately supplies, in response to the first timing reference signal, a first memory element input with noise generating input values and valid logic output values. The valid logic output values are received from the combinatorial logic. A first memory element latches the valid logic output values in response to a second timing reference signal.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Applicant: Cryptography Research, Inc
    Inventors: Roberto Rivoir, Elke De Mulder, Jean-Michel Cioranesco
  • Patent number: 9584509
    Abstract: The embodiments described herein describe technologies for ticketing systems used in consumption and provisioning of data assets, such as a pre-computed (PCD) asset. A ticket may be a digital file or data that enables enforcement of usage count limits and uniqueness issuance ore sequential issuance of target device parameters. On implementation includes an Appliance device of a cryptographic manager (CM) system that receives a Module and a ticket over a network from a Service device. The Module is an application that securely provisions a data asset to a target device in an operation phase of a manufacturing lifecycle of the target device. The ticket is digital data that grants permission to the Appliance device to execute the Module. The Appliance device verifies the ticket to execute the Module. The Module, when executed, results in a secure construction of a sequence of operations to securely provision the data asset to the target device.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: February 28, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Michael Hamburg, Benjamin Che-Ming Jun, Paul C. Kocher, Daniel O'Loughlin, Denis Alexandrovich Pochuev, Ambuj Kumar
  • Patent number: 9576133
    Abstract: A device includes storage hardware to store a secret value and processing hardware coupled to the storage hardware. The processing hardware is to receive an encrypted data segment with a validator and derive a decryption key using the secret value and a plurality of entropy distribution operations. The processing hardware is further to verify, using the received validator, that the encrypted data segment has not been modified. The processing hardware is further to decrypt the encrypted data segment using the decryption key to produce a decrypted data segment responsive to verifying that the encrypted data segment has not been modified.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: February 21, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Paul C. Kocher, Pankaj Rohatgi, Joshua M. Jaffe
  • Patent number: 9571472
    Abstract: The embodiments described herein describe technologies for a device definition process to establish a unique identity and a root of trust of a cryptographic manager (CM) device, the CM device to be deployed in a CM system. The device definition process can take place in a device definition phase of a manufacturing lifecycle of the CM device. One implementation includes a non-transitory storage medium to store an initialization application that, when executed by a CM device, causes the CM device to perform a device definition process to generate a device definition request to establish the unique identity and the root of trust. In response to the device definition request, the initialization application obtains device identity and device credentials of the CM device and stores the device definition request in storage space of a removable storage device.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: February 14, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Denis Alexandrovich Pochuev, Yogesh Swami, Daniel O'Loughlin
  • Patent number: 9571289
    Abstract: Methods and devices disclosed herein use techniques to resist glitch attacks when computing discrete-log based signatures. The methods and systems described herein replace the random nonce in conventional signature systems with a pseudorandom nonce derived in a deterministic way from some internal state information, such as a secret key or a counter, such that the nonce is not repeated. The methods and systems described herein may also use tests to verify that a glitch has not occurred or been introduced.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: February 14, 2017
    Assignee: Cryptography Research, Inc.
    Inventor: Joshua M Jaffe
  • Patent number: 9569628
    Abstract: To prevent piracy, audiovisual content is encrypted prior to transmission to consumers. A low-cost, high-security cryptographic rights module (such as a smartcard) enables devices such as players/displays to decode such content. Security-critical functions may be performed by the cryptographic module in a manner that allows security compromises to be addressed by upgrading or replacing cryptographic modules, thereby avoiding the need to replace or modify other (typically much higher-cost) components. The security module contains cryptographic keys, which it uses to process rights enablement messages (REMs) and key derivation messages (KDMs). From a REM and KDM, the security module derives key data corresponding to content, uses public key and/or symmetric cryptography to re-encrypt the derived key data for another device, and provides the re-encrypted key data to the decoding device. The decoding device then uses cryptographic values derived from the re-encrypted key data to decrypt the content.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: February 14, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Paul C. Kocher, Benjamin C. Jun, Joshua M. Jaffe
  • Patent number: 9569616
    Abstract: A method of and system for gate-level masking of secret data during a cryptographic process is described. A mask share is determined, wherein a first portion of the mask share includes a first number of zero-values and a second number of one-values, and a second portion of the mask share includes the first number of one-values and the second number of zero-values. Masked data values and the first portion of the mask share are input into a first portion of masked gate logic, and the masked data values and the second portion of the mask share are input into a second portion of the masked gate logic. A first output from the first portion of the masked gate logic and a second output from the second portion of the masked gate logic are identified, wherein either the first output or the second output is a zero-value.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: February 14, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Andrew John Leiserson, Mark Evan Marson, Megan Anneke Wachs
  • Patent number: 9569623
    Abstract: A computing device includes a secure storage hardware to store a secret value and processing hardware comprising at least one of a cache or a memory. During a secure boot process the processing hardware loads untrusted data into at least one of the cache or the memory of the processing hardware, the untrusted data comprising an encrypted data segment and a validator, retrieves the secret value from the secure storage hardware, derives an initial key based at least in part on an identifier associated with the encrypted data segment and the secret value, verifies, using the validator, whether the encrypted data segment has been modified, and decrypts the encrypted data segment using a first decryption key derived from the initial key to produce a decrypted data segment responsive to verifying that the encrypted data segment has not been modified.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: February 14, 2017
    Assignee: Cryptography Research, Inc.
    Inventors: Paul C. Kocher, Pankaj Rohatgi, Joshua M. Jaffe
  • Patent number: 9563729
    Abstract: A first signal and a second signal associated with a circuit may be identified. A first count of a number of times that the second signal is associated with a transition when the first signal is at a first value may be determined. Furthermore, a second count of a number of times that the second signal is associated with a transition when the first signal is at a second value may be determined. A value corresponding to the dependence between the second signal and the first signal may be calculated based on the first count and the second count.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: February 7, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Andrew John Leiserson, Megan Anneke Wachs
  • Patent number: 9553722
    Abstract: A first key associated with a plurality of devices may be received. Furthermore, a second key associated with a single device may be received. The first key associated with the plurality of devices may be modified based on a device identification of the single device. Additionally, a primary key may be generated based on the modified first key and the second key.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: January 24, 2017
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Benjamin Che-Ming Jun, Ambuj Kumar