Patents Assigned to Design Technology, Inc.
  • Publication number: 20050049846
    Abstract: There is provided a method of performing a timing soft error check on a simulated circuit. The method comprises creating a critical-path circuit or using a full-chip circuit to be analyzed of the circuit. Next, the circuit is simulated based on an initial minimum optimization parameter and an initial maximum optimization parameter. A maximum and minimum primary criterion parameter are calculated for each of the minimum and maximum optimization parameters. If the minimum and maximum optimization parameters do not indicate the same status (i.e., both succeed or both fail), then a new current optimization parameter is determined. The circuit is then simulated using the new current optimization parameter. If the simulation is successful, then a timing soft error check is performed. If the simulation is not successful, then it is determined if the primary criterion parameter is converging. If the primary criterion parameter is not converging, then the current optimization parameter is set to a new value.
    Type: Application
    Filed: December 5, 2003
    Publication date: March 3, 2005
    Applicant: Legend Design Technology, Inc.
    Inventors: You-Pang Wei, Yuhung Liao, Mingchi Liu, YuJiao Ping
  • Publication number: 20050049845
    Abstract: In accordance with the present invention there is provided a method of simulating a memory circuit design in order to verify the signal strength of bit lines. The method begins by identifying circuit elements of the memory circuit design. Next, a memory circuit path is extracted from the circuit elements. The memory circuit is simulated and the maximum voltage difference between bit lines is measured. The maximum voltage difference is measured to a noise margin in order to verify the signal strength of the bit lines.
    Type: Application
    Filed: December 5, 2003
    Publication date: March 3, 2005
    Applicant: Legend Design Technology, Inc.
    Inventors: You-Pang Wei, Yuhung Liao, Mingchi Liu, YuJiao Ping
  • Publication number: 20050050498
    Abstract: In accordance with the present invention there is provided a method for determining an optimized parameter for a circuit simulation. A circuit path for the simulation is determined, and maximum and minimum optimization parameters are decided. Next, the circuit path is simulated using the maximum optimization parameter. The circuit path is simulated using the minimum optimization parameter and a primary criteria parameter is also calculated. The simulations are compared to determine whether the same status (both succeed or both fail) is generated for both the minimum optimization parameter and the maximum optimization parameter. If the simulations do not indicate the same status, then the optimization parameter is recalculated and the circuit is simulated until the primary criteria parameter converges to a prescribed value.
    Type: Application
    Filed: December 5, 2003
    Publication date: March 3, 2005
    Applicant: Legend Design Technology, Inc.
    Inventors: You-Pang Wei, Yuhung Liao, Mingchi Liu, YuJiao Ping
  • Publication number: 20050049844
    Abstract: In accordance with the present invention there is provided a method for performing a glitch check in simulating a circuit. Current maximum and minimum values for optimization parameters of the circuit are determined. Next, a signal pulse characteristic for the circuit simulation is determined based on the maximum and minimum optimization parameters. A current averaged optimization parameter is determined from the current maximum and minimum optimization parameters. A prime criterion parameter is calculated based on the optimization parameters and the signal pulse characteristic value. If the prime criterion parameter converges into a specified range then measurement results from the circuit simulation are parsed and reported as final. If the prime criterion parameter does not converge, then the process continues by recalculating the optimization parameters until the prime criterion parameter converges.
    Type: Application
    Filed: December 5, 2003
    Publication date: March 3, 2005
    Applicant: Legend Design Technology, Inc.
    Inventors: You-Pang Wei, Yuhung Liao, Mingchi Liu, YuJiao Ping
  • Publication number: 20050006132
    Abstract: Cables including a plurality of twisted pairs of insulated conductors and a core disposed between the plurality of twisted pairs of insulated conductors so as to separate at least one of the plurality of twisted pairs of insulated conductors from others of the plurality of twisted pairs of insulated conductors. In one example, a cable may include a jacket having a plurality of protrusions. In another example, the core may include one or more pinch points to facilitate breaking of the core. In yet another example, two or more cables may be bundled, and possibly twisted, together to form a bundled cable.
    Type: Application
    Filed: November 10, 2003
    Publication date: January 13, 2005
    Applicant: Cable Design Technologies Inc., dba Mohawk/CDT
    Inventor: William Clark
  • Patent number: 6812408
    Abstract: An improved data telecommunications cable includes a plurality of twisted pairs of insulated conductors and at least one configurable tape separator disposed between the plurality of twisted pairs of insulated conductors along a longitudinal length of the cable. The communications cable also includes a jacket assembly enclosing the plurality of twisted pairs of insulated conductors and the configurable tape separator. The configurable tape separator separates at least one of the plurality of twisted pairs of insulated conductors from others of the plurality of twisted pairs of insulated conductors with a spacing sufficient to provide a desired crosstalk isolation between each of the plurality of twisted pairs of insulated conductors. The configurable tape separator may include a dielectric tape and one or more conductive or partially conductive layers.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: November 2, 2004
    Assignee: Cable Design Technologies, Inc.
    Inventors: William Clark, Joseph Dellagala, Kenneth Consalvo
  • Publication number: 20040205983
    Abstract: The present invention provides soles, platforms, or inserts incorporated into footwear, preferably athletic footwear, designed to promote a more efficient running technique by an energy-translating sole comprising one or more angular displacement members, balance-thrust members, and counterbalance as well as conventional features. Systems and methods of the present invention promote more efficient running technique by facilitating foot-strike to occur at a point under and behind the runner's center of gravity. This may be accomplished, for example, by a foot-strike member, angular displacement member and balance-thrust member working cooperatively to displace the runner's center of gravity and translate gravitational, inertial and ground reaction forces, as well as muscular tension forces, into linear momentum.
    Type: Application
    Filed: May 18, 2004
    Publication date: October 21, 2004
    Applicant: Sydney Design Technologies, Inc.
    Inventor: Daniel Talbott
  • Patent number: 6787694
    Abstract: The present invention includes a twisted pair cable having a plurality of pairs, wherein each has two conductors. Each of the conductors is covered with an inner layer insulator and an outer layer insulator, wherein the positioning of the conductors within the inner and outer insulators is eccentric with respect to the inner and outer insulators. This invention also includes a method of making a cable of the same configuration.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: September 7, 2004
    Assignee: Cable Design Technologies, Inc.
    Inventors: Gavriel Vexler, Gilles Gagnon
  • Patent number: 6715607
    Abstract: A storage package for a recording medium having a first frame component having at least one side and a first engagement end and a second frame component having at least one side and a second engagement end, each of the first and second frame components configured to hingedly engage each other and at least one of the first and second frame components having at least one side that receives a blank. The blank includes a plurality of generally planar panels defined by scores which can be slidably inserted into at least one of the receiving portions of the frame components. When the blank is inserted into the first and the second frame components in an engaged position, an enclosable space for placement of a recording medium is formed.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: April 6, 2004
    Assignee: Pinnacle Design Technologies, Inc.
    Inventor: Thomas D. Wetsch
  • Publication number: 20040045846
    Abstract: A storage package for a recording medium having a first frame component having at least one side and a first engagement end and a second frame component having at least one side and a second engagement end, each of the first and second frame components configured to hingedly engage each other and at least one of the first and second frame components having at least one side that receives a blank. The blank includes of a plurality of generally planar panels defined by scores which can be slidably inserted into at least one of the receiving portions of the frame components. When the blank is inserted into the first and the second frame components in an engaged position, an enclosable space for placement of a recording medium is formed.
    Type: Application
    Filed: August 13, 2003
    Publication date: March 11, 2004
    Applicant: Pinnacle Design Technologies, Inc.
    Inventor: Thomas D. Wetsch
  • Publication number: 20030217863
    Abstract: An improved data telecommunications cable according to the invention includes a plurality of twisted pairs of insulated conductors, and a substantially flat configurable dielectric separator disposed between the plurality of twisted pairs of insulated conductors along a longitudinal length of the telecommunications cable. The data communications cable also includes a jacket assembly enclosing the plurality of twisted pairs of insulated conductors and the substantially flat dielectric pair separator. The substantially flat dielectric pair separator separates each twisted pair of insulated conductors from every other twisted pair of insulated conductors with a spacing sufficient to provide a desired crosstalk isolation between each of the plurality of twisted pairs of insulated conductors.
    Type: Application
    Filed: January 3, 2003
    Publication date: November 27, 2003
    Applicant: Cable Design Technologies, Inc.
    Inventors: William Clark, Joseph Dellagala, Kenneth Consalvo
  • Patent number: 6596944
    Abstract: A cable exhibiting reduced crosstalk between transmission media includes a core having a profile with a shape which defines spaces or channels to maintain a spacing between transmission media in a finished cable. The core is formed of a conductive material to further reduce crosstalk. A method of producing a cable introduces a core as described above into the cable assembly and imparts a cable closing twist to the assembly.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: July 22, 2003
    Assignee: Cable Design Technologies, Inc.
    Inventors: William T. Clark, Peter D. MacDonald, Joseph Dellagala
  • Patent number: 6589033
    Abstract: The present invention provides a unitary sliding-vane type compressor-expander comprising a housing with a compressor inlet and outlet, and an expander inlet and outlet. A single rotor is disposed therein defining in cooperation with the housing a compression chamber on one side and an expansion chamber on the opposite side. The rotor includes a plurality of regularly spaced vanes slidingly disposed in slots about the periphery of the rotor. The bottoms of the vane slots may be vented through a passage in the housing to the inlet air, or alternatively through a groove between the vane and vane slot to the compression or exhaust chambers. Permanent magnets are used in the vanes and housing to increase or decrease the contact force between the vane tip and housing. An integral condenser-humidifier is provided in the path of the expanded gas exhausting from the turbine outlet for condensing water out of the expanded gas and returning the condensed water to the compressor-expander.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: July 8, 2003
    Assignee: Phoenix Analysis and Design Technologies, Inc.
    Inventors: Mark C. Johnson, Eric R. Miller, Jason L. Addink, Jorge L. Rosales, Bradley B. Rogers
  • Patent number: 6570095
    Abstract: An improved data telecommunications cable according to the invention includes a plurality of twisted pairs of insulated conductors, and a dielectric pair separator formed with a plurality of folds, to provide a plurality of grooves extending along a longitudinal length of the dielectric filler. Each twisted pair of insulated conductors is disposed within a groove of the dielectric pair separator. The data communications cable also includes a jacket assembly enclosing the plurality of twisted pairs of insulated conductors and the dielectric pair separator. The dielectric pair separator separates each twisted pair of insulated conductors from every other twisted pair of insulated conductors with a spacing sufficient to provide a desired crosstalk isolation between each of the plurality of twisted pairs of insulated conductors.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: May 27, 2003
    Assignee: Cable Design Technologies, Inc.
    Inventors: William Clark, Joseph Dellagala, Kenneth Consalvo
  • Patent number: 6561721
    Abstract: A cable bolt comprises a cable with a tubular yielding fixture at one of its ends. The pull-off load of such yielding fixture can be adjusted to a desired value. This is achieved by unwinding one end of the cable and inserting a slug over the kingwire. Then, the peripheral wires are wound again over the kingwire forming a bulge in the cable where the slug is located. The yielding fixture is then slid on the cable and forced over the bulged portion of the cable, while measuring the load required to achieve this operation, which also becomes the pull-off load of the yielding fixture. Finally, any part of the cable protruding from the fixture is cut-off to form the cable bolt with the desired yielding fixture at its end.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: May 13, 2003
    Assignee: Mine Design Technologies Inc.
    Inventors: Peter Lausch, Andrew J. Hyett
  • Publication number: 20030019655
    Abstract: A dual layer shielded electrical cable is disclosed. The cable has at least a pair of insulated conductors, a metallic shield and a jacket surrounding the shield and insulated conductors. A first jacket layer made of flame retardant material surrounds the insulated conductors. A metallic shield then surrounds the first jacket layer. A second jacket layer then surrounds and seals the metallic shield against the first jacket layer, such that the insertion of the first jacket layer provides the cable with electrical signal attenuation and impedance characteristics equivalent to that of an unshielded cable with similar conductor insulation thicknesses. In another embodiment, a dual layer plenum rated electrical cable is disclosed. The cable has at least a pair of insulated conductors and a jacket surrounding the insulated conductors. Both the first and second jacket layer are made of a low-smoke and flame-retardant materials.
    Type: Application
    Filed: July 1, 2002
    Publication date: January 30, 2003
    Applicant: Cable Design Technologies, Inc.
    Inventor: Gilles Gagnon
  • Patent number: 6441308
    Abstract: A dual layer shielded electrical cable is disclosed. The cable has at least a pair of insulated conductors, a metallic shield and a jacket surrounding the shield and insulated conductors. A first jacket layer made of flame retardant material surrounds the insulated conductors. A metallic shield then surrounds the first jacket layer. A second jacket layer then surrounds and seals the metallic shield against the first jacket layer, such that the insertion of the first jacket layer provides the cable with electrical signal attenuation and impedance characteristics equivalent to that of an unshielded cable with similar conductor insulation thicknesses. In another embodiment, a dual layer plenum rated electrical cable is disclosed. The cable has at least a pair of insulated conductors and a jacket surrounding the insulated conductors. Both the first and second jacket layer are made of a low-smoke and flame-retardant materials.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: August 27, 2002
    Assignee: Cable Design Technologies, Inc.
    Inventor: Gilles Gagnon
  • Patent number: 6414498
    Abstract: A system, an IC chip, a test structure formed on the IC chip, and a corresponding method for modeling one or more target interconnect capacitances is disclosed. The test structure comprises an interconnect configuration comprising a test interconnect and one or more target interconnects. The interconnect configuration has, for each target interconnect, a corresponding target interconnect capacitance between the test interconnect and the target interconnect. The test structure also comprises a test interconnect charging circuit connected to the test interconnect. The test interconnect charging circuit is configured to place a test charge on the test interconnect. The test structure further comprises one or more target interconnect charging circuits. Each target interconnect charging circuit is connected to a corresponding target interconnect.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: July 2, 2002
    Assignee: Celestry Design Technologies, Inc.
    Inventor: James C. Chen
  • Patent number: 6412173
    Abstract: The present invention provides a very compact, lightweight, turbomolecular pump for evacuating a chamber at volumetric flowrates of less than 10 liters per second. In one embodiment a turbomolecular pump is provided having a bladed rotor disposed within a housing, and mounted for rotation at one end on a passive magnetic main bearing and at the other end on a ball bearing. The pump is configured such that the magnetic bearing carries a majority of the rotor unbalance load. The rotor may be beneficially tapered from a larger diameter at the high vacuum end to a smaller diameter at the low vacuum end. The invention also provides a method of machining the blades of the rotor from a rotor blank using a single point tool in a two-step numerical control lathe operation. In another method of the invention, the rotor blades are individually cut using a high speed circular slitting saw by plunging the saw radially into the rotor blank.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: July 2, 2002
    Assignee: Phoenix Analysis and Design Technologies, Inc.
    Inventors: Mark C. Johnson, Michael R. McNamee, Jason L. Addink
  • Publication number: 20020067641
    Abstract: In the prior arts a twin MONOS memory erase is achieved by applying a positive bias to the bit diffusion and a negative bias to the control gate. The other word gate and substrate terminals are grounded. But the voltage of word gate channel adjacent to the control gate can dramatically influence erase characteristics and speed, due to the short control gate channel length, which is a few times of the carrier escape length. A negative voltage application onto the word gate enhances erase speed, whereas a positive channel potential under the word gate reduces erase speed. By effective biasing of the memory array, word line or even single memory cell level erase is possible without area penalty, as compared to erase blocking by triple well or physical block separations of prior art. Near F-N channel erase without substrate bias application and program disturb protection by word line voltage are also included.
    Type: Application
    Filed: December 5, 2001
    Publication date: June 6, 2002
    Applicant: Halo Lsi Device & Design Technology Inc.
    Inventors: Seiki Ogura, Tomoko Ogura, Tomoya Saito