Abstract: A phase-locked loop for the color subcarrier signal in a television receiver is opened for non-sychronizable signals and the voltage controlled oscillator oscillates on a predetermined frequency. The lock in characteristic of the phase-locked loop is thereby improved.

Abstract: To achieve improved and, in particular, optimum deflection correction of television picture tubes the sawtooth signal from the horizontal or vertical oscillator which is conventionally subjected to a correction, is left uncorrected. Per line, the time relation of the digital video signal controlling the picture tube via digital-to-analog converters is changed with respect to the time relation of the video signals as reconditioned with the aid of a video processor, i.e., by the correcting value depending on the respective locus of an image spot on the screen. Accordingly, the deflection correction is not carried out by influencing deflection means, but by a corresponding correction of the time relation of the video signals with respect to their loci on the picture screen.

Abstract: A generator circuit according to the invention generates two 90.degree. phase-shifted frequency-variable sinusoidal signals by mixing the output signal of a fixed-frequency oscillator and of a continuously variable oscillator with the aid of two multipliers operating as mixers. The fixed-frequency signal is applied to the second multiplier via a 90.degree. phase shifter. The output signal of the multipliers which contains the sum and the difference frequency of its input signals, is respectively fed to a low-pass filter or to a band-pass filter, which suppresses the sum frequency or the difference frequency respectively. By the 90.degree. phase shifter, the sinusoidal signal is phase-shifted with respect to the sinusoidal signal by exactly 90.degree.. During the continuous variation process, the signal as applied to the 90.degree. phase shifter remains stable in its frequency, whereas the output signal of the continuously variable oscillator as fed directly to the two multipliers, is changed in its frequency.

Abstract: A high definition TV receiver includes a single frame memory arranged with three memory areas, three multiplexers, a movement detector, a half image interpolator and a control circuit to provide flicker-free video reproduction.

Abstract: The burst signal existing on the back porch of the composite color signal is brought to a predetermined normalized value with the aid of an amplitude control loop. In order to further increase the gain of a multiplier provided for in the control loop the multiplier is preceded by a premultiplier of simple design, whose multiplication factor is capable of being switched over in powers of two. A multiplication factor setting signal, is converted via a code converter into two control signals, with the first control signal setting the multiplication factor of the premultiplier, and with the second control signal setting the multiplication factor of the multiplier.

Abstract: A subcircuit for the demodulation of SECAM color-television signals has two signal paths each including a low-pass filter (tp1, tp2) which has the transfer function H(z)=(1+ z.sup.-1).sup.5. The amount of area required by the subcircuit on an integrated-circuit chip is thus kept small.

Abstract: A digital signal derived from an analog signal by means of an analog-to-digital converter clocked by a clock signal is fed to a first delay element and a 90.degree. phase shifter at the same time. The delayed digital signal is applied through a second delay element to one input of a first multiplier and directly to the other input of this multiplier. In similar fashion, the signal at the output of the 90.degree. phase shifter is applied directly to one input of a second multiplier and through a third delay element to the other input of this multiplier. The output signals of the multipliers are combined in an adder to provide the demodulated digital signal. In accordance with the invention, multiple multiplications and a signal mixture to form the Hilbert-transformed signal, which are necessary in the known prior art, can be avoided.

Abstract: An essentially digital circuit is disclosed in which a demodulated broadcast signal is digitized by an analog-to-digital converter and processed in three signal paths each including a tuned filter. The tuned filters have closely adjacent resonance frequencies, the same resonance curves, and the same resonance rises. The signals at the outputs of these three signal paths are so evaluated by means of four comparators and an RS flip-flop that the message tone signal appears at the Q output of the flip-flop only in the presence of the message tone frequency.

Abstract: A digital phase detector for processing digital signals consisting of words containing more than 10 bits eliminates the need for a large read-only memory for arc tan values and requires only individual read-only memories for the arc tan values 2.sup.-r, where r=1 . . . n. n-1 like stages are provided each of which consists of an adder, a subtracter, two constant multipliers for the factor 2.sup.-r, and three changeover switches. The nth stage contains a constant multiplier for 2.sup.-n, a subtracter, and a changeover switch. The outputs of one of the changeover switches in each of the like stages and of the changeover switch in the nth stage are coupled to the inputs of a multiple-input adder whose output provides the phase detected digital signal. In a second variant of the solution, only j stages contain the above-mentioned subcircuits, while the other stages are simplified to form cells each of which contains only one constant multiplier, a subtracter with associated changeover switch, and an inverter.

Abstract: A semiconductor memory cell includes a source-drain series connection of several memory transistors each comprising electrically floating gates and being of the depletion type, with a selection transistor being disposed between a first bit line and a second bit line. The memory cell remains programmable as long as one of the series-arranged memory transistors has an injector oxide free from defects. The memory transistors having an injector oxide damaged by a breakdown are not programmable but do not affect the programmability of the respective semiconductor memory cell.