Abstract: The present document describes a power converter configured to convert electrical power at an input voltage at an input of the power converter to electrical power at an output voltage at an output of the power converter. The power converter comprises a first upper capacitor and a first lower capacitor, which are coupled with one another via a first mid node; a second upper capacitor and a second lower capacitor, which are coupled with one another via a second mid node; an inductor; and a set of power switches. In addition, the power converter comprises a control unit which is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first main state and in a second main state in a mutually exclusive manner.

Abstract: A driver for driving a switched-mode power supply is presented. The driver receives a set of input signals. Each input signal is configured for changing a state of an associated power switch from a first state to a second state. The driver generates an output signal to change the state of the associated power switch from the first state to the second state. When the first state is an on state and the second state is an off state, the driver asserts the output signal to change the state of the associated power switch to perform an on-off transition. When the first state is the off state and the second state is the on state, the driver delays the assertion of the output signal to perform an off-on transition by a predetermined delay time, so that the off-on transition is delayed until all intended on-off transitions have occurred.

Abstract: A switching power converter is provided with a one-shot bias boosting circuit that responds to a premature trip point to boost the performance of a linear comparator in a pulse width modulator. In a sense-amplifier based implementation of the comparator, a clock-edge generator boosts the performance of the sense amplifier at the premature trip point.

Abstract: The present document relates to power converters. A power converter may be configured to convert an input voltage at an input of the power converter into an output voltage at an output of the power converter. The power converter may comprise a first switching circuit with a first inductor, a first high-side switching element, and a first low-side switching element. The power converter may comprise a second switching circuit with a second inductor, a second high-side switching element, and a second low-side switching element. The power converter may comprise a capacitive element having a first terminal coupled to the first high-side switching element and to the second high-side switching element and having a second terminal coupled to the first low-side switching element at a first node. The power converter may comprise a third switching element coupled between the first node and the output of the power converter.

Abstract: An apparatus for a first current sensor for a switching converter has an inductor and a first switch. The first switch is arranged to selectively couple the inductor to a first voltage. The first current sensor generates a first output current that is dependent on an inductor current flowing through the inductor The first current sensor compensates for an error arising due to the first switch in the generation of the first output current. The apparatus provides an improved current sensor for a switching converter that overcomes or mitigates the problem of errors in the measurement of a current.

Abstract: A single/Multi-phase PMIC built on silicon substrate with coil layers processed on top of the PMIC layers' is provided. The integrated coil is in a spiral form, with a gap at the center of the coil, making additional metal routing not required. The integrated coil has connection pads located in the center gap of the spiral form, limiting the overall inductor resistance to the device only. The on-die inductor may have a magnetic core wrapping the windings. The spiral form may be implemented in a circular design, or a racetrack (elongated spiral) design. The coil layers may be implemented as multiple coil layers or as a single coil layer, connected in parallel (with the same I/O pads), reducing the resistance and maintaining the inductance.

Abstract: A method of charging a battery having a first voltage and a second voltage. In a first phase, applying a constant current to the battery; in a second phase, applying current pulses to the battery; repeating iteratively sampling the first voltage during a current pulse to obtain a measurement of the first voltage; sampling the first voltage during a current pause to obtain a measurement of the second voltage; generating a dynamic reference voltage based on the fixed reference voltage and on a difference between the measurement of the first voltage and the second voltage. There is a comparing the measurement of the first voltage with the dynamic reference voltage. There is a stopping of the current pulses when the measurement of the first voltage is equal to the dynamic reference voltage and the measurement of the second voltage is equal to the fixed reference voltage.

Abstract: A power converter is presented. The power converter may be configured to receive an input voltage at an input node of the power converter and to generate an output voltage at an output node of the power converter. The power converter may comprise an inductor coupled between an inductor node and the output node. The power converter may comprise a flying capacitor coupled between a first capacitor node and a second capacitor node. The power converter may comprise a first switching element coupled between the input node and the first capacitor node. The power converter may comprise a second switching element coupled between the second capacitor node and the inductor node. The power converter may be configured to, during a first phase of a buck operation mode, open the second switching element such that the second capacitor node is isolated from the inductor node.

Abstract: A ripple reduction circuit for use with an AC/DC power supply providing an output voltage to a load is presented. The ripple reduction circuit includes an input terminal for receiving the output voltage and a low pass filter. The low pass filter is used to filter an AC component of the output voltage to obtain a filtered DC voltage. The ripple reduction circuit generates a reference current based on the filtered DC voltage and a control voltage having an AC component in phase with the AC component of the output voltage.

Abstract: A system for providing end-to-end data protection between a transmitting end device and a receiving end device is presented. The system has a transmitting end device to calculate a first check value for a first message, which has first and second data blocks; the receiving end device; and a remapping device. The remapping device is configured to remap a data block among the first and second data blocks for generating a second message for the receiving end device. The remapping device also determines a remapping value based on the data block and the remapped data block, such that a second check value that would be calculated for the second message would be equal to the first check value, and wherein the second message comprises the other one of the first and second data blocks, the remapped data block, and the remapping value.

Abstract: A power converter configured to generate an output voltage at an output node of the power converter based on an input voltage received at an input node of the power converter is presented. In particular, the power converter may comprise a first switching element coupled between the input node and a first intermediate node. The converter also has an inductive element coupled between a second intermediate node and the output node, a second switching element with one port being coupled to the second intermediate node and a third switching element and a fourth switching element coupled in series between the output node and a reference node. The converter also has a flying capacitive element coupled between the first intermediate node and a third intermediate node between the third and fourth switching elements and a fifth switching element coupled between the first and second intermediate nodes.

Abstract: The present document relates to power converters. A power converter has a first stage coupled between an input of the power converter and an intermediate node, and a second stage coupled between the intermediate node and an output of the power converter. The first stage has a capacitive voltage divider with a first flying capacitor, and the second stage has a second flying capacitor and an inductor. On the one hand, the power converter establishes, in a magnetizing state, a magnetizing current path in the second stage from the intermediate node via the inductor to the output of the power converter. On the other hand, the power converter establishes, in a capacitive state, a parallel current path in the second stage from the intermediate node via the second flying capacitor to the output of the power converter.

Abstract: A Boost DC-DC switching converter, having a safety protection method for a short circuit to ground during normal Boost operations, is described. A short circuit protection mechanism, to be used at startup, is also described. A low current capability active clamp is activated, during a soft or hard short circuit condition, and an isolation switch is turned off. An input of the switching converter is isolated from an output of the switching converter, and the Boost switching converter is able to safely discharge high energy stored in its coil, with no external components and minimum extra silicon area.

Abstract: A switching converter with improved load transient response is provided, including a panic comparator with a reset switch, a panic latch that is set by an output of the panic comparator and reset in conjunction with a strobe timing, and a timing generator which generates reset and strobe signals. The timing generator may include a gated oscillator, enabled by the panic latch. The panic comparator may include an HPF element, configured to accelerate the panic comparator response. The switching converter may be multi-phase.

Abstract: A voltage regulator and a corresponding method of regulating a voltage are presented. The voltage regulator includes an N-type power switch, an error amplifier, and a switch capacitor circuit. The switch capacitor circuit includes a first capacitor coupled to a network of switches, the switch capacitor circuit has a first port coupled to an output the error amplifier, a second port coupled to an output terminal of the power switch, and a third port coupled to a control terminal of the power switch. The switch capacitor circuit is iteratively operable between a first phase and a second phase. In the first phase the first port is coupled to ground via a path comprising the first capacitor, and in the second phase the second port is coupled to the third port via a path comprising the first capacitor. The voltage regulator may be implemented as a low dropout regulator.

Abstract: An active pull-up circuit which is operated between an upper voltage and a lower voltage and which pulls up an intermediate node to the upper voltage in reaction to an input voltage of the pull-up circuit falling from the upper voltage to an intermediate voltage is described. The pull-up circuit comprises a first transistor having a source terminal coupled to the upper voltage, a drain terminal coupled to the intermediate node and a gate terminal coupled to the input voltage. The pull-up circuit comprises a second transistor having a source terminal coupled to the upper voltage, a drain terminal coupled to the intermediate node and a gate terminal coupled to a control node. In addition, the pull-up circuit comprises control circuitry configured to pull the control node to a voltage level of the intermediate node, subject to the input voltage falling from the upper voltage to the intermediate voltage.

Abstract: The present document relates to a timer which is counter-based and uses an asynchronous circuitry to improve the accuracy between the available clock cycles. In particular, a timer is presented which may comprise a first timer circuit configured to receive a clock signal and a trigger signal, wherein an edge of the trigger signal arrives after a first edge of the clock signal and before a second edge of the clock signal. The first timer circuit may be configured to determine, in a capture phase, a time offset interval for approximating a time interval between the first edge of the clock signal and the edge of the trigger signal.

Abstract: A method for determining one or more tests suitable for verifying that a circuit conforms to a specification is presented. The specification has at least one state machine. Example circuits are asynchronous circuits. The method includes analysing the specification to automatically determine the one or more tests for circuit verification.

Abstract: Driver circuits to invert an input signal and to generate an output signal based on the inverted input signal are presented. The voltage level of the logical high value of the output signal is adjustable. The driver circuit has a high side switching element coupled between a supply terminal and the output terminal of the driver circuit. The driver circuit has a low side switching element coupled between the output terminal of the driver circuit and a reference potential. The driver circuit has a regulation transistor, wherein a controlled section of the regulation transistor is coupled in series with the high side switching element and the low side switching element between the supply terminal and the reference potential. The driver circuit has a feedback circuit to regulate the output voltage by generating a regulation voltage at a control terminal of the regulation transistor.

Abstract: A power converter includes a first conversion circuit coupled to a first port, a second conversion circuit coupled to a second port, and a driver. The first conversion circuit has a first flying-capacitor coupled to a first network of switches, and two inductors both coupled to the second conversion circuit. The second conversion circuit has a second flying-capacitor coupled to a second network of switches. The driver drives the first and the second network of switches with a sequence of states having at least one of a first phase and a second phase. When the power converter operates as a step-down converter, the first phase charges the second flying-capacitor and the second phase discharges the second flying-capacitor. When the power converter operates as a step-up converter, the first phase discharges the second flying-capacitor and the second phase charges the second flying-capacitor.