Abstract: A panel type fan-out wafer level package with embedded film type capacitors and resistors is described. The package comprises a silicon die at a bottom of the package wherein a top side and lateral sides of the silicon die are encapsulated in a molding compound, at least one redistribution layer connected to the silicon die through copper posts contacting a top side of the silicon die, at least one embedded capacitor material (ECM) sheet laminated onto the package, and at least one embedded resistor-conductor material (RCM) sheet laminated onto the package wherein the at least one redistribution layer, capacitors in the at least one ECM, and resistors in the at least one RCM are electrically interconnected.

Abstract: It is an object of one or more embodiments of the present disclosure to provide a Multiple-Inductor Multiple-Output (MIMO) switching converter to supply several different output voltages. The combination of this MIMO converter with a booster circuit supplies one or more individual cores with current that bypasses the parasitic network. The booster circuit has a wider bandwidth or a faster response when compared to the main MIMO switching converter. The MIMO booster circuit can supply a number of cores with only a single set of shared inductors. The main advantages include a lower component count and a reduced printed circuit board footprint to support multiple cores in a Multiple-Inductor Multiple-Output. The present disclosure makes use of the low duty-cycle of the power peaks and the low statistical likelihood of these peaks occurring for all cores simultaneously.

Abstract: A power converter includes a first flying capacitor, an inductor, and a driver. A network of switches has a first switch to couple the first flying capacitor to a first port, and a second switch to couple the inductor to ground. The driver is adapted to drive the network of switches with a sequence of states that includes a first state and a second state. In the first state the ground port is coupled to a second port via a first path comprising the first flying capacitor and the inductor, and the first port is decoupled from the second port. In the second state the ground port is coupled to second port via a second path comprising the second switch and the inductor, and the first port is coupled to the second port via a third path comprising the first flying capacitor while bypassing the inductor.

Abstract: The present document describes a power converter configured to provide energy at an output based on energy provided at an input. The power converter comprises a first switch, wherein a first node is coupled to the input and wherein a second node is coupled to an intermediate point, a second switch, wherein a first node is coupled to the intermediate point and wherein a second node is coupled to an inductor point, a capacitor, wherein a first node of the capacitor is coupled to the intermediate point, a first diode element, wherein a first node is coupled to a second node of the capacitor and wherein a second node is coupled to the inductor point, a second diode element, wherein a first node is coupled to a reference port, and wherein a second node is coupled to the second node of the capacitor; and an inductor, wherein a first node is coupled to the inductor point and wherein a second node is coupled to the output.

Abstract: A flyback converter is provided with a secondary-side low-power-mode controller that detects whether a mobile device has been disconnected from the flyback converter. In response to this detection, the low-power-mode controller initiates a low-power mode of operation in which a primary-side controller is disabled to increase efficiency.

Abstract: A power converter and methods with an input terminal, a capacitor, a first output terminal, a second output terminal, an output switch between the first output terminal and the second output terminal, and an inductor are presented. A first terminal of the inductor is connected to the first output terminal. An input switch is connected between the input terminal and a first terminal of the capacitor. A first capacitive charging switch is connected between the first terminal of the capacitor and the second output terminal. A second capacitive charging switch is connected between the second output terminal and a second terminal of the capacitor. A ground switch is connected between the second terminal of the capacitor and a reference potential. The power converter can convert electrical power into electrical power for powering an external device d or into electrical power for charging an external energy storage device.

Abstract: A computer-implementable method, a computing system, and a non-transitory computer-readable medium for automating workflow for routing metal wiring structures on an integrated circuit. The method automates, monitors, and controls all tasks for an auto-routing workflow. The method retrieves the auto-routing rules definition from a centrally stored location for easy maintenance. The method allows entry of wiring auto-routing constraints. The method enables customization per the design application to control signal integrity affected by the intrinsic routing metallization parasitic. The virtual copy of the layout database allows the layout database preparation without modifying the actual project layout. The virtual copy is used as an input for the workflow system. The method keeps the project layout database up to date.

Abstract: An adaptive method to protect a DC to DC buck converter from destruction in the event of a short circuit to ground at the output is described. The short circuit protection method is small and inexpensive, and uses very low current, allowing the buck converter to remain active and protected, as it self regulates below an acceptable maximum peak current. Inductor current is sensed in the current-mode loop circuitry and an over-current comparator is used. A masking interval generator is required to mask false over-current triggers caused by converter switching-induced glitches. Simple logic is used to detect if the current-limit comparator indicates over-current at the end of the masking interval and to implement over-current pulse-skipping on genuine over-current detection.

Abstract: A method to fabricate a modular die daisy chain design for wafer level chip scale package (WLCSP) board level reliability testing is described. A wafer is provided having pairs of solder balls electrically connected to each other by underlying metal pads. The wafer is singulated into dies of any of a plurality of sizes as required for testing. Thereafter one of the singulated dies is mounted to a test printed circuit board (PCB). The pairs of solder balls are electrically connected in a daisy chain on the test PCB.

Abstract: A conductive liquid path detection circuit for detecting a conductive liquid present in a receptacle connector and/or a mating connector plug is configured for discharging an electron charge from any conductive liquid present on a connector pin in the receptacle connector and/or a mating connector plug. The conductive liquid path detection circuit charges any conductive liquid present on the connector pin with an electron charge. The circuit repeatedly samples and retains the samples of the measurements of a voltage level present at the connector pin. The conductive liquid path detection circuit then analyzes the samples of the measurements to determine a slope of the samples of the measurements of a voltage level over time; and determines when an amplitude of a final measurement of the voltage level is less than a conductive liquid detection threshold level.

Abstract: A method to provide an automated circuit design tool that mitigates or overcomes the inefficiencies present in the prior art tools ensuring a more efficient use of computer resources and a reduction in the time taken to design a suitable circuit that meets the design specification is presented. The computer-implemented method of designing a circuit configuration of a circuit, has the following steps 1) providing a first set of circuit configurations comprising one or more circuit configurations, 2) simulating each, circuit configuration of the first set of circuit configurations. In addition, the steps include: 3) scoring each, circuit configuration of the first set of circuit configurations based on a design specification and the simulation, or simulations, of step 2), and 4) providing a second set of circuit configurations comprising one or more circuit configurations that are dependent on the scores as determined in step 3).

Abstract: A Boost DC-DC switching converter, having a safety protection method for a short circuit to ground during normal Boost operations, is described. A short circuit protection mechanism, to be used at startup, is also described. A low current capability active clamp is activated, during a soft or hard short circuit condition, and an isolation switch is turned off. An input of the switching converter is isolated from an output of the switching converter, and the Boost switching converter is able to safely discharge high energy stored in its coil, with no external components and minimum extra silicon area.

Abstract: At least one redistribution layer (RDL) is provided on a silicon die. A passivation layer is deposited on the RDL. First openings having a first diameter are etched in the passivation layer where copper posts are to be formed. A seed layer is deposited over the passivation layer and within the openings. A photoresist layer is coated on the seed layer and patterned to form second openings having a second diameter over the first openings larger than the first diameter. Copper is plated on the seed layer to form copper posts filling the second openings. The silicon die is die attached to a metal substrate. A lamination layer is coated over the silicon die and the copper posts. Third openings are formed through the lamination layer to the copper posts and to metal pads on the metal substrate. Metal vias are formed in the third openings.

Abstract: An inductive current sensing method for a DC-DC switching converter is described. A sense coil is placed adjacent to a PCB track between the switching converter output and a load powered by the switching converter. A change in a magnetic field is measured around the track, generating a voltage proportional to a change in a load current. The load current is subtracted from an inductor current, when a current needed on the switching converter output is higher than a current in a steady state. In this way, output voltage undershoot or overshoot in the DC-DC switching converter is minimized.

Abstract: A pulse-width-modulated switching power converter is provided in which a comparator has a boosted speed to determine a trip point at which a ramp signal equals an error signal. In a linear comparator embodiment, a one-shot bias boosting circuit triggers an increased bias current to the linear comparator to boost the speed to determine the trip point. In a sense-amplifier-based comparator embodiment, a clock generator enables the sense-amplifier-based comparator prior to the trip point.

Abstract: Methods and systems are disclosed for protecting a host device from one or more power surges transmitted from a sink device. When a sink device is detected as being connected to the host device, a limited level of power is provided to the sink device over a power transmission line and the sink device is authenticated. A normal level of power is provided to the sink device only if the authentication is successful, otherwise a reduced level of power is provided.

Abstract: A linear regulator with indirect leakage compensation is presented. The regulator has a pass device coupled between an input voltage and an output node, a feedback loop for controlling the pass device based on a reference voltage and a feedback voltage that depends on an output voltage, an off-state device that is kept in the off-state, and a leakage compensation circuit for sinking a leakage compensation current from the output node, in dependence on a leakage current of the off-state device. The off-state device is coupled between the leakage compensation circuit and an intermediate voltage level of the linear regulator. The intermediate voltage level is a voltage level between the input voltage level and ground, with a magnitude of the intermediate voltage level being smaller than a magnitude of the input voltage level. A corresponding method of operating a linear regulator with leakage compensation is presented.

Abstract: A symmetrical layout technique for an electrostatic discharge ESD device and a corresponding power supply network is presented. The ESD device protects an electronic circuit against an overvoltage or overcurrent and contains a first contact area to establish an electrical contact with a first supply rail, a second contact area to establish an electrical contact with a second supply rail, and a third contact area to establish an electrical contact with a third supply rail. The first and third supply rails provide a first supply voltage, and the second supply rail provides a second supply voltage. Within the ESD device, an axis of symmetry passes through the second contact area, and the first contact area and the third contact area are arranged on opposite sides with regard to the axis of symmetry. The symmetrical layout technique allows flipping the orientation of the ESD device with regard to the supply rails.

Abstract: A substrate is provided having a top side and a bottom side, having redistribution layers therein, having at least one copper pillar connected to the redistribution layers on the top side and at least one copper pillar connected to the redistribution layers on the bottom side, and having at least one cavity extending partially into the bottom side of the substrate. At least one passive component is mounted onto the copper pillar on the top side and embedded in a molding compound. At least one silicon die is mounted in the cavity wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers. At least one solder ball is mounted on the at least one copper pillar on the bottom side of the substrate to provide package output.

Abstract: A switch detection circuit is provided that senses the voltage on a rectifying component for rectifying a secondary winding current through a secondary winding of a flyback converter's transformer to determine whether a power switch transistor attached to a primary winding of the transformer has ceased cycling.