Abstract: A method and an apparatus for charge recycling. The method is comprised of the steps of receiving a charge at an energy storage element from a parasitic component, storing the charge at the energy storage element, and providing the charge stored at the energy storage element to a power supply's input or output. The step of receiving the charge at the energy storage element includes operating a discharging switch to selectively couple the parasitic component with the energy storage element and receiving the charge at the energy storage element via the discharging switch when the energy storage element and the parasitic component are coupled.

Abstract: A signal generator and a method which provides a source signal with a coherent phase at arbitrary times is presented. There is provided a signal generator for generating a source signal based on a reference signal. The signal generator has a phase setting circuit with a memory circuit operable between a plurality of states. The memory circuit has a phase setting input adapted to receive a phase setting value to set the memory circuit to a known state. The signal generator is adapted to load the phase setting value at a specific time to control a phase of the source signal.

Abstract: A power converter and a method for receiving an input voltage and providing an output voltage is presented. The power converter has a switching circuit to generate the output voltage. The switching circuit has a first switch, a switch control circuit arranged to selectively operate the first switch in a first state or a second state. There is a ripple reduction circuit to set a first state duration based on a property of a load current. The load current is a current that the power converter provides to a load that is coupled to the output voltage.

Abstract: A low power signal generator and a method for generating at least one source signal based on a reference signal having a reference frequency is presented. The signal generator has a divider circuit having a resonant frequency. The generator has an adjuster adapted to adjust the resonant frequency. The divider circuit has an input to receive the reference signal and an output for providing the source signal. The divider circuit is adapted to divide the reference frequency of the reference signal by a coefficient, such that the source signal has a source frequency that is less than the reference frequency.

Abstract: An IoT device having a low power consumption mode and an operating method thereof are disclosed. An objective in accordance with an aspect of an embodiment is to provide an IoT device wirelessly communicating, without a gateway, with a terminal by only a repeater and an operating method thereof.

Abstract: A power converter for converting an input voltage at an input port into an output voltage at an output port of the power converter is described. The power converter comprises an inductor having a first inductor port and a second inductor port, wherein the second inductor port is coupled to the output port. Furthermore, the power converter comprises a flying capacitor having a first capacitor port and a second capacitor port, and a switching cell. In addition, the power converter comprises a control unit to operate the switching cell in a first sequence of operation phases to perform step-up conversion; and in a second sequence of operation phases to perform step-down conversion.

Abstract: A power system and related methods provide sense resistor fault detection and safe operation of switching power converters and connected devices such as portable electronic devices powered by the switching power converter. The power system detects an open circuit or short circuit condition of the sense resistor and controls output current of the switching power converter to ensure safe operating conditions of the power system and connected equipment. The power system can also detect initial inrush current of the connected equipment and detect a duty cycle of the switching power converter to positively detect a short circuit condition of the sense resistor.

Abstract: An under-voltage lockout (UVLO) circuit configured for indicating that an electronic device may be enabled and disabled based on threshold levels of a power supply voltage. The UVLO circuit has a non-differential comparator configured to have a fixed threshold voltage. A voltage divider having a first terminal connected to the power supply voltage and configured to adapt a compare signal applied to the non-differential comparator to be proportional the power supply voltage such that a desired threshold voltage for the power supply voltage causes the non-differential comparator to change its output state. The UVLO circuit has a hysteresis controller configured for adjusting the compare voltage such that the power supply voltage has at least two threshold voltages to cause the non-differential comparator to change states. The non-differential comparator comprises a flipped gate transistor with a gate-to-source threshold greater than a normally gated transistor.

Abstract: An apparatus for dynamic range enhancement (DRE) which receives an input signal and provides a DRE output signal is presented. The apparatus has an error correction circuit to apply an error correction factor to the input signal such that the DRE output signal provided by the apparatus is dependent on the input signal and the error correction factor. The error correction factor is representative of an error generated by the apparatus.

Abstract: A method of communication in a Bluetooth Low Energy network is presented. The network has a master device and a plurality of slave devices between a first slave device and a second slave device. The method steps include: sending from the master device to the first slave device a synchronisation delay parameter; and sending from the master device to the second slave device the synchronisation delay parameter and a relative offset parameter. At the second slave device, the method steps include determining a synchronisation time point by adding the relative offset parameter to the synchronisation delay parameter. At the synchronisation time point, the method steps include waking the first and second slave devices and sending a communication from the first slave device to the second slave device.

Abstract: A quantizer and a method for a sigma-delta modulator circuit that may be used as a component within an adaptive-noise cancelling headphone are presented. An apparatus includes a quantizer to receive an input signal with successive input values and quantizes the input signal at discrete intervals. This is done by mapping the input value of the input signal at each interval to one of a plurality of quantization levels with three or more quantization levels that are non-uniformly spaced. The plurality of quantization levels has a first portion with two or more quantization levels having the same sign and being proportional to a first fraction having one as its numerator and two to a power of a first variable as its denominator, the first variable being an integer and having a different value for each of the two or more quantization levels of the first portion.

Abstract: A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.

Abstract: A flyback converter control architecture is provided in which primary-only feedback techniques are used to ensure smooth startup and detection of fault conditions. During steady-state operation, secondary-side regulation is employed. In addition, current limits are monitored during steady-state operation using primary-only feedback techniques to obviate the need for a secondary-side current sense resistor.

Abstract: A flyback converter controller is provided with secondary-side controller that adjusts a discharge current form an output voltage rail during a communication period with a primary-side controller to maintain the output voltage within regulation.

Abstract: A radio frequency input/output circuit with a composite inductor structure is presented. The composite inductor structure has a plurality of inductors that are interwound. The composite inductor structure is implemented on a chip. The plurality of inductors are magnetically coupled. The plurality of inductors are interwound around a core. A second inductor is coupled in series with a first inductor and the first inductor is coupled in series with the third inductor. The first inductor and the third inductor are coupled at a centre tap, such that the first inductor and the third inductor form a centre-tapped coil. The centre tap is coupled to an input terminal.

Abstract: A voltage regulator and a method for generating a retention voltage for a RAM cell that is sufficiently high to prevent data loss, while minimizing leakage currents are presented. The A voltage regulator is used for generating at least one voltage. The regulator contains mirror circuitry, a leakage device coupled to the mirror circuitry, and a first resistive device coupled to the mirror circuitry via a first output node. The mirror circuitry mirrors a leakage current from the leakage device to the first resistive device, and the leakage current contributes to the generation of a first reference voltage at the first output node.

Abstract: A switching power supply controller for a switching power supply is provided that measures an input voltage through an application of a load during an input voltage measurement period following connection of the switching power supply to an AC mains. Based upon the measured input voltage, the controller adjusts a start-up delay period so that the start-up delay period is substantially constant despite variations in an AC line voltage for the AC mains.

Abstract: A switched power converter and a method are presented. The converter has a main stage with a main converter that exhibits an inductor and at least one switch to control an inductor current through the inductor. Furthermore, the switched power converter has an auxiliary stage to determine a sensed current indicative of the inductor current, and to provide or sink an auxiliary current to or from the output node, wherein the auxiliary current depends on the sensed current. In addition, the switched power converter has control circuitry to determine whether the output voltage falls below an undershoot threshold or exceeds an overshoot threshold, and to activate the auxiliary stage to provide or sink the auxiliary current, if it is determined that the output voltage falls below the undershoot threshold or exceeds the overshoot threshold.

Abstract: The disclosure provides for a slope voltage compensation circuit with an adaptive slope compensation method, in a DC-DC switching converter operating in current control mode, at duty cycles greater than 50%. The proposed solution allows for the dynamic range of useful operation to be extended, lowering the slope voltage compensation at the beginning of the cycle, and then increasing the compensation as 50% duty cycle is achieved. This method is based on voltage control instead of time, and a second phase of a clock is not required.

Abstract: A system for improving a power factor (PF) of a power converter in signal communication with a rectifier and an electromagnetic interference capacitor is disclosed. The system includes a controller and a threshold detector. The threshold detector is configured to measure and compare a rectified voltage against a threshold voltage and the controller is configured to set the power converter to a stop-mode. The power converter is set to the stop-mode at a stop-time that is less than a first zero-crossing time. The controller is further configured to set the power converter to a run-mode at a time that is past the first zero-crossing time.