Patents Assigned to Dialogic (US) Inc.
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Patent number: 10181794Abstract: A two-stage multi-phase switching power converter operates its first stage during nominal operation responsive to a nominal clocking frequency and operates its second stage during the nominal operation responsive to a second-stage clocking frequency that is greater than the nominal clocking frequency. In response to an application of a load, the first stage temporarily increases its clocking frequency from the nominal clocking frequency and implements a fixed duty cycle.Type: GrantFiled: July 27, 2018Date of Patent: January 15, 2019Assignee: DIALOG SEMICONDUCTOR (UK) LIMITEDInventors: Kevin Yi Cheng Chang, James Doyle, Erik Mentze
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Patent number: 10181792Abstract: A synchronous buck converter is provided in which a replica transistor has its drain coupled to a drain of the low-side switch transistor. A current sensing amplifier drives a scaled current into the replica transistor such that the drain-to-source voltage of the replica transistor substantially equals the drain-to-source voltage of the low-side switch. The replica transistor is much smaller than the low switch transistor such that the replica transistor's on resistance is higher by a scale factor Kf as compared to the on resistance for the low-side switch transistor.Type: GrantFiled: March 29, 2018Date of Patent: January 15, 2019Assignee: DIALOG SEMICONDUCTOR (UK) LIMITEDInventors: Mark Mercer, Kevin Dowdy, Karthik Jayaraman
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Patent number: 10181854Abstract: An input buffer circuit providing an interface between integrated circuits having differing power supply voltage sources. A voltage reference generator that produces dual reference voltages employing a flipped gate anti-doped transistor. A receiver is connected to receive the first reference voltage and the second reference voltage and the input voltage signal from an integrated circuit operating with a low power supply and transmitting with the first voltage range. The receiver has a first comparator, a second comparator, and a latching circuit. The first comparator compares receive the input voltage and the first reference voltage and the second comparator compares the input voltage and the second reference voltage for determining the output state of the receiver. The output of the receiver provides the data output signal from the input buffer.Type: GrantFiled: June 15, 2018Date of Patent: January 15, 2019Assignee: Dialog Semiconductor (UK) LimitedInventor: Daisuke Kobayashi
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Patent number: 10181801Abstract: A switching power converter is provided that transitions between output voltage modes over a delay period using at least one of an adaptive resistor and an adaptive reference voltage circuit.Type: GrantFiled: November 29, 2017Date of Patent: January 15, 2019Assignee: DIALOG SEMICONDUCTOR INC.Inventors: Jianming Yao, Weihai Huang, Honglai Wang
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Patent number: 10180697Abstract: A switching power converter is provided with a power-on-reset (POR) circuit that discharges essentially no current until a power supply voltage exceeds a POR threshold voltage.Type: GrantFiled: November 27, 2017Date of Patent: January 15, 2019Assignee: DIALOG SEMICONDUCTOR INC.Inventor: Mingsheng Peng
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Patent number: 10172557Abstract: A wearable biometric device includes a biometric sensor system adapted to measure a predetermined physiological property of a user's body at two or more different locations at the body surface and to provide for each such location an associated primary signal indicative of said measured physiological property. The device also includes a detector system adapted to detect a level of coupling of the biometric sensor system with the body at each of the locations and to provide for each of the locations an associated secondary signal indicative of said detected level of coupling and also includes a signal processing unit adapted to generate an output signal indicative of said physiological property as a function of the primary and secondary signals.Type: GrantFiled: August 26, 2016Date of Patent: January 8, 2019Assignee: DIALOG SEMICONDUCTOR (UK) LIMITEDInventors: Thomas Altebaeumer, Horst Knoedgen
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Patent number: 10178389Abstract: Systems and methods of performing rate control in scalable video encoders for use in videoconferencing, announcements, and live video streaming to multiple participant devices having diverse bandwidths, resolutions, and/or other device characteristics. The systems and methods can accommodate different target bit rates of the multiple participant devices by operating on scalable video bitstreams in a multi-layer video format, including a base layer having one or more reference video frames, and an enhancement layer having one or more disposable non-reference, predictive video frames. By adjusting the number of disposable non-reference, predictive video frames in the enhancement layer, as well as quantization parameters for the respective base and enhancement layers, the systems and methods can accommodate the different target bit rates for the respective participant devices, while enhancing the spatial and/or temporal qualities of the base and enhancement layers in the respective video bitstreams.Type: GrantFiled: January 9, 2017Date of Patent: January 8, 2019Assignee: DIALOG CORPORATIONInventors: Kyeong Ho Yang, Sangseok Park
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Patent number: 10177659Abstract: A switching mode power converter circuit and a method are presented. The circuit comprises a first transistor switch and a second transistor switch coupled in series between an input voltage level and ground. There is a control circuit for controlling switching operation of the first transistor switch and the second transistor switch. There is a detection circuit for sensing a voltage at an intermediate node arranged between the first transistor switch and the second transistor switch, for deriving an indication of a slope of the sensed voltage, and for generating a switching control signal for the control circuit on the basis of the derived indication of the slope of the sensed voltage. The control circuit sets a first timing for activating the first transistor switch and/or a second timing for activating the second transistor switch on the basis of the switching control signal.Type: GrantFiled: November 21, 2016Date of Patent: January 8, 2019Assignee: Dialog Semiconductor (UK) LimitedInventors: Francesco Dalena, Nicolo Nizza, Danilo Gerna, Enrico Pardi, Stefano Scaldaferri, Alexandre Morello, Tommaso Baldetti
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Patent number: 10177654Abstract: In one or more embodiments, a method comprises comparing an output voltage for a multi-phase DC-DC switching power converter to a reference voltage to produce an error voltage. The method further comprises, for a first inductor, generating a first dual-ramp voltage signal having a first DC voltage level, and level-shifting the first dual-ramp voltage signal to form a second dual-ramp voltage signal having a second DC voltage level different from the first DC voltage level. Further, the method comprises switching on a first power switch coupled to the first inductor according to a duty cycle determined responsive to a comparison of the second dual-ramp voltage signal to the error voltage, where the level-shifting of the first dual-ramp voltage signal adjusts the duty cycle of the first power switch to balance a current in the first inductor with a current in a second inductor for the multi-phase DC-DC switching power converter.Type: GrantFiled: October 23, 2017Date of Patent: January 8, 2019Assignee: DIALOG SEMICONDUCTOR (UK) LIMITEDInventors: Kevin Yi Cheng Chang, James Doyle
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Patent number: 10170995Abstract: A multiphase power converter and a corresponding method is presented. The multiphase power converter contains a first and a second constituent switched-mode power converter. The first constituent switched-mode power converter provides, both in a first mode of operation and in a second mode of operation, a first phase current to an output of the converter. The second constituent switched-mode power converter provides, in the second mode, a second phase current to the output of the converter. The converter switches, depending on an operation condition of the converter, between the first mode and the second mode. A first transconductance of the first constituent switched-mode power converter is adapted when switching between the first mode and the second mode. By adapting the first transconductance, unsteadiness of the output voltage of the converter occurring during the switching between both modes of operation is minimized.Type: GrantFiled: July 12, 2017Date of Patent: January 1, 2019Assignee: Dialog Semiconductor (UK) LimitedInventors: Carsten Barth, Jens Masuch
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Patent number: 10170992Abstract: A circuit and a method for power conversion and for generating an output voltage in accordance with a reference voltage are presented. The power converter has a circuit for filtering the output voltage, an error amplifier circuit that compares the reference voltage and the filtered output voltage for generating an error voltage as a result of the comparison. There is a circuit for driving one or more switching devices in dependence on the error voltage. The error amplifier circuit has a first differential circuit and a first bias current generation circuit for generating a first bias current for the first differential circuit, a second differential circuit and a second bias current generation circuit for generating a second bias current for the second differential circuit, and a circuit for redistributing the first bias current to the second differential circuit or redistributing the second bias current to the first differential circuit.Type: GrantFiled: May 21, 2018Date of Patent: January 1, 2019Assignee: Dialog Semiconductor (UK) LimitedInventors: Ibiyemi Omole, James Doyle, Jonathon Stiff, Erik Mentze
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Patent number: 10170986Abstract: A system is disclosed which allows for a multiphase Buck switching converter, where some phases operate in peak-mode current control, and some phases operate in valley-mode current control, simultaneously with the peak-mode phases. The peak-mode phases of the switching converter operate at lower frequency, and with a higher value inductor than the valley mode phases. The peak-mode phases support discontinuous control mode (DCM) operation and continuous control mode (CCM) operation, and the valley-mode phases only support CCM operation. The peak-mode phases of the switching converter are always enabled, and the valley-mode phases are only enabled at high currents. The peak-mode and valley-mode currents are matched with a peak current servo, for better efficiency.Type: GrantFiled: June 22, 2016Date of Patent: January 1, 2019Assignee: Dialog Semiconductor (UK) LimitedInventor: Mark Childs
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Patent number: 10170982Abstract: An auto-calibrated current sensing comparator is provided. A secondary dynamic comparator shares the same inputs and acts to adjust a calibration control of the current sensing comparator. The calibration control may be in the form of adjusting the offset of the current sensing comparator or adjusting a propagation delay that is added to its output.Type: GrantFiled: October 14, 2014Date of Patent: January 1, 2019Assignees: Dialog Semiconductor GmbH, Dialog Semiconductor B.V.Inventors: Marinus Wilhelmus Kruiskamp, Guillaume de Cremoux
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Patent number: 10170980Abstract: The proposed Power Management Integrated Circuit (PMIC) features the option to synchronize the charge-pump of a PMIC with the system clock, and then to swap and self-oscillate and skip pulses, when the digital controls of the PMIC send a first order to the charge-pump. The clock control circuitry of the PMIC also features the option for the charge-pump to then swap and use the system clock again, when the digital controls of the PMIC send a second order to the charge-pump. The designed transition of the clock from clock sync-mode to self-oscillate, and from self-oscillate back to clock sync-mode, does not present any phase discontinuity.Type: GrantFiled: July 7, 2015Date of Patent: January 1, 2019Assignee: Dialog Semiconductor (UK) LimitedInventor: Guillaume de Cremoux
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Patent number: 10170975Abstract: A controller for a switching power converter is provided with a single detection pin through which the controller monitors whether the switching power converter is connected to an AC mains. Should a voltage for the detection pin indicate that the switching power converter is disconnected from the AC mains, the controller asserts the detection pin voltage to trigger a bleeder circuit to discharge an X class capacitor.Type: GrantFiled: February 27, 2018Date of Patent: January 1, 2019Assignee: DIALOG SEMICONDUCTOR INC.Inventors: Guang Feng, Qifeng Shi, Jiang Yu, Qiu Sha, Yong Xiong Lin
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Patent number: 10172197Abstract: Systems, methods, and apparatus for a circuit with adaptive switching frequency control are disclosed. The method comprises operating a controller of the dimmable single-stage power converter in pulse width modulation (PWM) mode at a first switching frequency level from a maximum dimming duty-ratio level until a first dimming duty-ratio level. The method further comprises operating the controller in PWM mode, while reducing switching frequency from the first switching frequency level to a second switching frequency level, from the first dimming duty-ratio level until a second dimming duty-ratio level. Also, the method comprises operating the controller in PWM mode at the second switching frequency level from the second dimming duty-ratio level until a current command (Vipk) falls below a predetermined low limit value. Further, the method comprises operating the controller in skip mode, while reducing the switching frequency from the second switching frequency level, until a minimum dimming duty-ratio level.Type: GrantFiled: September 22, 2017Date of Patent: January 1, 2019Assignees: DIALOG SEMICONDUCTOR, INC., DIALOG SEMICONDUCTOR (UK) LIMITEDInventors: Xiaolin Gao, Zhiqiu Ye, Nailong Wang
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Patent number: 10164532Abstract: A switched mode power converter comprising a main inductor and a half bridge for providing an inductor current is described. The power converter comprises a first output power switch for directing the inductor current to a first output port and bypass circuitry for making at least part of the inductor current available for controlling the switching state of at least one of the power switches. Furthermore, the power converter comprises a control unit configured to control the first output power switch such that the inductor current is directed to the first output port within different first time intervals. Furthermore, the bypass circuitry is controlled to make the inductor current available for controlling the switching state of the at least one power switch during a non-overlapping time interval.Type: GrantFiled: March 16, 2017Date of Patent: December 25, 2018Assignee: Dialog Semiconductor (UK) LimitedInventors: Horst Knoedgen, Martin Faerber
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Patent number: 10164531Abstract: The disclosure describes an adaptive technique for generating minimum dead time in a DC-DC switching power converter, while ensuring no short circuit losses occur, resulting in efficiency improvement of the switching converter. In addition, this adaptive scheme makes sure that even the ambient conditions of the switching converter give the best decision at the ON/OFF timings of the switches. Body diode conduction feedback is detected, with reduced process sensitivity, and an algorithm is disclosed that finds the minimum dead time for a given load current, temperature, and process conditions.Type: GrantFiled: February 15, 2017Date of Patent: December 25, 2018Assignee: Dialog Semiconductor (UK) LimitedInventors: Turev Acar, Emre Topcu, Kemal Ozanoglu, Marinus Wilhelmus Kruiskamp
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Patent number: 10156862Abstract: Circuits and methods to compensate leakage current of a LDO regulator are disclosed. The compensation is achieved by a temperature dependent sink current generation, matched with its temperature dependency characteristic to the LDO regulator output transistor leakage, which has a nearly zero current consumption increase of about 50 nA at room temperature and starts sink current at temperatures about above 85 to 125 degrees Celsius, which is corresponding to a range of temperature wherein leakage currents come into account.Type: GrantFiled: December 8, 2016Date of Patent: December 18, 2018Assignee: Dialog Semiconductor (UK) LimitedInventor: Rainer Krenzke
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Patent number: 10158288Abstract: In summary, a switching circuit comprising a high side (HS) switch coupled to the output, a low side (LS) switch comprising a MOSFET coupled to the output, and a slope regulator core coupled to the gate of said low side (LS) switch configured to provide control signals to said slope regulator core. In addition, a method of providing a method of a switch circuit comprising the steps the first step, (a) providing a circuit comprising a low side (LS) switch, a high side (HS) switch, and a slope regulator wherein said slope regulator comprises a fast mode, a slope regulator mode, and a hold mode, the second step (b) activating said slope regulator, the third step (c) choosing a fast mode or a slope regulation mode, the fourth step (d) applying either a fast mode or slope regulation mode; the fifth step (e) evaluating the polarity of the signal, the sixth step (f) toggle signal hold_on if the gate is low or toggle signal hold_off if the gate is high.Type: GrantFiled: November 29, 2016Date of Patent: December 18, 2018Assignee: Dialog Semiconductor (UK) LimitedInventor: Zakaria Mengad