Abstract: A divider circuit and method for generating one or more digital signals is presented. The circuit has a first output section for generating a first digital signal. There is a first output section with an output node to output the first digital signal, and a plurality of switches with one or more control switches. The plurality of switches selectively couple the output node to a first voltage and/or to selectively couple the output node to a second voltage, thereby generating the first digital signal. The or each control switch is prevents at least one of (i) the output node being coupled to the first and second voltages simultaneously and (ii) the output node being decoupled from both the first and second voltages simultaneously.

Abstract: A method to fabricate a reconstructed panel based fan-out wafer level package is described. A reconstructed wafer panel is provided comprising a plurality of individual dies encapsulated in a first molding compound. Interconnected metal redistribution layers (RDL) separated by PSV layers are formed on top surfaces of the plurality of individual dies. Thereafter, the reconstructed wafer panel is cut into a plurality of rectangular strips. Thereafter, backend processing is performed on each of the plurality of rectangular strips.

Abstract: A DC-DC switching converter is described, with a high magnetic coupling ratio between coils connected directly to a supply and ground, and with pass-device switches connected directly to an output. The pass-device switches are driven in such a way that the coils are magnetized alternately. The DC-DC switching converter may use multiple output switches, to supply multiple outputs. The DC-DC switching converter may use different turns-ratio on the coils, to adjust the duty-cycle of the switching converter operates, for a given supply voltage to output voltage ratio.

Abstract: A synchronous rectifier controller for controlling the on and off periods of a synchronous rectifier switch transistor in a switching power converter. In particular, the synchronous rectifier controller is configured to adaptively enable and disable a deglitch filter for filtering a turn-on signal for the synchronous rectifier switch transistor. In this fashion, the synchronous rectifier switch transistor may be switched on more rapidly during periods when the deglitch filter is disabled for greater efficiency yet the switching power converter is protected by the deglitch filter when it is not disabled.

Abstract: A low dropout (LDO) device with improved linear mode comprising an error amplifier, a programmable attenuation factor circuit coupled to said error amplifier, a feedback network whose input is electrically connected to said programmable attenuation factor circuit and whose output is electrically coupled to the negative input of said error amplifier, a high side (HS) pre-drive circuit whose input is a high impedance (HiZ) mode signal, a low side (LS) pre-drive circuit whose input is a low pull-down input mode signal, a high side (HS) output stage element electrically coupled to said high side (HS) pre-drive circuit, a low side (LS) output stage element electrically coupled to said low side (LS) pre-drive circuit, and a high side sense (HSENSE) output stage element whose gate is electrically coupled to said high side (HS) pre-drive circuit, and whose gate and source are electrically connected to the output of said error amplifier.

Abstract: An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.

Abstract: A direct AC LED lighting device is provided with a controller that switches off a bleeder circuit following an initial rising edge for a post diode bridge voltage. The controller measures a first delay between a zero crossing for the post diode bridge voltage and the initial rising edge to estimate a triggering voltage for a leading edge dimmer switch. The controller determines a second delay following the initial rising edge responsive to the estimate of the triggering voltage. The controller may thus switch on the bleeder circuit at an expiration of the second delay so that bleeder circuit is only on for a duration sufficient to develop a voltage difference across the leading edge dimmer switch to equal the triggering voltage just as the post diode bridge voltage satisfies an LED threshold voltage.

Abstract: A buck-boost switching converter which receives an input voltage and provides an output voltage is presented. The converter contains a first set of switches having a first power switch and a first ground switch, a second set of switches having a second power switch and a second ground switch. A controller is arranged to send control signals to the first and second set of switches. The controller is arranged such that in a buck mode, the first set of switches operates to provide buck regulation while the second power switch is held in a closed state. In a boost mode, the second set of switches operates to provide boost regulation while the first power switch is held in a closed state, and the controller is arranged to selectively operate the buck-boost switching converter in the buck mode or the boost mode based on a length of a time period.

Abstract: A wafer level chip scale package is described. The wafer level chip scale package comprises a plurality of redistribution layer (RDL) traces connected to a silicon wafer through openings through a first polymer layer to metal pads on a top surface of the silicon wafer. A plurality of underbump metal (UBM) layers each contact one of the plurality of RDL traces through openings in a second polymer layer over the first polymer layer. A plurality of solder bumps lie on each UBM layer. A metal plating layer lies under the first polymer layer and does not contact any of the plurality of RDL traces. At least one separator lies between at least two of the plurality of RDL traces. The separator is a metal fencing between the two neighboring RDL traces or an air gap between the two neighboring RDL traces.

Abstract: A switching power converter is provided that cycles a power switch during a group pulse mode of operation to produce a train of pulses within a group period responsive to a control voltage being within a group mode control voltage range. Depending upon the control voltage, the number of pulses in each train of pulses is varied to provide a linear power delivery to the load.

Abstract: An overvoltage protection circuit for a transistor device is presented. The overvoltage protection circuit comprises a first pin coupled to a gate terminal of the transistor device, an electrostatic discharge protection circuit coupled between a second pin and a source terminal of the transistor device, a first diode coupled between the first pin and the second pin, and a second diode coupled in parallel to the first diode between the first pin and the second pin. The forward direction of the first diode is opposite to the forward direction of the second diode. In addition, A method of measuring a gate leakage current of a transistor device and a method of bonding a transistor device coupled to such an overvoltage protection circuit are presented.

Abstract: An analog-to-digital converter ADC and a method to convert an analog input signal into a digital output signal comprising N bits on, n?{0, . . . , N?1} is presented. The ADC contains a controller, a digital-to-analog converter DAC, and a comparator. The comparator generates a binary signal by comparing the analog input signal with an analog output signal of the DAC. The controller receives the binary signal generated by the comparator and generates, based on the binary signal, a digital control signal comprising N bits cn, n?{0, . . . , N?1}. The DAC generates the analog output signal based on the digital control signal generated by the controller. The controller has a register which stores a previous sum value and an adder to determine a test sum value by adding.

Abstract: The disclosure describes a DC-DC switching converter providing a peak-current servo, employing a pulse-frequency modulation (PFM) control signal and a constant on-time. A Buck, Boost, Buck-Boost, or similar switching converter that supports PFM mode is required, using a fixed on-time scheme for PFM. A final value of the coil current is sampled, and the sampled value of the coil current is compared to a target value for the coil current, to establish whether it is greater or less than the target value. The on-time of the high side device is adjusted to bring the final value of the coil current closer to the target value, using an adaptive coil current measurement.

Abstract: An electronic device is provided that includes an integrated circuit (IC) configured to regulate an output voltage for powering a light emitting diode (LED). A first transistor is configured to be switched on or off by the IC to inductively couple or decouple a main power supply bus voltage from a primary winding of a transformer to a secondary winding of the transformer connectable to the LED. A second transistor is coupled between the IC and the main power supply bus voltage, and configured to be switched on or off by the IC to selectively provide an IC power supply input voltage to the IC.

Abstract: A circuit for controlling a power supply is disclosed. The circuit has a storage element for storing energy harvested from energy sources, a backup battery, and a comparator to compare a voltage of the storage element to a reference voltage. The circuit also contains a first switch for selectively connecting the storage element to an output. A second switch connects the backup battery to the output. A switch control circuit controls the first switch to disconnect the storage element from the output and the second switch to connect the backup battery to the output, if the voltage of the storage element is below the reference voltage. The backup battery is disconnected from the output while the voltage of the storage element is below the reference voltage. The control circuit controls the second switch to disconnect the battery from the output while the voltage of the storage element is below the reference.

Abstract: A split open loop resonator antenna comprising a first electrically connected open loop structure which comprises a first slit, a second electrically connected open loop structure containing a second slit. The first electrically connected open loop structure contains a first main structure being a portion of a first open loop and a first additional structure being another portion of the first open loop. The second electrically connected open loop structure has a second main structure. The first main structure is arranged in a first plane. The first additional structure is arranged in a second plane different from the first plane. The plurality of planes are parallel to each other and the first main structure is electrically connected to the first additional structure. The first main structure and the first additional structure are arranged such that when projected in a same plane they cover first open loop shape.

Abstract: A battery fuel gauge circuit for determining the state of charge of a rechargeable battery is presented. The circuit comprises: a coulomb counter for providing values that are indicative of a charging current or discharge current provided to/by the battery; a voltage sensor; a first pre-processing unit to provide a current change estimate based on the values provided by the coulomb counter; an event filter unit to confirm whether the current change estimate exceeds a certain threshold; an electromotive force unit to determine an electromotive force value of the battery; a state of charge estimator unit to determine the state of charge of the battery based on the electromotive force value.

Abstract: A power converter comprises an inductor coupled between a switching terminal and an output terminal of the power converter, a high side switching element coupled between an input terminal of the power converter and the switching terminal, a low side switching element coupled between the switching terminal and a reference terminal, and a feedback circuit comprising a continuous comparator unit configured to compare a ramp signal with an error signal using a first enable signal, a latched comparator unit configured to compare the ramp signal with the error signal using a second enable signal, wherein the error signal is based on a difference between a reference voltage and an output voltage at the output terminal of the power converter.

Abstract: A buck-boost converter and a method are presented. The buck-boost converter comprises an inductor, a buck converter, and a boost converter. The buck converter controls switches according to a buck duty cycle, whereas the boost converter controls switches according to a boost duty cycle. The converter contains a voltage feedback loop for regulating an output voltage of the converter. A buck comparator generates the buck duty cycle signal by comparing the error voltage with a ramp voltage. A boost comparator generates the boost duty cycle signal by comparing a boost error voltage with the ramp voltage, wherein the boost error voltage is indicative of a sum of the error voltage and an offset voltage and the boost ramp voltage is indicative of a sum of the ramp voltage and the offset voltage. There is a duty cycle feedback loop for adjusting the buck and boost duty cycles.

Abstract: A circuit and method providing switching regulation configured to provide a pulse frequency modulation (PFM) mode of Operation with reduced electromagnetic interference (EMI) comprising an output stage configured to provide switching comprising a first and second transistor, a sense circuit configured to provide output current information sensing from an output stage and a current limit reference, a first digital-to-analog converter (DAC) configured to provide signal to the current limit reference, an adder function configured to provide a signal to the first digital-to-analog converter (DAC), and a linear shift feedback register (LSFR) configured to provide a signal to an adder function followed by the first digital-to-analog converter (DAC), and the LSFR receives a clock signal from said output stage.