Patents Assigned to Digital Equipment Corp.
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Patent number: 5440732Abstract: A database-management system (10) generates bounded-disorder indexes on its database keys. In such an index, the leaf nodes (51, 62) are large and are divided into a number of buckets (52, 54, 56, 58), only one of which ordinarily is accessed in any given single-record database operation. The key values in a leaf node are distributed among the leaf node's buckets in accordance with a hashing function. The lockable ranges locked for scanning functions are defined in accordance with key-valued locking, in which each lockable range is bounded by successive key values that exist in the database. But the multiple-bucket accesses that would otherwise be required, because of the hash-function distribution of key values among a node's several buckets, are avoided because the lockable ranges are defined by the sequence of key values in the bucket rather than in the node.Type: GrantFiled: February 5, 1993Date of Patent: August 8, 1995Assignee: Digital Equipment Corp., Pat. Law Gr.Inventors: David B. Lomet, Russell J. Green
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Patent number: 5434971Abstract: An apparatus for storing and retrieving data acts as an interface between modules such as data collection devices and data analysis tools. The apparatus comprises a means for storing a configuration data structure, the configuration data structure having a plurality of data items. The attributes of a data item are a name, a data type, a size, and a mapping parameter. The plurality of data items may contain administrative data, instrument identification data, global sample identification data, detection method data, raw unprocessed data, data peak processing method, data peak processing results, instrument calibration data, multicomponent sample calibration method, results from multicomponent sample calibration, sample sequence data, dimension data, control events for instrument data, reprocessing method data, and reprocessing results data. The apparatus provides the capability of maintaining a data standard so the number of translation tools needed to transfer data from one module to another is reduced.Type: GrantFiled: June 28, 1991Date of Patent: July 18, 1995Assignee: Digital Equipment Corp.Inventor: Richard S. Lysakowski, Jr.
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Patent number: 5428615Abstract: A connection apparatus for connecting a first communication system with a second communication system and a third communication system. A first frame is received from the first communication system, where the first frame has a multicast address as a destination address, and where the destination address requires the first frame to be transmitted onto the second communication system. The multicast address is translated into a functional address, and the functional address is written into a second frame transmitted onto the second communication system. The second frame is received and is transmitted onto a third communication system, and the functional address is translated into a multicast address for the third communication system, and the multicast address is written into a destination field of the frame as it is transmitted onto the third communication system. The second communication system may be a token ring system based upon an IEEE 802.Type: GrantFiled: July 21, 1994Date of Patent: June 27, 1995Assignee: Digital Equipment Corp.Inventors: Floyd J. Backes, William R. Hawe, G. Paul Koning, David J. Mitton, Radia J. Perlman
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Patent number: 5414700Abstract: A technique for establishing and maintaining full duplex communication between two stations connected to a token ring network, without physically reconfiguring the station connections or otherwise disturbing the network. Each station continually performs a two node test to ascertain whether there are only two active stations on the network, and updates a two node flag that indicates whether or only two active stations are present. The two node test uses both upstream neighbor and downstream neighbor addresses to update the two node flag, and requires validation of either one of these addresses if the other one of them appears to have changed since the previous observation. A concurrently running full duplex control process uses the two node flag and other conditions to decide whether to initiate or continue transition to full duplex mode.Type: GrantFiled: April 12, 1994Date of Patent: May 9, 1995Assignee: Digital Equipment Corp.Inventors: Henry S. Yang, Barry A. Spinney, William R. Hawe, Luc A. Pariseau
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Patent number: 5404353Abstract: A technique for controlling access to a bridge connected to at least two networks, such that network collisions are reduced, transmit live-lock conditions are eliminated, and buffer memory requirements are minimized. For at least one target network of the two networks, two dynamic lists are maintained, to keep track of data packets received from the target network and not yet forwarded, and to keep track of data packets stored for forwarding to the target network, but not yet forwarded. The target network uses a half-duplex medium and a CSMA/CD (Carrier Sense Multiple Access with Collision Detection) protocol. The invention operates by dynamically adjusting an inter packet gap (IPG) betweens data packets forwarded to the target network, such that stations on the target network are, under selected conditions, given an extended opportunity to transmit.Type: GrantFiled: May 12, 1994Date of Patent: April 4, 1995Assignee: Digital Equipment Corp.Inventors: Siman-Tov Ben-Michael, Philip P. Lozowick, Henry S. Yang
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Patent number: 5404536Abstract: Method and apparatus for scheduling operations of a network adapter in such a way as to minimize latency in processing received data packets, while still guaranteeing time for processing necessary background tasks. The method includes executing a polling loop in which repeated tests are made for the presence of receive data to process, but only a limited amount of receive data processing is performed before checking for background processing that needs to be performed. The polling loop ensures that immediate attention is given to processing of receive data, without the inherent latency of interrupt processing, but still gives periodic opportunities for background processing. Background processing is performed for a guaranteed minimum processing time before permitting a return to receive processing. Background processing may be performed without a guaranteed minimum processing time, but only when there is currently no receive processing to do.Type: GrantFiled: September 15, 1992Date of Patent: April 4, 1995Assignee: Digital Equipment Corp.Inventors: Kadangode K. Ramakrishnan, David Sawyer, Phillip J. Weeks, Douglas M. Washabaugh
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Patent number: 5330881Abstract: A microlithographic resist patterning process which allows generation of very thick, vertically-walled resist patterns which allow for subsequent deposition or etching operations can produce high recording density magnetic thin film heads and other devices requiring high aspect ratios.Type: GrantFiled: December 21, 1992Date of Patent: July 19, 1994Assignee: Digital Equipment Corp.Inventors: Alan L. Sidman, Susan K. Fung
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Patent number: 5317717Abstract: In a data processing system, apparatus and method for controlling the type of processing to which data signal groups can be subjected includes a page table entry format having a multiplicity of field positions for storing signals defining page access rights. In addition to the read/write access control, the signal group access rights can be determined by the current mode of operation of the data processing unit and the intended activity of the addressed instruction or data element (i.e., read, write or execute).Type: GrantFiled: August 20, 1992Date of Patent: May 31, 1994Assignee: Digital Equipment Corp.Inventors: David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza, Richard T. Witek
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Patent number: 5301163Abstract: A selection circuit for a bipolar ECL memory having memory cell connected to cell selection lines and, more particularly, to upper and lower wordlines. The circuit includes a line driver connected to the upper wordline, an input stage for controlling the line driver to activate the upper wordline connected thereto in response to an address signal, and a switching device responsive to the input stage for applying a discharging current to the lower word line to speed up deactivation of the memory cell in response to a change in the address signal. In one embodiment, the line driver is also turned on at an increased rate for a limited time following application of the address signal to speed up the activation of the line.Type: GrantFiled: February 3, 1992Date of Patent: April 5, 1994Assignee: Digital Equipment Corp.Inventors: Robert M. Reinschmidt, Steven C. Sullivan
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Patent number: 5294842Abstract: An update synchronizer includes a two-stage synchronization unit for generating enable signals to select an output signal from among multiple input clock signals of a clock delay multiplexer. The enable signals originate from an asynchronous control signal having a phase different from that of the clock signals. A pre-synchronization logic stage transforms the asynchronous control signal into complementary synchronous control signals for use by the clock synchronization units; these synchronous control signals, in turn, are transformed into complementary selection enable signals having phases within the domains of the input clock signals. This ensures that transitions of the enable signals occur during the same clock period.Type: GrantFiled: September 23, 1991Date of Patent: March 15, 1994Assignee: Digital Equipment Corp.Inventors: Russell Iknaian, Richard B. Watson, Jr.
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Patent number: 5278703Abstract: A data processing system records information on magnetic disks in a format in which sector headers, which include embedded servo information, are radially aligned and recorded at a single frequency and data are recorded at various band-related frequencies. The system records sector headers at a frequency which is optimal for the recording of address information in the shortest sector and records the data at frequencies which are optimal for the recording of information in the disk space allocated to the data portion of the various lengths of sectors. The system synchronizes to the headers, using conventional embedded servo synchronization methods, and produces header timing signals. It can then use the same header timing signals to locate and interpret the headers on different tracks, since the header frequency and the location of the headers are the same in every track. The system may record the data portions of the sectors at frequencies which are related to the header frequency by ratios of small integers.Type: GrantFiled: June 21, 1991Date of Patent: January 11, 1994Assignee: Digital Equipment Corp.Inventors: Bernardo Rub, Robert Frame, John E. DeRoo, Samuel B. Skraly, Anne Solli
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Patent number: 5276868Abstract: A method and apparatus for addressing compressed nodes in a database structure is disclosed in which each compressed node is associated with a particular mapping function and each element in the node is assigned a particular identification code. The character to be searched is converted into a physical address having a first portion which is used to index to a particular element in a compressed node, and a second portion which is used to verify that the selected element corresponds to the search character.Type: GrantFiled: May 23, 1990Date of Patent: January 4, 1994Assignee: Digital Equipment Corp.Inventor: Nigel T. Poole
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Patent number: 5272445Abstract: A portable resistance tester comprises a pair of regulator circuits used to drive a bridge circuit and a detector circuit when measuring the resistance values of "in-circuit" test nodes. The tester produces an audible signal when the resistance of a measured test node falls within, or without, a predetermined resistance range.Type: GrantFiled: July 1, 1992Date of Patent: December 21, 1993Assignee: Digital Equipment Corp.Inventors: Steven G. Lloyd, Hamid Partovi
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Patent number: 5265104Abstract: A data storage system including k data drives and n-k redundant drives performs a write operation to a designated sector on a data drive by (i) retrieving from each of the other data drives the data stored in a corresponding sector, (ii) encoding the symbols stored in corresponding storage locations using an (n,k) distance D Reed-Solomon code to generate, for each set of k symbols, n-k redundancy symbols, and (iii) recording the generated symbols in the corresponding storage locations on each of the redundant drives. When the system next performs a write operation directed to the designated sector or one of the corresponding sectors on the other data drives, the system records the data on the appropriate sector and simultaneously records the same data in a corresponding sector on one of the redundant drives.Type: GrantFiled: November 26, 1990Date of Patent: November 23, 1993Assignee: Digital Equipment Corp.Inventor: Lih-Jyh Weng
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Patent number: 5224214Abstract: Read-write buffer apparatus is provided for reducing the time necessary to resolve read conflicts during normal and block mode read requests. Additionally, the read-write buffer apparatus provides a means for gathering non-sequential write requests in an internal write buffer, thus reducing the frequency of a buffer full condition. The enhanced read-write buffer apparatus minimizes CPU wait states, while increasing the CPU processing rate and improves overall data processing system throughput.Type: GrantFiled: April 12, 1990Date of Patent: June 29, 1993Assignee: Digital Equipment Corp.Inventor: Mitchell N. Rosich
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Patent number: 5198758Abstract: A test register coupled to an absolute delay regulator circuit of a clock repeater chip enables complete functional testing of a clock delay path of the regulator. The test register is connected to a measurement latch of the clock path in a "logical OR" configuration with respect to a measurement delay line and is enabled during a test mode by control logic of the repeater chip. Operationally, a sequence of logic "0" bits are forced in the measurement delay line during test mode. A state machine clears the measurement latch, and then loads a test pattern into the test register. As each bit of the register is set, a corresponding bit in the measurement latch is also set to simulate a measurement cycle; the results of the "measurement" are stored in the measurement latch. Once the test pattern is loaded, the repeater chip is placed into a measurement test mode. Execution of a measurement test cycle then propagates the test pattern throughout the clock delay path of the regulator.Type: GrantFiled: September 23, 1991Date of Patent: March 30, 1993Assignee: Digital Equipment Corp.Inventors: Russell Iknaian, Richard B. Watson, Jr.
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Patent number: 5147679Abstract: A method and apparatus for providing radial uniaxial anisotropy in the soft magnetic layer of a magnetic recording disk is disclosed. While the soft magnetic layer is being deposited on the recording disk, the magnetic field. The alternating perpendicular magnetic field causes eddy currents to flow in the disk, in a circumferential direction. The eddy currents, in turn cause a magnetic field in a radial direction, thereby resulting in the desired radial uniaxial anisotropy.Type: GrantFiled: December 26, 1990Date of Patent: September 15, 1992Assignee: Digital Equipment Corp.Inventors: Michael L. Mallary, Kazuo Ishibashi, Hiroshi Sato
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Patent number: 5130275Abstract: A method for processing semiconductor chips which deters the formation of "tin whiskers" and which removes excess substrate material from the passive side of a semiconductor device is presented. The deterrence of tin whiskers is accomplished by controlling the size of the bead of flowable metal on the conductive bump. The removal of excess material from the passive side of the semiconductor device is accomplished by chemical reaction after the formation of the conductive bump.Type: GrantFiled: July 2, 1990Date of Patent: July 14, 1992Assignee: Digital Equipment Corp.Inventor: John B. Dion
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Patent number: D350341Type: GrantFiled: March 16, 1993Date of Patent: September 6, 1994Assignee: Digital Equipment Corp.Inventor: Christian C. Landry
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Patent number: D353800Type: GrantFiled: April 27, 1992Date of Patent: December 27, 1994Assignee: Digital Equipment Corp.Inventors: Mark S. Lewis, Lori A. Treseder, Ralph M. Tusler, Greg Suzda