Abstract: To execute variable-length instructions independently of instruction preprocessing, a central processing unit is provided with a set of queues in the data and control paths between an instruction unit and an execution unit. The queues include a "fork" queue, a source queue, a destination queue, and a program counter queue. The fork queue contains an entry of control information for each instruction processed by the instruction unit. This control information corresponds to the opcode for the instruction, and preferably it is a microcode "fork" address at which a microcode execution unit begins execution to execute the instruction. The source queue specifies the source operands for the instruction. Preferably the source queue stores source pointers and the operands themselves are included in a separate "source list" in the case of operands fetched from memory or immediate data from the instruction stream, or are the contents of a set of general purpose registers in the execution unit.

Abstract: A method of inhibiting diffusion into a polyimide body by organic solvents and cations comprising applying ammonia to one or more surfaces of the body prior to exposing the surface to the solvents and cations. A composite article incorporating the diffusion barrier is also disclosed.

Abstract: A tape automated bonding tape segment carries on its top surface a printed circuit interconnect conductor high-density array having a plurality of signal, power and ground conductors. Burn-in testing pads are formed on either the top surface or the bottom surface of the tape segment, or both, and are connected to selected conductors. The testing pads are spaced apart and have a relatively low density to facilitate contact with test equipment, whereby a die connected to the printed circuit array can be tested.

Abstract: A test cell for non-contact testing a circuit board for shorts and opens includes a hermetically sealable container for that circuit board, at least one wall of the container providing access to permit a circuit board to be positioned at an imaging plane inside the container. A pair of planar electrodes positioned inside the container are spaced on opposite sides of and parallel to the imaging plane and these electrodes are connected to contacts on the exterior of the container so that the electrodes can be releasably connected to an external voltage source to provide an electric field inside the container which extends perpendicular to the imaging plane. One of these electrodes and the container wall adjacent thereto are transparent to light from a pulsed laser positioned outside the container which is arranged to image a selected spot on a conductor of a circuit positioned at the imaging plane.

Abstract: An IC chip assembly includes a chip having an array of exposed contacts at a first face thereof, a substrate having an array of exposed contacts at a face thereof and a compliant interposer with exposed contacts at opposite faces thereof positioned between the chip and substrate so that contacts on the opposite faces of the interposer engage the contacts on said chip and substrate, respectively. A thermal transfer member contacts the opposite face of the chip and is engaged to the substrate so as to compress the interposer thereby simultaneously establishing relatively low inductance electrical connections between the chip contacts and the substrate contacts and good thermal contact between the chip and the thermal transfer member. The assembly is particularly adapted to provide power to the chip of a TAB-type integrated circuit assembly which includes a flexible lead frame connected between the chip and the substrate.

Abstract: A signal transmission and receiving system includes a controller or central processor unit and one or more peripheral units interconnected by a transmission line or bus having a plurality of conductors. Instead of providing terminator devices for the opposite ends of the bus in the controller and in the last peripheral unit connected to the bus, respectively, both terminator devices are located in the controller and the bus is looped back on itself so that both ends of the bus can be connected to a connector having two sets of contacts, one set being connected electrically to the conductors at one end of the bus and the other set of contacts being connected electrically to the conductos at the other end of the bus.

Abstract: A new read/write head for use in a mass storage device in a digital data processing system. The head is a thin-film head having a solenoidal coil around one or both of the pole pieces. Sets of planar conductive traces are formed on planar layers of insulating material on opposing sides of a pole piece, with vias connecting the ends of selected traces to thereby form a solenoidal coil around the pole piece.

Abstract: An IC chip assembly includes a chip having an array of exposed contacts at a first face thereof, a substrate having an array of exposed contacts at a face thereof and a compliant interposer with exposed contacts at opposite faces thereof positioned between the chip and substrate so that contacts on the opposite faces of the interposer engage the contacts on said chip and substrate, respectively. A thermal transfer member contacts the opposite face of the chip and is engaged to the substrate so as to compress the interposer thereby simultaneously establishing relatively low inductance electrical connections between the chip contacts and the substrate contacts and good thermal contact between the chip and the thermal transfer member. The assembly is particularly adapted to provide power to the chip of a TAB-type integrated circuit assembly which includes a flexible lead frame connected between the chip and the substrate.

Abstract: An assembly for mounting a head in a disk drive (such as a disk reader or servowriter), comprising a detachable load beam slider arm adapted to carry the head on a distal end thereof, and an actuator arm including a resilient clamp for releasably attaching the proximal end of the load beam slider arm to the actuator arm. Thus, the head may easily be removed and/or replaced simply by removing the head and load beam slider arm as a unit from the actuator arm and replacing it with another head-load beam slider arm unit.

Abstract: A horizontal deflection circuit for controlling the horizontal deflection of an electron beam in a cathode ray tube used, for example, in a video display. The circuit uses a plurality of MOSFET transistors, which are switched on and off in unison for switching between a scan mode and a retrace mode, the MOSFET transistors being cascaded to accommodate the high voltage levels which are developed during retrace. A retrace capacitor and retrace diode are connected between the source and drain terminals of each MOSFET transistor to ensure that the voltages are divided among the transistors so that the entire voltage does not appear across any single one if they do not all switch at precisely the same time.

Abstract: In electronic devices, such as data processing systems that operate at high frequencies, the integrity of the interconnect or coupling apparatus transferring signals between component modules is critical to prevent compromise of information being transferred. However, the interconnect or coupling apparatus is subject to both long term and to short term impedance variations. Apparatus is disclosed for testing both the long term impedance changes and the rapid fluctuations that are not observable by current testing procedures. In addition, apparatus is disclosed for providing controllable rapid impedance changes to verify the operation of test apparatus, disclosed herein, for measuring the rapid impedance changes.

Abstract: The present system includes, in a preferred embodiment, a plurality of bit map memory units which together define a large bit map memory. For each bit map memory unit there is also included a mask means and four extended shift registers. The shift registers can be loaded in parallel with pixel information through bidirectional data transmission channels which include bidirectional mask means. The pixel information can be routed through said bidirectional mask means to different address locations, or to the same address location, with certain of the pixel bits removed by the mask means. The shift registers have both serial and parallel input and output means and are clocked at different speeds to accommodate different peripherals. At least a first shift register is designed to be serially read out at a relatively high rate which can be advantageously used by a video display device or the like.

Abstract: A method for evaluating the performance of a data processor system includes data collection, analysis, and report generation. The data collection involves the periodic selection of a number of metrics, which are measurable values in the data processing system, and system parameters, which are system values that can be adjusted. The analysis involves the application of certain rules comparing metrics and parameters to corresponding thresholds. The report generation includes the display of recommendations to be taken when certain rules have triggered a certain number of times, and, if desired, the presentation of displays of certain work load characteristics of either the data processor system by itself or of a network of such data processor system.

Abstract: A multiport repeater "Hub" for interconnecting a plurality of transceiver cables to a local area network transceiver port. The hub also has an external bus which can be employed for daisy chaining up to a total of eight Hubs as a single connection to the transceiver port.

Abstract: This invention comprises the use, during the plating processing of thin-film magnetic recording media, of an oxidizing treatment immediately preceding the electroplating of the magnetic layer. This oxidizing treatment can be controlled to produce desired high levels of coercive force and low levels of media noise.

Abstract: A central processor unit sends known simulated data signals to the video display subsystem and disk storage subsystem of a computer system; the simulated data is processed by the subsystems as if it were real data and is then returned to the processor. The processed signals or their error detecting codes are compared with the corresponding information expected to be returned and an error is signalled if the returned signals differ from those expected. During the diagnostic routine, the video display is blanked and the video character generator is slowed down. In response to a known sequence of character information supplied thereto, the character generator supplies a corresponding slowed-down stream of bits representing the resulting video; this stream of bits is fed to a slow speed serial port and then to the processor, where an error detecting code is generated from the bit stream and compared to an error detecting code provided by the character generator in response to the input thereto.

Abstract: An arbitration technique for controlling access to a bit-serial bus by multiple nodes in a data processing network. Upon detection of no carrier on the bus (56), a node desiring access to the bus waits a predetermined number of quiet slots (60, 64), each slot being a predetermined interval. If that period elapses without another node's carrier being detected (64), the node desiring access is permitted to transmit (64, 68). For each node, two such delay-interval possibilities are provided, one high slot count (and, hence, low priority) and one low slot count (and, hence, high priority). The delay-interval selection for a node is switched from time to time on a round-robin basis so that all nodes get equal average priority. The high value of the delay interval is N+M+1 slots, where N is the node number and M is the maximum number of nodes allowed on the bus; the low value is N+1 slots. Initially, each node uses the former value.

Abstract: A method of manufacturing a magnetic tachometer used to generate a signal as a function of the velocity of a transducer positioning arm in a disk drive. The tachometer is formed over a one piece plastic insert having a first and second portion separated by a central breakaway region. An armature member is disposed over each of said first and second insert portion and a flexible connector is placed on a groove cut on a surface of said plastic insert. Two coils are simultaneously wound over said first and second insert portion, respectively, and connected to the flex connection. The insert is then bent to snap the breakaway region, and the resulting two coil subassemblies are folded and fastened to spacers to form a pair of fixed parallel coils. The separation between the coil is maintained at a predetermined value by the spacers to allow a magnet, attached to a counterbalance portion of a rotary positioning arm, to move therebetween and thus to generate a voltage as a function of the velocity of the magnet.

Abstract: The present invention includes a first input signal circuit to receive pulse signals from a voltage-controlled oscillator (VCO), or some other controllable pulse signal source, and a second input signal circuit to receive pulse signals from a magnetic recording medium, or some pulse signal source, with which the voltage controlled oscillator is to be put in phase synchronization. A correction signal generator circuit is connected to both the input signal circuits to provide a first correction signal in response to a pulse signal from the recording medium and to provide a second correction signal in response to a pulse signal from the VCO. There is a third circuit which monitors how long a correction signal is in effect and if such a correction signal is present for longer than a predetermined time, the third circuit terminates the correction signal to enable a new correction signal to be generated in response to the next one of said input signals to arrive.

Abstract: A disk drive comprising a first rotatable spindle for rotating removable flexible disks having magnetic surfaces for recording and retrieval of information and a motor for driving the spindle has an increased storage capacity by the addition of a second spindle driven by the motor in a direction opposite to the first spindle. The information storage capacity of the drive is further improved by increasing the track density of the disks while minimizing track seeking error of the magnetic read/write head associated with the disk. A stepper motor and lead screw are coupled to the magnetic read/write heads for radially positioning the heads to selected tracks of the received disks. The lead screw has a V-groove comprised of an alternating ramps and transition zones. As the lead screw rotates, a head carriage assembly having attached the first and second magnetic read/write heads is positioned radially by the transition zones while the ramps function to compensate for angular error of the stepper motor.