Patents Assigned to Display Technologies
-
Patent number: 5612256Abstract: A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate's rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors.Type: GrantFiled: February 10, 1995Date of Patent: March 18, 1997Assignee: Micron Display Technology, Inc.Inventor: Darryl M. Stansbury
-
Apparatus and method for maintaining synchronism between a picture signal and a matrix scanned array
Patent number: 5610667Abstract: A display apparatus for receiving a picture signal having video and synchronizing components includes a matrix of display cells arranged in an array of M columns by N rows. Display cells in the matrix are individually addressable by row and column signals so as to receive the video component of the picture signal in response thereto. A first shift circuit coupled to the matrix provides the column signals in response to a first clocking signal. A second shift circuit coupled to the matrix provides the row signals in response to a second clocking signal. A synchronizing detector or gate circuit coupled to the first and second shift circuits receives the synchronizing component of the picture signal and produces the second clocking signal in response to a preselected pointer signal from the first shift circuit. A phase locked loop circuit coupled to the first shift circuit receives the second clocking signal and produces the first clocking signal in response thereto.Type: GrantFiled: August 24, 1995Date of Patent: March 11, 1997Assignee: Micron Display Technology, Inc.Inventor: Glen E. Hush -
Patent number: 5601751Abstract: A process is provided for manufacturing high-purity phosphors having utility in field emission displays. The high-purity phosphor is a host lattice infiltrated by a dopant that activates luminescent properties therein. The lattice and dopant are initially milled together to reduce their average particle size while simultaneously achieving complete mixing between the lattice and the dopant. The resulting mixture is maintained free of a flux or substantially any other treatment agent capable of contaminating the phosphor and placed in a heating vessel formed from a substantially impervious contaminant-free material. The mixture is heated to a high temperature effectuating thorough infiltration of the dopant into the lattice structure. The use of an impervious contaminant-free heating vessel and the exclusion of flux or other treatment agents from the mixture avoids undesirable contamination and undue particle size growth of the phosphor product during the manufacture thereof.Type: GrantFiled: June 8, 1995Date of Patent: February 11, 1997Assignee: Micron Display Technology, Inc.Inventors: Charles M. Watkins, Surjit S. Chadha
-
Patent number: 5598156Abstract: A serial to parallel conversion circuit uses a dynamic shift register in a phase locked loop for an index to access a parallel holding register. The composite input signal includes serial data to be sampled and a synchronizing signal at an integer factor of the sampling serial data rate. The phase locked loop generates a control signal for sampling the serial data at a multiple of the synchronizing frequency by incorporating a delay between a variable frequency oscillator output and a phase comparator input. The delay element in one embodiment includes a shift register with a walking-one pattern that overflows to the phase comparator. The walking-one pattern is used to identify which position of the holding register should store the next sample of the input signal. The shift register is self-initialized by a logic combination of all shift register outputs. Power dissipation by the serial to parallel conversion circuit is minimal because only one 7-transistor shift register cell draws current at a time.Type: GrantFiled: January 13, 1995Date of Patent: January 28, 1997Assignee: Micron Display Technology, Inc.Inventors: Glen Hush, Jake Baker, Tom Voshell
-
Patent number: 5597150Abstract: A pilfer-resistant peg hook assembly for supporting a plurality of articles incorporating defined slots and enabling only one article at a time to be removed therefrom is formed of a peg hook and a flipper. The peg hook has a pair of opposed ends and a body connecting the same. One of the hook ends is configured and dimensioned to maintain the hook body substantially horizontal when mounted on an appropriate surface, and the other of the hook ends is a free end. The hook body is configured and dimensioned to be received in the slots of the articles and defines a vertically extending bump adjacent to but spaced from the free end. The flipper is pivotably secured adjacent the free end and is movable between an enabling orientation enabling at least partial passage of an article along the book body and onto the flipper as the article moves towards the free end, and a blocking orientation precluding passage of an article onto the flipper as the article moves towards the free end.Type: GrantFiled: March 22, 1995Date of Patent: January 28, 1997Assignee: Display Technologies, Inc.Inventors: Arthur Stein, William C. Updegrave
-
Patent number: 5593025Abstract: A foldable jewelry card, capable of securing thereto an article or articles of jewelry, includes a front panel with a forwardly facing surface and a rearwardly facing surface. An intermediate panel is hingedly connected to the front panel, and interconnects the front panel with a rear panel hingedly connected thereto. The rear panel has a forwardly facing surface, a rearwardly facing surface, and a hook portion for supporting the card on a hanger. The rear panel and the front panel are attached to one another in such a manner that the front panel is securely interlocked with the rear panel. The intermediate panel causes the front and rear panels to be at an acute angle with each other whereby the forwardly facing surface of the rear panel substantially faces the rearwardly facing surface of the front panel.Type: GrantFiled: December 15, 1995Date of Patent: January 14, 1997Assignee: Display Technologies, Inc.Inventor: Jeffrey A. Feibelman
-
Patent number: 5588359Abstract: A method for forming a screen suitable for screen printing a pattern of small closely spaced features onto a substrate is provided. The method includes the steps of providing a fine mesh screen and then forming a patterning layer on the mesh using a photosensitive emulsion. A mask or phototool is used to pattern the patterning layer. During the patterning process, open areas of the mask are aligned with the openings on the mesh using a microscope or other vision device to align the mask with the mesh. During a screen printing process, the open areas of the patterning layer will thus not be obstructed or split into smaller openings by the screen wires. The patterning layer can be patterned using laser energy directed through the mask or using UV exposure followed by development with a suitable developer.Type: GrantFiled: June 9, 1995Date of Patent: December 31, 1996Assignee: Micron Display Technology, Inc.Inventors: Jim Hofmann, Darryl Stansbury
-
Method for forming high resistance resistors for limiting cathode current in field emission displays
Patent number: 5585301Abstract: A method for forming resistors for regulating current in a field emission display comprises integrating a high resistance resistor into circuitry for the field emission display. The resistor is in electrical communication with emitter sites for the field emission display and with other circuit components such as ground. The high resistance resistor can be formed as a layer of a high resistivity material, such as intrinsic polycrystalline silicon, polycrystalline silicon doped with a conductivity-degrading dopant, lightly doped polysilicon, titanium oxynitride, tantalum oxynitride or a glass type material deposited on a baseplate of the field emission display. Contacts are formed in the high resistivity material to establish electrical communication between the resistor and the emitter sites and between the resistor and the other circuit components. The contacts can be formed as low resistance contacts (e.g., ohmic contacts) or as high resistance contacts (e.g., Schottky contacts).Type: GrantFiled: July 14, 1995Date of Patent: December 17, 1996Assignee: Micron Display Technology, Inc.Inventors: John K. Lee, David A. Cathey, Jr., Kevin Tjaden -
Patent number: 5537738Abstract: The disclosure describes a method of attaching and electrically connecting first and second planar substrates, wherein the first and second substrates have inwardly-facing surfaces with matching patterns of bond pads. The method includes adjusting a wire bonder's tear length to a setting which leaves a projecting tail of severed bond wire at a terminating wedge bond connection. Further steps include making a wedge bond to an individual bond pad of the first planar substrate with bond wire from the wire bonder, and then severing the bond wire adjacent said wedge bond. The adjusted tear length of the wire bonder results in a tail of severed bond wire which projects from said wedge bond and said individual bond pad. Subsequent steps include positioning the first and second planar substrates with their inwardly facing surfaces facing each other, aligning the matching bond pad patterns of the first and second planar substrates, and pressing the first and second planar substrates against each other.Type: GrantFiled: February 10, 1995Date of Patent: July 23, 1996Assignee: Micron Display Technology Inc.Inventors: David A. Cathey, Charles Watkins, Derek Gochnour
-
Patent number: 5532177Abstract: Electron emitters and a method of fabricating emitters which have a concentration gradient of impurities, such that the highest concentration of impurities is at the apex of the emitters, and decreases toward the base of the emitters. The method comprises the steps of doping, patterning, etching, and oxidizing the substrate, thereby forming the emitters having impurity gradients.Type: GrantFiled: July 7, 1993Date of Patent: July 2, 1996Assignee: Micron Display TechnologyInventor: David A. Cathey
-
Patent number: 5523555Abstract: A photodetector device includes a semiconductive conjugated polymer, such as PPV, arranged between first and second electrode layers having different work functions, a bias circuitry connected to apply a bias voltage between the first and second electrode layers, and a sensing circuitry connected to detect a photocurrent flowing between the first and second electrode layers across the polymer layer as a result of radiation incident on the polymer layer while the bias voltage is applied. The bias voltage is selected in relation to the thickness of the polymer layer.Type: GrantFiled: September 14, 1994Date of Patent: June 4, 1996Assignee: Cambridge Display TechnologyInventors: Richard H. Friend, Andrew B. Holmes, Donal D. C. Bradley, Robert N. Marks
-
Patent number: 5521468Abstract: In monitor circuitry, a simple circuit separates out the horizontal synchronization pulses from the composite synchronization signal and removes undesired horizontal synchronization pulses during the vertical blanking period. By using a pulse-width modulated signal having the same frequency as the horizontal rate but not necessarily with the same phase, and having at least a 50% duty cycle, the undesired pulses are gated out before being coupled to the horizontal synchronization circuit of the monitor, thus, the monitor system will not attempt to lock at a double frequency, nor cause visible distortion of the raster. The effect of the pulse width modulated signal is inhibited when a user changes the horizontal synchronization frequency and until the monitor achieves lock on the new frequency.Type: GrantFiled: November 5, 1993Date of Patent: May 28, 1996Assignee: Display Technologies Inc.Inventor: Anthony V. Gioiosa
-
Patent number: 5512654Abstract: A semiconductive conjugated copolymer comprises at least two chemically different monomer units which, when existing in their individual homopolymer forms, have different semiconductor bandgaps. The proportion of said at least two chemically different monomer units in the copolymer is selected to control the semiconductor bandgap of the copolymer so as to control the optical properties of the copolymer. The copolymer is formed in a manner enabling it to be laid down as a film without substantially affecting the luminescent characteristics of the copolymer and is stable at operational temperature.The semiconductor bandgap may be spatially modulated so as to increase the quantum efficiency of the copolymer when excited to luminesce, to select the wavelength of radiation emitted during luminescence or to select the refractive index of the copolymer.Type: GrantFiled: May 19, 1994Date of Patent: April 30, 1996Assignee: Cambridge Display Technology LimitedInventors: Andrew Holmes, Donal D. Bradley, Richard H. Friend, Arno Kraft, Paul Burn, Adam Brown
-
Patent number: 5503582Abstract: A method for forming interelectrode spacers for flat panel display devices that employ reduced pressures, includes the steps of; forming a substrate out of an aerogel, xerogel photosensitive material (e.g., photosensitive glass, photosensitive aerogel, photosensitive xerogel); forming a pattern of openings and gas removal channels in the substrate; and then placing the substrate between a display screen and base plate of the display device. The substrate is formulated to be light weight, insulative and with a high compressive strength for resisting atmospheric loads placed on the display screen by the reduced pressure. In addition, the substrate is formulated to be easily etched, laser ablated or photochemically machined and assembled as a third member spacer structure.Type: GrantFiled: November 18, 1994Date of Patent: April 2, 1996Assignee: Micron Display Technology, Inc.Inventors: David A. Cathey, Jr., Jim J. Browing
-
Patent number: 5486126Abstract: A process is provided for forming spacers useful in large area displays. The process comprises steps of: forming bundles comprising fiber strands which are held together with a binder; slicing the bundles into slices; adhering the slices on an electrode plate of the display; and removing the binder.Type: GrantFiled: November 18, 1994Date of Patent: January 23, 1996Assignee: Micron Display Technology, Inc.Inventors: David A. Cathey, James J. Hofmann, Danny Dynka, Darryl M. Stansbury
-
Patent number: 5459480Abstract: The present invention teaches a field emission display ("FED") architecture for isolating display grids, wherein an FED has a plurality of pixels. Each of the pixels comprise at least two field emitter tips for displaying information to the pixel and a pixelator for driving the field emitter tips. Further, an isolated display grid is incorporated for each of the field emitter tips. Each display grid is coupled by a link to a bus having a predetermined voltage. In one embodiment of the present invention, the link can be disintegrated by internal or external means. In a second embodiment, the FED comprises a first and second bus, each bus having a predetermined voltage, whereby a first isolated display grid is coupled to the first bus by a first link and a second isolated display grids is coupled to the second bus by a second link.Type: GrantFiled: September 16, 1994Date of Patent: October 17, 1995Assignee: Micron Display Technology, Inc.Inventors: Jim J. Browning, John K. Lee
-
Patent number: 5457859Abstract: A modular clip is adapted to releasably secure together a pair of articles for movement as unit. Each article has an article body, a lug protruding from the article body, and a transversely-extending flange at the free end of the lug. The clip includes a generally planar clip body defining a central T-shaped opening therein including a wide aperture zone with widely spaced sides and a narrow aperture zone with relatively narrowly spaced sides, the wide and narrow apertures zones being in operative communication with one another. Each of the narrowly spaced sides defines a plane inclined relative to the clip body and extending from the adjacent wide aperture zone to adjacent a far end of the narrow aperture zone, whereby the inclined planes of the clip may be pressure fit intermediate the article body and the article flanges to preclude accidental displacement of the clip from the articles when the pressure-fit clip holds in juxtaposition the lugs of a pair of adjacent articles.Type: GrantFiled: August 15, 1994Date of Patent: October 17, 1995Assignee: Display Technologies, Inc.Inventors: Deborah J. Kacprowicz, Rich Franczak
-
Patent number: 5425125Abstract: A method is provided for forming in a semiconductive conjugated polymer at least first and second legions having different optical properties. The method comprises: forming a layer of a precursor polymer and permitting the first region to come into contact with a reactant, such as an acid, and heat while permitting the second region to come into contact with a lower concentration of the reactant. The reactant affects the conversion conditions of the precursor polymer in such a way as to control the optical properties of at least the first region so that the optical properties of the first region are different from those of the second region. The precursor polymer may comprise a poly(arylene-1, 2-ethanediyl) polymer, at least some of the ethane groups of which include a modifier group whose susceptibility to elimination is increased in the presence of the reactant.Type: GrantFiled: February 18, 1994Date of Patent: June 13, 1995Assignee: Cambridge Display Technology LimitedInventors: Andrew B. Holmes, Donal D. Bradley, Richard H. Friend, Paul L. Burn, Arno Kraft, Adam R. Brown
-
Patent number: 5410218Abstract: A Field Emission Display ("FED") is disclosed having an array of display grids formed within a region of a semiconductor substrate. The array is defined by a number of rows and a number of columns. Further, a multiplicity of field emitter tips are incorporated for driving the array, each of the tips being coupled with a display grid of the array. To select any row of the array, a row select switch is employed. The row select switch is preferably formed outside the region of the substrate. In operation, a row is selected when a row control signal is received by the row select switch. Further, a column select switch for selecting any of said columns is also employed, formed outside the region. In operation, a column is selected when a column control signal is received by the column select switch. Moreover, a plurality of constant current sources, formed outside the region, are provided for generating a constant current to each of the tips.Type: GrantFiled: June 15, 1993Date of Patent: April 25, 1995Assignee: Micron Display Technology, Inc.Inventor: Glen F. Hush
-
Patent number: D371916Type: GrantFiled: November 16, 1994Date of Patent: July 23, 1996Assignee: Display Technologies, Inc.Inventor: Deborah J. Kacprowicz