Patents Assigned to Dolphin Integration
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Patent number: 7283078Abstract: A converter of a digital signal into a pulse-width modulated signal, comprising a first conversion unit receiving, at a first frequency, successive digital signals each having one of a first determined number of values, and providing first intermediary signals, at the first frequency, each having one of a second determined number of values smaller than the first determined number; a unit performing a decimation of the first intermediary signals to provide second intermediary signals at a second frequency equal to the first frequency divided by the second determined number minus one; and a second conversion unit providing at the second frequency, from the second intermediary signals, a two-state pulse-width modulated signal having a minimum duration in one of the two states which is equal to the inverse of the first frequency, the first conversion unit receiving the pulse-width modulated signal.Type: GrantFiled: June 5, 2006Date of Patent: October 16, 2007Assignee: Dolphin IntegrationInventors: Frédéric Poulet, Guillaume Cogniard
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Patent number: 6775179Abstract: A memory block comprising a network of memory cell rows and columns, each memory cell being connected to a word line and at least one bit line, in which at least two word lines are associated with each row, and at least two adjacent columns share at least one same bit line, two memory cells of the two adjacent columns belonging to a same row being connected to different word lines.Type: GrantFiled: August 30, 2002Date of Patent: August 10, 2004Assignee: Dolphin IntegrationInventors: Hervé Covarel, Sébastien Gaubert
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Patent number: 6724673Abstract: The invention concerns a device for reading a storage cell (4), comprising a reading differential amplifier (18) having a first input terminal (16) connected to a column of cells (10) and a circuit (34) designed to feed to a second input terminal (20) of the amplifier (18) a reference voltage (Vref). The circuit (34) comprises means (38) for storing the voltage of said column and means (38, 40, 42) for applying as reference voltage (Vref) the stored voltage modified by a predetermined quantity.Type: GrantFiled: March 15, 2002Date of Patent: April 20, 2004Assignee: Dolphin IntegrationInventors: Hervé Covarel, Eric Compagne
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Patent number: 6636434Abstract: A ROM including a set of memory points arranged in rows and columns, in which each memory point, formed of a single controllable switch, memorizes an N-bit information, with N>=2. Each column includes 2N conductive lines; each of the two main terminals of each memory point is connected to one of said conductive lines, each information value being associated with a specific assembly of 2N connections from among the set of 22N possible connections; and each of N read means is provided to apply a precharge voltage to a chosen group of 2N−1 first lines, connect the 2N−1 other lines to a reference voltage, select a memory point, read the voltages from the first lines, combine the obtained results to provide an indication of the value of one of the bits of the information contained in the selected memory point.Type: GrantFiled: June 14, 2002Date of Patent: October 21, 2003Assignee: Dolphin IntegrationInventor: Frédéric Poullet
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Patent number: 6552585Abstract: A method of fractional division of a frequency of a digital signal from N replicas of said digital signal shifted in phase with respect to one another by 2&pgr;/N. This method consists of selecting a first replica to generate the rising edge and a second replica to generate the falling edge, the first and second replicas of a period of the resulting signal being different from the first and second replicas used in the next period.Type: GrantFiled: January 31, 2002Date of Patent: April 22, 2003Assignee: Dolphin IntegrationInventor: Frédéric Poullet
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Patent number: 5982234Abstract: The invention relates to an arrangement comprising a main amplifier (1, 10) and means (5) for creating, at least during predetermined periods, a floating references voltage (V.sub.G) for applying at least one input signal (V') on at least one first input terminal (E-, E) of the main amplifier, said reference voltage (V.sub.G) being servo-controlled to the equivalent input noise (Vn) of the main amplifier.Type: GrantFiled: October 6, 1997Date of Patent: November 9, 1999Assignee: Dolphin IntegrationInventor: Eric Compagne
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Patent number: 5917224Abstract: A matrix memory array includes a P-type semiconductor substrate, thick oxide columns separating active columns, gate rows, a gate insulator interposed at the locations where these rows cover the active columns, N-type islands limited by the thick oxide columns and the gate rows, first conductive columns at the pitch of the active columns, constituting bit lines, second conductive columns at a pitch which is twice that of the first columns, constituting reference lines, and connections between each island and a first or second conductive column.Type: GrantFiled: June 2, 1997Date of Patent: June 29, 1999Assignee: Dolphin IntegrationInventor: Louis Zangara
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Patent number: 5315149Abstract: A self-protected divider bridge in an integrated circuit comprising a P.sup.- substrate, a N.sup.- well, a P region forming a resistor, diffused in said well. A first and a second outmost contact and an intermediate contact are formed on the diffused region. A pad connected to the first contact receives an external voltage higher than the supply voltage of the integrated circuit. The reference potential of the integrated circuit is connected to the second contact and the substrate. A third contact formed on the well close to the first contact is connected to the first contact, and a fourth contact formed on the well close to the second contact is connected to the second contact.Type: GrantFiled: March 24, 1993Date of Patent: May 24, 1994Assignee: Dolphin Integration S.A.Inventor: Eric Compagne
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Patent number: 5119418Abstract: In a telephone system, several telephone terminals are connected to a single telephone line including several telephone interface circuits (6, 7, 8), each interface circuit being energized by ringing signals appearing on the line and being arranged between the telephone line (3) and one of the telephone terminals (13, 14, 15, 16), the ring of which is disconnected from the line. Each interface circuit comprises a circuit (26) for counting ringing signals and picking up the line, this first circuit receiving at the input the ringing signals appearing on the line (L1-L2) during a telephone call, and counting a predetermined number of these ringing signals, then picking up the line by a relay (27) at the moment the last ringing signal counted stops. The system is powered only by the signals on the telephone line.Type: GrantFiled: May 21, 1991Date of Patent: June 2, 1992Assignee: Dolphin IntegrationInventor: Christian Dupillier
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Patent number: 5005199Abstract: A line powered telephone interface circuit answers an incoming call and, responsive to a command tone, routes the call to a selected terminal. If no command tone is received within a predetermined time period, low voltage audio signalling devices located near the conventional telephone sets are activated to alert the subscriber of an incoming call. The interface need not be connected to a separated supply source. The device is connected to a telephone line and to at least one plug connectable with a telephone set jack, the device being connected to various terminals. A detector detects the ring signal and a relay establishes connection with a telephone line as soon as the ring signal has been detected for a determined time duration. A combination timer/switcher circuit inhibits the ringing of the corresponding telephone set, and is associated with a sound transducer connected operable by a low voltage signal.Type: GrantFiled: November 15, 1989Date of Patent: April 2, 1991Assignee: Dolphin IntegrationInventor: Christian Dupillier