Patents Assigned to Edge Technologies, Inc.
  • Publication number: 20040191997
    Abstract: A method for manufacturing a semiconductor device includes forming a first insulating film on a substrate, forming a second insulating film on the first insulating film, and forming a gate electrode on the second insulating film. Forming the second insulating film includes supplying film-forming materials and adsorbing the film-forming materials on the first insulating film, purging the film-forming materials that have not been adsorbed, supplying oxidants to oxidize the adsorbed film-forming materials, and purging the oxidants that have not contributed to oxidization. Forming the second insulating film is repeated in cycles, continuously, and the purging time of the oxidants in an initial number of the cycles is longer than the purging time of the oxidants in cycles following the initial number of cycles.
    Type: Application
    Filed: March 11, 2004
    Publication date: September 30, 2004
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventors: Takaaki Kawahara, Kazuyoshi Torii
  • Publication number: 20040188675
    Abstract: A semiconductor device comprises an inorganic film on a semiconductor substrate, an intermediate film on the inorganic film and containing silicon, and an organic film on the intermediate film and containing fluorine. The organic film is made of a fluorinated arylene film.
    Type: Application
    Filed: March 9, 2004
    Publication date: September 30, 2004
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Naruhiko Kaji
  • Publication number: 20040188778
    Abstract: A semiconductor device includes a first insulating film on a silicon substrate and a second insulating film on the first insulating film. The first insulating film is a silicon oxide film having a thickness of 1 nm or less and a suboxide content of 30% or less. The second insulating film is a high dielectric constant insulating film.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 30, 2004
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Tomonori Aoyama
  • Patent number: 6780547
    Abstract: In a halftone phase shifting photomask 108, having a pattern of halftone phase shifting film 102 containing at least chromium and fluorine, the halftone phase shifting film is heat-treated at a temperature between 250° C. and 500° C. so that a change of the optical property of the film produced by the application of excimer laser for exposure to the film is decreased.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: August 24, 2004
    Assignees: Dainippon Printing Co., Ltd., Semiconductor Leading Edge Technologies, Inc.
    Inventors: Toshiaki Motonaga, Norihito Ito, Chiaki Hatsuta, Junji Fujikawa, Naoya Hayashi, Toshio Onodera, Takahiro Matsuo, Toru Ogawa, Keisuke Nakazawa
  • Publication number: 20040150075
    Abstract: A porous MSQ is formed on a silicon substrate, and an SiC mask is formed thereon. Plasma etching using the SiC mask as a mask is performed to form a trench in the porous MSQ. A fluorinated polyxylilene film is formed on the entire surface of the substrate 1 including the side surfaces of the trench, and the unnecessary fluorinated polyxylilene film formed on the area other than the side surfaces of the trench is removed. A barrier-metal film and a seed Cu layer are formed in the trench and a Cu is deposited.
    Type: Application
    Filed: December 16, 2003
    Publication date: August 5, 2004
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Naruhiko Kaji
  • Patent number: 6769908
    Abstract: A wafer heat-treatment system for processing a wafer by a high-temperature heat-treatment process and cooling the heat-treated wafer, comprises walls surrounding a closed space placing the wafer and having a hollow sealing a gas therein, and a pressure-regulating unit connecting to the hollow for regulating pressure in the hollow. Hence, the wafer heat-treatment system reduces power consumption by heating lamps by carrying out an evacuating process before the high-temperature heat-treatment process, and shortens the time necessary for the cool down process by a pressurizing process that is carried out after the completion of the high-temperature heat-treatment process.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: August 3, 2004
    Assignee: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Yoshimasa Kawase
  • Patent number: 6760115
    Abstract: A carrier shape measurement device includes: a stage which supports a carrier which is to be a subject of measurement; and a measurement section which measures a shape of the carrier, and the stage comprises kinematic coupling pins to support the carrier by a kinematic coupling.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: July 6, 2004
    Assignees: Nikon Corporation, Semiconductor Leading Edge Technologies, Inc.
    Inventors: Fusao Shimizu, Atsuhiro Fujii
  • Patent number: 6731375
    Abstract: In the present invention, a substrate with exposure light from an exposure light source is irradiated before a projection exposure beforehand. A reflectance of this exposure light from the substrate is measured. An appropriate intensity of exposure light for the substrate is determined by referring to the reflectance. Then, a mask pattern is projected onto the substrate by irradiating with exposure light of the determined intensity.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: May 4, 2004
    Assignee: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Tetsuro Hanawa
  • Patent number: 6726799
    Abstract: A focus ring is disposed along a circumference of a semiconductor substrate on a lower electrode. A sensor measures a position of an upper surface of the focus ring, and a drive mechanism 6 drives the focus ring vertically. A controller adjusts the position of the upper surface of the focus ring to a desired position by driving the drive mechanism on the basis of a result of measurement by the sensor.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: April 27, 2004
    Assignee: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Osamu Koike
  • Publication number: 20040064937
    Abstract: In a method of manufacturing a thin film battery in a chamber, a target comprising LiCoO2 is provided on a magnetron cathode in the chamber, and a substrate is placed facing the target. A process gas is introduced into the chamber and the process gas is energized to form a plasma to sputter the target to deposit LiCoO2 on the substrate. An ion flux of from about 0.1 to about 5 mA/cm2 is delivered from the plasma to the substrate to enhance the crystallinity of the deposited LiCoO2 material on the substrate. The process gas is exhausted from the chamber. The target can also be made of other materials.
    Type: Application
    Filed: August 12, 2003
    Publication date: April 8, 2004
    Applicant: Front Edge Technology, Inc.
    Inventors: Victor Krasnov, Kai-Wei Nieh, Su-Jen Ting
  • Patent number: 6716761
    Abstract: A resist pattern is formed on a film to be processed using a lithography technique. The line width of the resist pattern is narrowed using a slimming technique. Thereafter, the pattern of a first film to be processed is formed in the space that has been widened by slimming, utilizing the phenomenon in which anisotropic etching under a reduced pressure accelerates the etching rate in the vicinity of the side of the line of the pattern compared to other areas. An underlying second film to be processed is etched using the first film to be processed as a mask. Thereby the pattern of the second film to be processed that has a pitch ½ the lithography pattern is formed.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: April 6, 2004
    Assignee: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Akira Mitsuiki
  • Patent number: 6713987
    Abstract: A rechargeable battery has a battery cell at least partially enclosed by a casing. The battery cell comprises (1) a substrate; (2) a cathode and cathode current collector on the substrate, the cathode being electrically coupled to the cathode current collector; (3) an electrolyte electrically coupled to the cathode or cathode current collector; and (4) a permeable anode current collector having a first surface electrically coupled to the electrolyte and an opposing second surface, the permeable anode current collector: (1) having a thickness that is less than about 1000 Å and that is sufficiently small to allow cathode material to permeate therethrough to form an anode on the opposing second surface of the permeable anode current collector when the battery cell is electrically charged, and (2) that is absent an overlayer on the opposing second surface of the anode current collector. Positive and negative terminals are electrically connected to the battery cell.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: March 30, 2004
    Assignee: Front Edge Technology, Inc.
    Inventors: Victor Krasnov, Kai-Wei Nieh, Fan-Hsiu Chang, Chun-Ting Lin
  • Publication number: 20040059033
    Abstract: A composition for anti-reflective coatings comprising a polymer that contains fluorine and a solvent that dissolves the polymer is applied onto a semiconductor substrate to form an anti-reflective coating. Next, a resist film containing fluorine is formed on the anti-reflective coating. Then, the resist film is irradiated by exposure light to form resist patterns.
    Type: Application
    Filed: October 2, 2003
    Publication date: March 25, 2004
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Minoru Toriumi
  • Patent number: 6709791
    Abstract: The invention relates to a halftone phase shift photomask whose transmittance and phase angle remain unchanged even when irradiated with an excimer laser used for exposure over an extended period of time, and a blank therefor, and provides a halftone phase shift mask 108 comprising a pattern of halftone phase shift film 102 containing at least chromium and fluorine on a transparent substrate 101, wherein optical characteristic changes upon irradiation with an exposure excimer laser have been reduced by patterning a film irradiated with light 109 having a wavelength substantially absorbed by halftone phase shift film 102.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: March 23, 2004
    Assignees: Dai Nippon Printing Co., Ltd., Semiconductor Leading Edge Technologies, Inc.
    Inventors: Hiroshi Mohri, Toshiaki Motonaga, Chiaki Hatsuta, Norihito Ito, Naoya Hayashi, Toshio Onodera, Takahiro Matsuo, Toru Ogawa, Keisuke Nakazawa
  • Patent number: 6652212
    Abstract: A cylinder of the invention can precisely send out a piston rod 3 into four different positions and comprises: a spring receiving member 14 placed coaxially with piston rod 3 in a piston room (I-II) of a cylinder tube 2 so that the movement of spring receiving member 14 is limited by one end of the piston room; a first spring member 15 to separate the spring receiving member from the piston; a stopper 8 formed on piston rod 3 to limit spring receiving member 14 from moving in the opposite direction to piston 4, a hollow 9 formed on the periphery of piston rod 3 at farther position from piston 4 than stopper 8; and a stop pin 11 installed in the cylinder tube to be pressed in the direction of hollow 9 by a second spring member 12 to engage with hollow 9, wherein the movable length of piston rod 9 while stop pin 11 is engaged with hollow 9 is larger than movable distance of spring receiving member 14 from the piston. A load port and a production system of this invention are constructed using the cylinder.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: November 25, 2003
    Assignees: CKD Corporation, Semiconductor Leading Edge Technologies, Inc., Rorze Corporation
    Inventors: Shinyo Kimoto, Kenji Tokunaga, Katsunori Sakata, Norio Kajita
  • Patent number: 6632563
    Abstract: A thin film battery 10 comprises a substrate 12 which permits the battery 10 to be fabricated to provide higher energy density. In one embodiment, the substrate 12 of the battery 10 comprises mica. A crystalline lithium metal oxide film may be used as the cathode film 18.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: October 14, 2003
    Assignee: Front Edge Technology, Inc.
    Inventors: Victor Krasnov, Kai-Wei Nieh, Su-Jen Ting
  • Patent number: 6624539
    Abstract: A high power ultrasonic transducer is provided. In one embodiment, the transducer includes means for providing power in excess of three kilowatts. The transducer further includes an active element made from a magnetostrictive material and means for producing an electromagnetic field which extends through at least a portion of the active element. The active element is changeable between a first shape when in the absence of the electromagnetic field and a second shape when in the presence of the electromagnetic field. The transducer also includes means for providing an electrical signal to the means for producing an electromagnetic field and an acoustic element connected to the transducer for channeling ultrasonic energy to perform work. In one embodiment, an ultra-high power transducer is provided comprising a plurality of sub-motors, each containing an active element made from a smart material, wherein the sub-motors operate simultaneously to produce ultrasonic energy.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: September 23, 2003
    Assignee: Edge Technologies, Inc.
    Inventors: Thomas T. Hansen, Todd Allan Reinders
  • Patent number: 6611317
    Abstract: An exposure apparatus, wherein at least one of optical members constituting an exposure light source system, an illuminating optical system, a photomask and a projection optical system, is made of a synthetic quartz glass for an optical member, which has an absorption coefficient of 0.70 cm−1 or less at a wavelength of 157 nm and an infrared absorption peak attributable to SiOH stretching vibration at about 3640 cm−1.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: August 26, 2003
    Assignees: Asahi Glass Company, Limited, Semiconductor Leading Edge Technologies, Inc.
    Inventors: Tohru Ogawa, Hideo Hosono, Shinya Kikugawa, Yoshiaki Ikuta, Akio Masui, Noriaki Shimodaira, Shuhei Yoshizawa
  • Patent number: 6586163
    Abstract: There is described a method of forming a fine pattern aimed at depositing a silicon-nitride-based anti-reflection film which is stable even at high temperature and involves small internal stress. The method is also intended to preventing occurrence of a footing pattern (a rounded corner) in a boundary surface between a photoresist and a substrate at the time of formation of a chemically-amplified positive resist pattern on the anti-reflection film. The method includes the steps of forming a silicon-nitride-based film directly on a substrate or on a substrate by way of another layer; and forming a photoresist directly on the silicon-nitride-based film or on the silicon-nitride-based film by way of another layer. The silicon-nitride-based film is deposited while the temperature at which the substrate is to be situated is set so as to fall within the range of 400 to 700° C., through use of a plasma CVD system.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: July 1, 2003
    Assignees: Semiconductor Leading Edge Technologies Inc., ASM Japan K.K.
    Inventors: Ichiro Okabe, Hiroki Arai
  • Patent number: 6535781
    Abstract: In an apparatus for inspecting and analyzing a particle on a wafer, which causes defect of an integrated circuit, the invention aims to improve the precision of the coordinate of the particle to facilitate the analysis of the particle. As a result, the generation of the particle can be reduced and the yield of the integrated circuit can be increased. A coordinate modifying apparatus of the invention includes a parameter calculating unit 40 for calculating a coordinate modification parameter, a parameter memory 60 for storing the coordinate modification parameter, and a coordinate modifying unit 70 for correcting the coordinate using the coordinate modification parameter.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: March 18, 2003
    Assignee: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Toshiaki Tsutsumi