Abstract: A gate insulating film on a silicon substrate includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiO2 film and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiO2 film or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.

Abstract: A gate insulating film having an insulating film that contains at least nitrogen is formed on a substrate, and the gate insulating film is subjected to heat treatment for about 500 milliseconds or less using a flash lamp. Thereafter, a gate electrode is formed on the gate insulating film. Specifically, for example, a laminated film of SiO2 and SixN(1-x), a laminated film of SiO2, HfSiO, and SixN(1-x), or the like, is formed in forming the gate insulating film.

Abstract: After forming a gate insulating film and a gate electrode on a substrate, ion implantation is performed to form a doped region. Thereafter, ions are implanted in the doped region and the gate electrode to form an amorphous layer on the doped region and the gate electrode. The amorphous layer is subjected to heat treatment at temperatures of 550° C. to 650° C. and recrystallized. Thereafter, a material film is formed for forming a silicide layer, at least on the doped region and the gate electrode, and heat treatment is performed so the Si of the doped region and the gate electrode reacts with said material film to form a silicide layer. Furthermore, the material film that has not reacted is removed. The thickness of the amorphous layer formed is substantially identical to the thickness of the silicide layer.

Abstract: A semiconductor includes a gate electrode having a SiGe film on a a gate dielectric film that is on a silicon substrate. The gate dielectric film includes an underlying interfacial layer on the substrate, and a high-k dielectric film having higher dielectric constant than the underlying interfacial layer. The gate electrode includes a seed Si film on the high-k dielectric film and a SiGe film formed on the seed Si film. The seed Si film has a thickness of 0.1 nm or more and smaller than 5 nm.

Abstract: A method for observing defect in an amorphous material by transmission electron microscopy is disclosed. The method comprises the steps of: incident electron beam into the amorphous material; eliminating a generated diffraction wave to form an image only by a transmission wave coming through the amorphous material; and observing the image under an under-focus condition. A method for respectively observing an amorphous material and a crystalline material in a composite material containing both of the amorphous material and the crystalline material by transmission electron microscopy is also disclosed.

Abstract: In a method for forming a semiconductor device, the major surface of a substrate is separated into a first element region for forming a first field-effect transistor and a second element region for forming a second field-effect transistor. A silicon nitride film is formed in each of the first and second element regions. Thereafter, the silicon nitride film formed in the second element region is removed, and the substrate is subjected to heat treatment in an ambient that contains nitrogen oxide. Thereby, the silicon nitride film in the first element region is oxidized to form an oxynitride film, and a silicon oxynitride film is formed in the second element region. Thereafter, a high-dielectric-constant film is formed on the silicon oxynitride films in each of the first and second element regions.

Abstract: A semiconductor device includes semiconductor elements and at least one dummy pattern. Each or at least some of the semiconductor elements has a Damascene gate structure or a replacing gate structure and is located in element-forming regions. In addition, at least a dummy pattern is located in a region different from the element-forming regions. The dummy pattern may have a semiconductor element structure of the same or different kind from the Damascene gate structure or replacing gate structure. The dummy pattern may be a pattern of an insulating film, an interface transistor, or an analog circuit capacitor electrode instead of the dummy gate.

Abstract: In a method for manufacturing a semiconductor device, an insulating film having pores is formed on a substrate, and an opening is formed in the insulating film. Thereafter, a material gas supplying Si or C is supplied to the insulating film. Thereby, deficient elements, such as Si or C, are supplied to the insulating film. Thereafter, in the opening, including a barrier metal, is filled with a conductive member to form a wiring structure.

Abstract: In a method for manufacturing a semiconductor device, a gate insulating film and a gate electrode are first formed on a substrate. Next, Ge ions, Si ions, or the like are implanted to make the surface of the substrate amorphous, using the gate electrode as a mask. Thereafter, impurities such as B ions or the like, for forming a doped region, are implanted into the amorphous area of the substrate, using the gate electrode as a mask. Furthermore, the doped region is irradiated with visible light for a short period of time.

Abstract: In a method for manufacturing a semiconductor device having a multi-layer insulating film, a first insulating film is formed as one layer of the multi-layer insulating film, and a plasma treatment is performed on the surface of the first insulating film in an ambient of helium and argon, containing 5 to 31% Ar. After the plasma treatment, a second insulating film, different from the first insulating film, is formed on the first insulating film as another layer of the multi-layer insulating film.

Abstract: A SiO2 film serving as a gate dielectric film is formed on a silicon substrate. A seed Si film is formed on the gate dielectric film. A thin SiGe film of a thickness of 50 nm or less is formed on the seed Si film at a temperature between 450° C. and 494° C., and a thin cap Si film of a thickness of 0.5 nm to 5 nm is continuously formed on the thin SiGe film at the same temperature.

Abstract: After forming a stopper film on a semiconductor substrate having a copper wiring layer therein, an interlayer insulating film made of a low dielectric constant material is formed on the stopper film. Then, after forming a capping film on the interlayer insulating film, a resist film having a predetermined pattern is formed on the capping film. The capping film and the interlayer insulating film are etched using the resist film as a mask to form an opening reaching the stopper film. After that, the stopper film exposed by the opening is etched, with the resist film left in place, to form a via hole. Then, the resist film is removed by ashing.

Abstract: Atmosphere inside a wafer carrier is purged through an open face of the wafer carrier, in the state where a carrier door constituting a face of the wafer carrier is opened by a load port door. Purging is carried out by partitioning a mini-environment with an upper wall surface, a lower wall surface, and an EFEM door into a predetermined space adjacent to the open face, by discharging gas from the predetermined space through an exhaust opening, and by supplying an inert gas or a dry air from a gas supply port into the predetermined space.

Abstract: A low-k dielectric film is formed on an entire surface of a substrate having a pad region and a circuit region. A resist pattern is formed on the low-k dielectric film, and an opening is formed in the low-k dielectric film of the pad region using the resist pattern as a mask. A silicon oxide film having strength higher than the low-k dielectric film is formed in the opening by liquid-phase deposition. Wirings are formed in the silicon oxide film of the pad region and in the low-k dielectric film of the circuit region using the damascene method.

Abstract: After applying a film-forming composition containing a polysiloxane, a pore-forming agent, an onium salt, and a solvent onto a semiconductor substrate, the solvent is evaporated from the film-forming compositions in a first heat treatment. Then, a second heat treatment is carried out in an inert-gas atmosphere to promote the polymerization of the polysiloxane and thus form a polysiloxane resin film. Thereafter, a third heat treatment is carried out in an oxidizing-gas ambient to form pores in the polysiloxane resin film.

Abstract: A substrate having a film to be etched is held on a rotating stage. While rotating the substrate, a chemical solution containing an etchant is supplied onto the substrate from a nozzle. A lamp house with a drive unit is positioned so that the distance between the substrate and a glass window of the lamp house becomes 2 to 5 mm, the lamp house accommodating a lamp generating ultraviolet light. The ultraviolet light irradiates the film through the chemical solution. The ultraviolet light has a higher energy than the binding energy of constituent molecules of the film.

Abstract: A substrate supporting film to be etched is held on a rotating stage. Ultraviolet light having a wavelength of 200 nm or shorter radiated from first lamps irradiates the film in air, thereby removing organic coatings from the film and making the surface of the film hydrophilic. A chemical solution applied to the hydrophilic film while rotating the substrate. Ultraviolet light having a wavelength longer than 200 nm is radiated from second lamps and onto the film through the chemical solution.

Abstract: A resist composition comprises: at least one type of a first compound having two or more intramolecular adamantyl structures represented by the chemical formula 1 below; a base resin; and a second compound which generates an acid by active beam irradiation. wherein X is —(OCO)m—(CH2)n—(COO)m—, where m=0 or 1 and n=0, 1, 2 or 3 provided when n=0, m=0; and Y and Z are H, OH, F, Cl, Br, R or COOR, where Y may be Z, or Y and Z may be introduced in a single adamantyl structure and R represents a straight or branched alkyl group having 1 to 8 carbon atoms.

Abstract: An insulating film is formed on a semiconductor base material, the insulating film being predominantly composed of organic siloxane and containing an organic component which has no chemical bond to the organic siloxane. Plasma treatment is applied to the insulating film to remove the organic component and form a modifying layer on a surface of the insulating film.

Abstract: Each of patterns on two types of photomasks, including identical central pattern portions, each having a line pattern on the center of a substrate, and peripheral pattern portions around the central pattern portions, and having distances between the central pattern portion and the peripheral pattern portion different from each other, is transferred onto a wafer. Thereafter, each line width of the transferred patterns corresponding to the line pattern of each photomask is measured. The difference between each of line widths is obtained, from which the flare rate is calculated.