Abstract: Reliable high speed connectors with integrated power. The connectors can be connected to both provide high signal integrity and supply reliable power in a harsh environment, such as an automobile. A connector can include a housing comprising a front portion, a rear portion, a subassembly chamber for receiving a terminal subassembly, and multiple terminal channels each for receiving an individual terminal. The terminal subassembly comprises a pair of terminals configured for transmitting high-speed signals. The individual terminals are configured for transmitting power signals and/or low-speed signals. When the connector is a plug, the front portion of the housing comprise position assurance features configured to restrain movements of the individual terminals in respective terminal channels. A seal can be disposed closer to the position assurance features than the rear portion. When the connector is a receptacle, the rear portion of the housing comprise a flange facing an inner side of a panel.
Type:
Application
Filed:
December 3, 2024
Publication date:
June 5, 2025
Applicant:
Amphenol East Asia Electronic Technology (Shenzhen) Co., Ltd.
Abstract: Disclosed herein are a method and apparatus for point cloud video streaming. According to an embodiment, the method for point cloud video streaming may include receiving pose information from a user terminal changing the pose of a virtual camera in a virtual space where a point cloud video is played, by applying the pose information to the virtual camera, rendering an image texture of the point cloud video corresponding to a viewpoint of the virtual camera with the changed pose and transmitting video data with the rendered image texture to the user terminal.
Type:
Application
Filed:
February 6, 2025
Publication date:
June 5, 2025
Applicant:
Korea Electronics Technology Institute
Inventors:
Woo Chool PARK, Jun Hwan JANG, Jin Wook YANG, Min Su CHOI, Jun Suk LEE, Bon Jae KOO
Abstract: Disclosed herein are a method and apparatus for a camera calibration. According to an embodiment, the method for the camera calibration may include a recognition unit configured to recognize a captured calibration pattern, a selection unit configured to select, among a plurality of preset calibration algorithms, a calibration algorithm corresponding to the recognized calibration pattern and an execution unit configurated to perform camera calibration by using the selected calibration algorithm and the captured calibration pattern.
Type:
Application
Filed:
February 6, 2025
Publication date:
June 5, 2025
Applicant:
Korea Electronics Technology Institute
Inventors:
Woo Chool PARK, Jun Hwan JANG, Jin Wook YANG, Min Su CHOI, Jun Suk LEE, Bon Jae KOO
Abstract: This application relates to a pellicle for extreme ultraviolet lithography containing amorphous carbon and a manufacturing method thereof. In one aspect, the pellicle includes a substrate having an opening formed in a central portion, a support layer formed on the substrate to cover the opening, and a pellicle layer formed on the support layer and containing amorphous carbon. The pellicle layer may include a core layer formed on the support layer, and a capping layer formed on the core layer and may further include a buffer layer. At least one of the core layer, the capping layer, or the buffer layer may be an amorphous carbon layer.
Type:
Grant
Filed:
March 18, 2022
Date of Patent:
June 3, 2025
Assignee:
Korea Electronics Technology Institute
Inventors:
Hyeong Keun Kim, Seul Gi Kim, Hyun Mi Kim, Jin Woo Cho, Hye Young Kim
Abstract: A multi-phase buck converter comprising M converter branches and a loop error amplifier and a chip are provided. Each converter branch comprises a driving module and a power stage output circuit. The driving module comprises a current information error amplifier, a synchronous ramp voltage generation circuit configured to generate a synchronous ramp signal based on the output voltage, a pulse width modulation comparator, and a driving control circuit. The current information error amplifier compares a detection voltage across an output inductor in a current converter branch with a detection voltage across an output inductor of in a previous converter branch, to generate a current information error signal. The pulse width modulation comparator superimposes the current information error signal to the output voltage error signal to generate a modulation voltage signal, and compares the modulation voltage signal with the synchronous ramp signal to generate a duty cycle modulation set signal.
Abstract: There are a method and a system for virtual sensing, which predict a current operating frequency of a variable IGV control fluid device (for example, a pump, a blower) based on a metamodel. A virtual sensing method for sensing a variable IGV control fluid device operating frequency based on a metamodel according to an embodiment includes: collecting, by a communication unit, input characteristic data from a fluid device system; and predicting, by a processor, output characteristic data by applying the input characteristic data to a metamodel which is a machine learning model, and the input characteristic data is two or more of a fluid pressure (P), a fluid flow rate (Q), and an IGV angle (?), and the output characteristic data is an operating frequency (N) of the fluid device.
Type:
Application
Filed:
October 28, 2024
Publication date:
May 29, 2025
Applicant:
Korea Electronics Technology Institute
Inventors:
Yong Woo SHIN, Sung Jin YANG, Jong Rak CHOI, Rae Eun KIM, Hyun Woo HAN
Abstract: The present disclosure provides a MEMS micromirror with a high duty cycle, a micromirror array, and a preparation method thereof, wherein a plurality of first movable combs and a plurality of first fixed combs of the MEMS micromirror are located under the silicon layer of the reflector, which improves the duty cycle and effectively reduces the size of the MEMS micromirror while achieving large angle deflection in two directions. The silicon layer of the reflector has a reinforcing rib underneath, which effectively improves surface smoothness of the MEMS micromirror when the latter is still or moving. In addition, the MEMS micromirror has a variety of electrode lead-out forms including a double-sided electrode structure, and the electrode lead-out form during actual implantation can be selected as needed, which is conducive to the commercialization of MEMS micromirrors and micromirror arrays.
Type:
Grant
Filed:
March 31, 2022
Date of Patent:
May 27, 2025
Assignee:
Anhui China Science MW Electronic Technology Co., Ltd.
Abstract: For each data in a plurality of data, data is read from a cache unit. For each data in the plurality of data, a group to which the data read from the cache unit belongs to is determined based at least in part on a predetermined grouping rule. A determination is made of (1) a quantity of groups and (2) a quantity of data corresponding to each group after determining the groups to which the plurality of data belong. Data belonging to a same group is written into a contiguous storage space of the cache unit, including by: sequentially reading the plurality of data from the cache unit and sequentially writing the plurality of data into the cache unit.
Abstract: A cosmetology instrument includes a housing, a heat dissipation assembly, a semiconductor chilling and heating plate, and an electronic component. The housing includes a first housing and a second housing, the electronic component and the heat dissipation assembly are disposed in the first housing, the semiconductor chilling and heating plate is disposed in the second housing, and the first housing is connected with the second housing through the heat dissipation assembly; a circumferential air outlet is formed by a gap between the first housing and the second housing, and the first housing is provided with an air inlet; and an air channel is formed between the electronic component and an inner wall of the housing.
Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
Type:
Application
Filed:
January 17, 2025
Publication date:
May 22, 2025
Applicant:
Sensor Electronic Technology, Inc.
Inventors:
Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
Abstract: There is provided a dynamic data block caching automation application method for high-speed data access based on a computational storage. A query execution method according to an embodiment includes the steps of: synchronizing, by a DBMS, an ECC which is a cache of the DBMS and an ICC which is a cache of a computational storage in which a DB is established; generating an offloading execution code that defines operation information necessary for query computation offloading based on a query requested by a client; and processing the offloading execution code by using the ECC and the ICC which are synchronized. Accordingly, a load even in a CSD for reducing a load of a DBMS is reduced through snippet offloading reduction, snippet processing reduction, and high-speed query processing is enabled by disk I/O optimized data access.
Abstract: Disclosed include a data collection device, a data collection system, and an electronic image stabilization device. The data collection device includes a logic circuit. The logic circuit includes: a timer, configured to generate timestamp data; a control module, configured to, in response to receiving a pre-set input signal, generate a data obtaining command and obtain the timestamp data from the timer; a communication module, configured to, in response to the data obtaining command, obtain MEMS (MEMS) data from a MEMS sensor; and a packing module, configured to pack the MEMS data and the timestamp data into a data packet.
Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
Type:
Grant
Filed:
February 9, 2022
Date of Patent:
May 13, 2025
Assignee:
Sensor Electronic Technology, Inc.
Inventors:
Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur