Abstract: The invention concerns an electronic watch (8) including: a motor (5), a power circuit (7) supplying first and second voltage levels; a case (11), in which there are mounted: first and second (A, D) output connections; a switch (9) actuated by an external actuator to connect the first connection to the second level (Vdd); a control circuit (4) for the motor including first and second three-state gates (12, 14) respectively connected to the first and second connections (A, D), a member (13) selectively connecting the first connection to the first level, the circuit including a test mode wherein the gates are brought to high impedance, the first connection (D) is connected to the first level (Vss), actuation of the actuator is determined as a function of the voltage measured at the output of the first gate.

Abstract: The invention relates to a memory device, preferably a non-volatile memory device, comprising a memory array (16) with multiple memory cells (18) for storing bits of data, the memory cells (18) being arranged in word lines and columns, and a readout circuit (20) for reading out data from the memory array (16). In order to enable an effective use of resources, it is proposed to further provide the non-volatile memory device with at least two sense amplifier devices (22, 24), wherein the sense amplifier devices (22, 24) are connected to respectively different subsets of memory cells of one of the word lines.

Abstract: The chip card includes at least one integrated circuit (11) provided with a memory unit, which stores personal data and some configuration parameters. The integrated circuit is enclosed in an insulating material that forms said card. The chip card may also include connecting means, such as a zone of accessible electric contacts (VCC, GND) on at least one surface of the card, for contact with complementary contact terminals of an electronic instrument. These electric contacts are electrically connected to corresponding contact pads of the integrated circuit. The chip card may be a memory card or a SIM card. The chip card also includes a measuring circuit with a sensor (C) for measuring a physical parameter so as to provide at least one output signal relating to the physical parameter measurement (SD) by one of the electric contacts (I/O).

Abstract: The invention relates to an optical movement detection device including a light source (10) for irradiating a surface (12), a power supply (14) and an optical sensor (16) for sensing light reflected from the surface (12). In order to avoid unused optical energy, it is proposed that the optical movement detection device further comprises at least one solar-cell photodiode (30a-30d), wherein the solar-cell photodiode (30a-30d) is arranged so as to recycle optical energy generated by the light source (10).

Abstract: The UHF transponder includes protection against electrostatic discharge (ESD) formed by the modulation transistor (T1) and additional control means (20) for said transistor which fulfils two functions: its first response signal modulation function and an additional ESD protection function.

Abstract: The invention concerns an oscillator including an input terminal, an output terminal, a resonator, and an oscillator circuit including: first and second power supply terminals, two capacitors connected between the first power supply terminal and the input terminal, and respectively the output terminal of the oscillator; first and second active transistors of complementary type, forming therewith an inverting amplifier, first and second means for respectively polarizing the first and the second active transistors, a first current source formed by a transistor of the same type as the second active transistor, between the second power supply terminal and the second active transistor, current control means for the second polarizing means, characterized in that in an steady operating conditions, said second polarizing means are arranged for providing a polarization voltage across the gate of the second active transistor corresponding to the transistor gate voltage of the first current source to within one voltage

Abstract: The integrated photoreceptor circuit includes a photosensitive area for picking up light and a processing unit area for processing the signals provided by the photosensitive area. This photoreceptor circuit includes electric contact pads, which are arranged symmetrically solely on the side of the processing unit area, which is juxtaposed with the photosensitive area. The integrated photoreceptor circuit is mounted on a first portion of a flexible substrate. The contact pads of the integrated photoreceptor circuit are electrically connected to electrical connection pads of the printed circuit of the flexible substrate. A second portion of the flexible substrate carries electrical connection terminals, which are connected to the connection pads via conductive paths, arranged in part on a connecting portion between the first and second portions. A through aperture in the first portion may be provided opposite the photosensitive area only of the photoreceptor circuit.

Abstract: The DC-DC converter (21) is for integration in a low power transceiver (100). The converter is able to supply an output voltage that is higher than the input voltage. The converter includes two distinct variable voltage regulator circuits (3 and 4). The first variable voltage regulator circuit (3) is arranged to operate at a first frequency and a second variable voltage regulator circuit (4) is arranged to operate at a second frequency, which is lower than the first frequency. The converter further includes switching means connected to each variable voltage regulator circuit for selecting one of the two regulator circuits to switch on.

Abstract: The invention includes a power amplifier with an amplifier core including parallel amplifier cells, a replica cell made of one amplifier cell similar to those of the amplifier core, a power controller to select a combination of amplifier cells to activate, a regulator to fix the top voltage of the replica cell to a reference voltage, a voltage generator to provide the voltage reference to the regulator, a current generator to provide a reference current through the replica cell, and a drive unit controlled by the regulator output to drive the combination of amplifier cells, so that each selected combination of activated cells defines a predetermined attenuation level of power amplifier output signal so that it is attenuated in a stepwise manner.

Abstract: The electronic circuit is intended to form with an antenna a responder that operates without resetting to zero when the power supply of the electronic circuit is switched on (without POR). To increase efficiency and reduce the costs of testing a plurality of such integrated circuits in a wafer, means are provided that allow the logic circuit (8) to be reset to zero during such a test by electrical contact with the pads (P1, P2) of each circuit by using two extractors (12 and 14) of clock signals (CL1 and CL2) connected to the inputs of a generator (20) of a zero reset signal (SR). The state of the generator is essentially given by the difference in pulses received from the two clock signal extractors. As soon as the state of the generator corresponds to a value equal to or greater than a predefined integer, the logic circuit is reset to zero, which never occurs with the responder receiving an interrogation signal of a reader.

Abstract: The reading device enables a non-volatile memory consisting of a matrix of memory cells (TM) to be read. Once the memory cells have been selected to be read in a read cycle controlled by a microprocessor unit, sense amplifiers (4) activated at the start of each cycle supply a binary data word (dx) representing the reading of the selected memory cells. The reading device also comprises time-lag means (3, MF, TF, Cgap) activated at the start of each read cycle. These time-lag means supply a reference signal (rd_mon) that controls the read time of the cells selected independently of the microprocessor unit. This read time is determined so that it is sufficient for reading all the valid data of the selected memory cells in each read cycle. The time-lag means mainly comprise a reference dummy cell (TF) linked to a reference sense amplifier (3), which supplies the reference signal (rd_mon), and a time-lag capacitor (Cgap) linked to the dummy cell.

Abstract: Capacitive touch screen including first and second substrates (2, 4) that extend parallel to and at a distance from each other, said first and second substrates (2, 4) being made of a transparent, dielectric material, a first series of electrodes (6), made of a transparent, electrically conductive material, being arranged on at least the surface (2a) of the first substrate (2) that faces the second substrate (4), said touch screen being characterized in that it includes means for keeping the space between the two substrates (2, 4) constant.

Abstract: The electronic circuit (1) controls the operation of the peripheral members of a watch. The circuit (1) includes a processor (2) connected to a non-volatile memory (3), which contains instructions to be carried out, peripheral member controllers (4) for interacting with peripheral members of the watch and connecting means (6a, 6b, 7). These connecting means (6a, 6b, 7) are arranged to enable the peripheral member controllers (4), the non-volatile memory and the processor (2) to communicate data relating to the operation of said watch to each other. This electronic circuit (1) further includes initialising means (8) able to act on the peripheral member controllers (4) to initialise said controllers so that they can execute operations independently of the processor (2) and/or the non-volatile memory (3).

Abstract: An electronic interface circuit of a capacitive sensor usable for measuring a physical parameter, wherein the sensor includes two differential mounted capacitors whose common electrode moves relative to each fixed electrode in order to alter capacitive value of each capacitor. The electronic circuit includes a charge transfer amplifier unit connected to the common electrode, a first integrator unit for integrating charges supplied by the charge transfer amplifier, a first excitation unit arranged between the output of the first integrator unit and the sensor for polarizing each fixed electrode of the capacitors to a determined voltage value, a second integrator unit for integrating the charges supplied by the charge transfer amplifier, and a second excitation unit arranged between the output of the second integrator unit and the sensor for polarizing each fixed electrode of the capacitors at an opposite voltage value to the voltage value controlled by the first excitation unit.

Abstract: The passive transponder comprises an antenna (2) connected to an integrated circuit (6) the analogue part of which includes a passive voltage rectifier (8) supplying a rectified voltage (VDC1) and an active multiplier or booster (16) for said rectified voltage which is formed by a capacitor (C2) switched to a relatively low frequency, for example 1 MHz, by means of switches formed by transistors (18 to 21) controlled using an oscillator (24).

Abstract: The electronic circuit (1) for measuring at least one physical parameter supplies an analogue output measurement signal (SA) dependent upon the value of a supply voltage. The circuit includes a sensor interface (2) connected to a sensor (C) for supplying an analogue measurement signal (Vm) which is then filtered. The circuit further includes an analogue-digital converter (8) for digitally converting the filtered signal (Sm), a digital signal control and processing unit (9) for receiving a converted signal from the converter, and supplying a digital measurement signal (SD). The sensor interface, the analogue-digital converter and the processing unit (9) are powered by a regulated voltage supplied by a voltage regulator (4). The analogue and digital measurement signals are thus independent of any variation in the supply voltage (VCC) of the electronic unit.

Abstract: The electronic identification device or transponder (2) comprises a trigger circuit (12) linked to receiving means (14) of an interrogation signal sent at a first frequency by a reader (4 or 6), this trigger circuit serving to supply power to the transponder. It comprises an electronic response circuit (18) linked to an antenna (20) operating at a second frequency higher than said first frequency. This device or transponder additionally comprises a second electronic response circuit (26) linked to the antenna (14) to emit a second response signal at approximately the first frequency. The device or transponder (2) is therefore configured to operate with a single-frequency reader (4) or with a double-frequency reader (6). The electronic logic circuit (10) is configured in order to control the transmission of first response signals at the first frequency and second response signals at the second, higher frequency.

Abstract: The optoelectronic circuit includes a photoreceptor (1) made in a silicon semiconductor substrate (4), and a monomode VCSEL laser diode (2) made in particular in a gallium arsenide substrate. The photoreceptor includes at least one photosensitive area with a pixel array for picking up light and an area with a control and processing unit for the signals supplied by the pixels. The laser diode (2) is mounted and electrically connected directly on one part of the photoreceptor. This laser diode may be housed in a cavity (13) made through a passivation layer (5) of the photoreceptor, and connected by a conductive terminal (12) to a first contact pad (3) at the bottom of the cavity. An electrode (17) on the top of the diode can be connected by a metal wire (15) to a second neighbouring accessible contact pad (3) of the photoreceptor. The photoreceptor (1) controls the diode directly via the electrode and the conductive terminal to generate a laser beam (L).

Abstract: The invention concerns a method of manufacturing parts of a first material able to be etched, from a substrate including at least one superficial layer of said first material.

Abstract: The transponder circuit comprises a double clock extractor unit (31, 32, 33), an antenna coil connected to a modulator rectifier block to supply a rectified supply voltage on the basis of a picked up radio-frequency signal, and a control logic receiving a clock signal (CLK) of the double clock extractor unit. The control logic supplies a modulation signal (MOD) to the modulator rectifier block as well as to the double clock extractor unit. A terminal (B1) of the antenna coil is connected to the double clock extractor unit, which comprises a first sensitive clock extractor, which is a comparator (32) with a sensitivity threshold defined by a low reference voltage (Vref), and a second clock extractor, which consists of two successive inverters (31, 33).