Patents Assigned to Excelliance MOS Corporation
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Patent number: 8518778Abstract: A method of forming a semiconductor structure is provided. A second area is between first and third areas. An epitaxial layer is formed on a substrate. A first gate is formed in the epitaxial layer and partially in first and second areas. A second gate is formed in the epitaxial layer and partially in second and third areas. A body layer is formed in the epitaxial layer in first and second areas. A doped region is formed in the body layer in the first area. All of the doped region, the epitaxial layer and the second gate are partially removed to form a first opening in the doped region and in the body layer in the first area, and form a second opening in the epitaxial layer in the third area and in a portion of the second gate. A first metal layer is filled in first and second openings.Type: GrantFiled: May 25, 2012Date of Patent: August 27, 2013Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Patent number: 8476842Abstract: A driving device for a LED module is provided. The driving device for the LED module includes a voltage converting unit, a LED module voltage detecting unit, and a switching signal generation unit. The voltage converting unit produces a driving voltage to drive the LED module according to a switching signal. The LED module voltage detecting unit divides the driving voltage to produce a comparison voltage. The switching signal generation unit receives the comparison voltage by a fault detection pin and compares a reference voltage and the comparison voltage to enable or disable the switching signal. After the switching signal is disabled, the switching signal generation unit further pulls up a voltage level of the fault detection pin to a logic high level voltage, so as to produce a fault notification signal to let the fault detection pin also have a function for fault notification.Type: GrantFiled: December 8, 2010Date of Patent: July 2, 2013Assignee: Excelliance MOS CorporationInventors: Chao-Hsuan Chuang, Hung-Che Chou, Sheng-Chieh Wu, Pao-Chuan Lin
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Patent number: 8421180Abstract: A semiconductor structure is provided. A second area is disposed between first and third areas. An epitaxial layer is on a substrate. A body layer is in the epitaxial layer in first and second areas. First and second gates are in the body layer and in a portion of the epitaxial layer. The first gate is in the substrate and partially in first and second areas. The second gate is in the substrate and partially in second and third areas. A first contact plug is in a portion of the body layer in the first area. A second contact plug is at least in the epitaxial layer in the third area and contacts the epitaxial layer and the second gate. The first contact plug is electrically connected to the second contact plug. A first doped region is in the body layer between the first contact plug and the first gate.Type: GrantFiled: May 25, 2012Date of Patent: April 16, 2013Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Publication number: 20130088161Abstract: A driving circuit of a light emitting diode (LED) including an AC power, a rectifier, a power converter, a waveform sampler, and a control circuit is provided. The AC power provides an AC signal. The rectifier is coupled to the AC power and outputs a driving signal. The power converter is coupled to the rectifier. The power converter includes an LED and outputs a first signal positive correlated with a current passing through the LED. The waveform sampler is coupled between the AC power and the rectifier, and outputs a second signal directly proportional to the AC signal. The control circuit is coupled between the waveform sampler and the power converter, and outputs a control signal to the power converter according to a comparison result between the first signal and the second signal.Type: ApplicationFiled: October 7, 2011Publication date: April 11, 2013Applicant: EXCELLIANCE MOS CORPORATIONInventor: Yung-Chen Lu
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Publication number: 20130088170Abstract: A driving circuit of a light emitting diode (LED) capable of receiving a power source to supply a driving current to an LED module is provided. The driving circuit includes a first current path and a second current path. The first current path includes a switch. The switch is disposed between the LED module and a terminal. The switch has a control terminal and receives a control signal through the control terminal so as to control whether the LED module is coupled to the terminal via the switch. The second current path is coupled between the LED module and the terminal. The second current path includes an impedance unit and is coupled to the first current path in parallel.Type: ApplicationFiled: October 6, 2011Publication date: April 11, 2013Applicant: EXCELLIANCE MOS CORPORATIONInventor: Yung-Chen Lu
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Patent number: 8349691Abstract: A method of forming a power MOSFET is described. An epitaxial layer of first conductivity type is formed on a substrate of first conductivity type. A body layer of second conductivity type is formed in the epitaxial layer. A plurality of mask patterns are formed on the substrate. A plurality of trenches are formed in the body layer and the epitaxial layer between the mask patterns. An oxide layer is formed on surfaces of the trenches. A conductive layer is formed in the trenches. A trimming process is performed to the mask patterns to reduce the line width of each mask pattern. Two source regions of first conductivity type are formed in the body layer beside each trench by using the trimmed mask patterns as a mask. A plurality of dielectric patterns are formed on the conductive layer and between the trimmed mask patterns. The trimmed mask patterns are removed.Type: GrantFiled: January 14, 2010Date of Patent: January 8, 2013Assignee: Excelliance MOS CorporationInventors: Yi-Chi Chang, Chia-Lien Wu
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Publication number: 20120280630Abstract: A constant current driving circuit of a light emitting diode (LED) including a control unit, a buck converter, and a compensation unit is provided. The control unit has an input terminal and an output terminal, and outputs a control signal through the output terminal. The buck converter is coupled to an input power, and is coupled between the output terminal of the control unit and an LED string. The compensation unit is coupled between the LED string and the input terminal of the control unit. The control unit receives a compensation signal of the compensation unit through the input terminal. Besides, a lighting apparatus is also provided.Type: ApplicationFiled: May 5, 2011Publication date: November 8, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventor: Yung-Chen Lu
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Publication number: 20120235231Abstract: A semiconductor structure is provided. A second area is disposed between first and third areas. An epitaxial layer is on a substrate. A body layer is in the epitaxial layer in first and second areas. First and second gates are in the body layer and in a portion of the epitaxial layer. The first gate is in the substrate and partially in first and second areas. The second gate is in the substrate and partially in second and third areas. A first contact plug is in a portion of the body layer in the first area. A second contact plug is at least in the epitaxial layer in the third area and contacts the epitaxial layer and the second gate. The first contact plug is electrically connected to the second contact plug. A first doped region is in the body layer between the first contact plug and the first gate.Type: ApplicationFiled: May 25, 2012Publication date: September 20, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Publication number: 20120231595Abstract: A method of forming a semiconductor structure is provided. A second area is between first and third areas. An epitaxial layer is formed on a substrate. A first gate is formed in the epitaxial layer and partially in first and second areas. A second gate is formed in the epitaxial layer and partially in second and third areas. A body layer is formed in the epitaxial layer in first and second areas. A doped region is formed in the body layer in the first area. All of the doped region, the epitaxial layer and the second gate are partially removed to form a first opening in the doped region and in the body layer in the first area, and form a second opening in the epitaxial layer in the third area and in a portion of the second gate. A first metal layer is filled in first and second openings.Type: ApplicationFiled: May 25, 2012Publication date: September 13, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu
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Patent number: 8227858Abstract: A power MOSFET is described. A trench is in a body layer and an epitaxial layer. An isolation structure is on the substrate at one side of the trench. An oxide layer is on the surface of the trench. A first conductive layer fills the trench and extends to the isolation structure. A dielectric layer is on the first conductive layer and isolation structure and has an opening exposing the first conductive layer. At least one source region is in the body layer at the other side of the trench. A second conductive layer is on the dielectric layer and electrically connected to the source region while electrically isolated from the first conductive layer by the dielectric layer. A third conductive layer is on the dielectric layer and electrically connected to the first conductive layer through the opening of the dielectric layer. The second and third conductive layers are separated.Type: GrantFiled: January 11, 2010Date of Patent: July 24, 2012Assignee: Excelliance MOS CorporationInventors: Yi-Chi Chang, Chia-Lien Wu
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Patent number: 8222678Abstract: A semiconductor structure including a substrate, at least one power MOSFET, a floating diode or a body diode, and at least one Schottky diode is provided. The substrate has a first area, a second area and a third area. The second area is between the first area and the third area. The at least one power MOSFET is in the first area. The floating diode or the body diode is in the second area. The at least one Schottky diode is in the third area. Further, the contact plugs of the power MOSFET and the Schottky diode include tungsten and are electronically connected to each other.Type: GrantFiled: August 17, 2009Date of Patent: July 17, 2012Assignee: Excelliance MOS CorporationInventor: Chu-Kuang Liu
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Publication number: 20120146515Abstract: A driving device for a LED module is provided. The driving device for the LED module includes a voltage converting unit, a LED module voltage detecting unit, and a switching signal generation unit. The voltage converting unit produces a driving voltage to drive the LED module according to a switching signal. The LED module voltage detecting unit divides the driving voltage to produce a comparison voltage. The switching signal generation unit receives the comparison voltage by a fault detection pin and compares a reference voltage and the comparison voltage to enable or disable the switching signal. After the switching signal is disabled, the switching signal generation unit further pulls up a voltage level of the fault detection pin to a logic high level voltage, so as to produce a fault notification signal to let the fault detection pin also have a function for fault notification.Type: ApplicationFiled: December 8, 2010Publication date: June 14, 2012Applicant: EXCELLIANCE MOS CORPORATIONInventors: Chao-Hsuan Chuang, Hung-Che Chou, Sheng-Chieh Wu, Pao-Chuan Lin
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Publication number: 20110171799Abstract: A method of forming a power MOSFET is described. An epitaxial layer of first conductivity type is formed on a substrate of first conductivity type. A body layer of second conductivity type is formed in the epitaxial layer. A plurality of mask patterns are formed on the substrate. A plurality of trenches are formed in the body layer and the epitaxial layer between the mask patterns. An oxide layer is formed on surfaces of the trenches. A conductive layer is formed in the trenches. A trimming process is performed to the mask patterns to reduce the line width of each mask pattern. Two source regions of first conductivity type are formed in the body layer beside each trench by using the trimmed mask patterns as a mask. A plurality of dielectric patterns are formed on the conductive layer and between the trimmed mask patterns. The trimmed mask patterns are removed.Type: ApplicationFiled: January 14, 2010Publication date: July 14, 2011Applicant: EXCELLIANCE MOS CORPORATIONInventors: Yi-Chi Chang, Chia-Lien Wu
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Publication number: 20110169076Abstract: A power MOSFET is described. A trench is in a body layer and an epitaxial layer. An isolation structure is on the substrate at one side of the trench. An oxide layer is on the surface of the trench. A first conductive layer fills the trench and extends to the isolation structure. A dielectric layer is on the first conductive layer and isolation structure and has an opening exposing the first conductive layer. At least one source region is in the body layer at the other side of the trench. A second conductive layer is on the dielectric layer and electrically connected to the source region while electrically isolated from the first conductive layer by the dielectric layer. A third conductive layer is on the dielectric layer and electrically connected to the first conductive layer through the opening of the dielectric layer. The second and third conductive layers are separated.Type: ApplicationFiled: January 11, 2010Publication date: July 14, 2011Applicant: EXCELLIANCE MOS CORPORATIONInventors: Yi-Chi Chang, Chia-Lien Wu
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Publication number: 20110037113Abstract: A semiconductor structure including a substrate, at least one power MOSFET, a floating diode or a body diode, and at least one Schottky diode is provided. The substrate has a first area, a second area and a third area. The second area is between the first area and the third area. The at least one power MOSFET is in the first area. The floating diode or the body diode is in the second area. The at least one Schottky diode is in the third area. Further, the contact plugs of the power MOSFET and the Schottky diode include tungsten and are electronically connected to each other.Type: ApplicationFiled: August 17, 2009Publication date: February 17, 2011Applicant: EXCELLIANCE MOS CORPORATIONInventor: Chu-Kuang Liu