Patents Assigned to Fab Solutions, Inc.
  • Patent number: 7321805
    Abstract: A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices 11a-11c for producing semiconductor devices, in-line measuring devices 12a-12c for measuring data of a lot, a database 2 storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server 1 including an estimated yield operating unit 1a for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit 1b for performing a production management of semiconductor devices ordered by a user on th
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 22, 2008
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide
  • Patent number: 7232994
    Abstract: The present invention provides a standard test device used for testing a hole of a semiconductor device. The standard test device has a structure which comprises: at least a dummy film on a base surface; at least an insulating layer which has at least one opening penetrating through the insulating layer, so that a part of a top surface of the at least dummy film is shown through the at least one opening, wherein the at least dummy film has a predetermined constant thickness at least around the at least one opening. The standard test device makes it easily possible to determine or measure a thickness of a residual film on a bottom of the contact hole.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: June 19, 2007
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 7049834
    Abstract: A defective position of a sample to be tested is detected by irradiating the test sample and another test sample with electron beam while scanning the test samples, storing values of current generated in the test samples correspondingly to electron beam irradiation positions as current waveforms and comparing the current waveforms.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: May 23, 2006
    Assignee: Fab Solutions, Inc
    Inventor: Keizo Yamada
  • Patent number: 7002361
    Abstract: An apparatus for measuring the thickness of thin-film cause electron beams of first and second energies to strike thin-film to be measured that is formed on a silicon substrate, and measures the first substrate current value of current flowing in the substrate when it is struck by an electron beam of a first energy and the second substrate current value of current flowing in the substrate when it is struck by an electron beam of a second energy. The thin-film measuring apparatus obtains reference data indicating a relationship between the film thickness and a reference function having as variables the substrate current for the case of an electron beam of the first energy striking a standard sample and the substrate current for the case of an electron beam of the second energy striking the standard sample, and calculates the thickness of the thin-film under measurement based on the first and second substrate current values, giving consideration to the reference data.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: February 21, 2006
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki
  • Patent number: 6982418
    Abstract: The present invention provides a standard test device used for testing a hole of a semiconductor device. The standard test device has a structure which comprises: at least a dummy film on a base surface; at least an insulating layer which has at least one opening penetrating through the insulating layer, so that a part of a top surface of the at least dummy film is shown through the at least one opening, wherein the at least dummy film has a predetermined constant thickness at least around the at least one opening. The standard test device makes it easily possible to determine or measure a thickness of a residual film on a bottom of the contact hole.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: January 3, 2006
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6975125
    Abstract: In one aspect, the present invention is a system and method for obtaining information regarding one or more contact holes and/or vias on a semiconductor wafer. In this regard, in one embodiment, the system comprises an electron gun to irradiate an electron beam, having a variable acceleration voltage, on the one or more contact holes and/or vias. The system further includes a current measuring device, coupled to the semiconductor wafer, may measure a compensation current, wherein the compensation current is generated in response to the electron beam irradiated at a plurality of acceleration voltages on the one or more contact holes. The system also includes a data processor, coupled to the current measuring device, to determine information relating to the one or more contact holes and/or vias using the compensation current measured for the plurality of acceleration voltages of the electron beam.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: December 13, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide
  • Patent number: 6967327
    Abstract: The present invention provides a standard test device used for testing a hole of a semiconductor device. The standard test device has a structure which comprises: at least a dummy film on a base surface; at least an insulating layer which has at least one opening penetrating through the insulating layer, so that a part of a top surface of the at least dummy film is shown through the at least one opening, wherein the at least dummy film has a predetermined constant thickness at least around the at least one opening. The standard test device makes it easily possible to determine or measure a thickness of a residual film on a bottom of the contact hole.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: November 22, 2005
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6946857
    Abstract: In one aspect, the present invention is a system and method for obtaining information regarding one or more contact holes and/or vias on a semiconductor wafer. In this regard, in one embodiment, the system comprises an electron gun to irradiate an electron beam on the one or more contact holes and/or vias wherein the electron beam includes a cross-section which is greater than the one or more contact holes. The system further includes a current measuring device, coupled to the semiconductor wafer, may measure a compensation current, wherein the compensation current is generated in response to the electron beam irradiated on the one or more contact holes. The system also includes a data processor, coupled to the current measuring device, to determine information relating to the one or more contact holes and/or vias using the compensation current.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: September 20, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide
  • Patent number: 6943043
    Abstract: A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: September 13, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Takeo Ushiki, Keizo Yamada, Yohsuke Itagaki, Tohru Tsujide
  • Patent number: 6940296
    Abstract: The present invention provides a standard test device used for testing a hole of a semiconductor device. The standard test device has a structure which comprises: at least a dummy film on a base surface; at least an insulating layer which has at least one opening penetrating through the insulating layer, so that a part of a top surface of the at least dummy film is shown through the at least one opening, wherein the at least dummy film has a predetermined constant thickness at least around the at least one opening. The standard test device makes it easily possible to determine or measure a thickness of a residual film on a bottom of the contact hole.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: September 6, 2005
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6914444
    Abstract: A defective position of a sample to be tested is detected by irradiating the test sample and another test sample with electron beam while scanning the test samples, storing values of current generated in the test samples correspondingly to electron beam irradiation positions as current waveforms and comparing the current waveforms.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: July 5, 2005
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6900645
    Abstract: A defective position of a sample to be tested is detected by irradiating the test sample and another test sample with electron beam while scanning the test samples, storing values of current generated in the test samples correspondingly to electron beam irradiation positions as current waveforms and comparing the current waveforms.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: May 31, 2005
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6897440
    Abstract: A standard test device used for testing a hole of a semiconductor device includes a dummy film on a base surface, and an insulating layer which has an opening penetrating through the insulating layer, so that a part of a top surface of the dummy film is shown through the opening, wherein the dummy film has a predetermined constant thickness around the opening. The standard test device makes it easily possible to measure a thickness of a residual film on the bottom or the contact hole.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: May 24, 2005
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6850079
    Abstract: An apparatus for measuring the thickness of thin-film cause electron beams of first and second energies to strike thin-film to be measured that is formed on a silicon substrate, and measures the first substrate current value of current flowing in the substrate when it is struck by an electron beam of a first energy and the second substrate current value of current flowing in the substrate when it is struck by an electron beam of a second energy. The thin-film measuring apparatus obtains reference data indicating a relationship between the film thickness and a reference function having as variables the substrate current for the case of an electron beam of the first energy striking a standard sample and the substrate current for the case of an electron beam of the second energy striking the standard sample, and calculates the thickness of the thin-film under measurement based on the first and second substrate current values, giving consideration to the reference data.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: February 1, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki
  • Patent number: 6842663
    Abstract: A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices 11a-11c for producing semiconductor devices, in-line measuring devices 12a-12c for measuring data of a lot, a database 2 storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server 1 including an estimated yield operating unit 1a for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit 1b for performing a production management of semiconductor devices ordered by a user on th
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: January 11, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide
  • Patent number: 6837936
    Abstract: The semiconductor manufacturing device according to the present invention having a mechanical drive part which is moved in a vacuum device while holding a substrate includes at least one discharge port for introducing an inert gas into the vacuum device, and a flow rate control part for controlling the inert gas which is discharged into the vacuum device from the discharge port at a constant flow rate.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: January 4, 2005
    Assignee: Fab Solutions, Inc.
    Inventors: Takeo Ushiki, Keizo Yamada, Yousuke Itagaki
  • Patent number: 6809534
    Abstract: A defective position of a sample to be tested is detected by irradiating the test sample and another test sample with electron beam while scanning the test samples, storing values of current generated in the test samples correspondingly to electron beam irradiation positions as current waveforms and comparing the current waveforms.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: October 26, 2004
    Assignee: Fab Solutions, Inc.
    Inventor: Keizo Yamada
  • Patent number: 6768324
    Abstract: Current produced in a sample 5 by irradiating the sample with parallel electron beam 2 is measured by an ammeter 9. The measurement is repeated while changing acceleration voltage of electron beam 2. An information related to a structure of the sample 5 in a depth direction thereof is obtained by a data processor 10, on the basis or a difference in transmittivity of electron beam 2 into the sample 5 due to the difference of acceleration voltage.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: July 27, 2004
    Assignee: Fab Solutions, Inc.
    Inventors: Keizo Yamada, Tohru Tsujide, Yousuke Itagaki, Takeo Ushiki
  • Patent number: 6753194
    Abstract: A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: June 22, 2004
    Assignee: Fab Solutions, Inc.
    Inventors: Takeo Ushiki, Keizo Yamada, Yohsuke Itagaki, Tohru Tsujide
  • Patent number: 6711453
    Abstract: A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices 11a-11c for producing semiconductor devices, in-line measuring devices 12a-12c for measuring data of a lot, a database 2 storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server 1 including an estimated yield operating unit 1a for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit 1b for performing a production management of semiconductor devices ordered by a user on th
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: March 23, 2004
    Assignee: FAB Solutions, Inc.
    Inventors: Keizo Yamada, Yousuke Itagaki, Takeo Ushiki, Tohru Tsujide