Abstract: Embodiments include methods, apparatus, and electronic systems adapted to perform adaptive pre-distortion. Embodiments include combining an input sample with a gain value to generate a pre-distorted data sample, where the gain value is a function of at least one gain entry stored within a gain lookup table. An amplified analog signal is generated from the pre-distorted data sample, and a feedback sample is also generated, which corresponds to an antenna output signal. The antenna output signal includes the amplified analog signal. A difference indicator is generated to reflect a difference between the input sample and the feedback sample, and at least one updated gain value is generated based on a comparison between the difference indicator and at least one previous difference indicator. At least one gain entry within the gain lookup table is updated with the at least one updated gain value.

Abstract: A remote control device information management server, an information management method, an information management program, and a remote control device that improve user convenience by executing a process with another remote control device. An audio-visual device includes a main body and a remote control device for controlling the main body. For example, a television includes a main body provided with an information server incorporating a control unit and a memory. The control unit of the information server receives processing request data from the television remote control device to issue an alarm from another remote control device and record data for having the other remote control device issue an alarm. The control unit further receives a processing data request from the other remote control device at a predetermined time and transmits processing instruction data, which includes data accordingly recorded to a memory, to the other remote control device.

Abstract: A lead frame having a coating of organic compounds on its lead fingers prevents tin and flux from contaminating the lead fingers after die attach. The coating is removed prior to wire bonding. The coating allows for reliable second bonds (bond between wires and lead fingers) to be formed, decreasing the likelihood of non-stick and improving wire peel strength.

Abstract: An embodiment of a self-aligning resonator filter circuit includes a tunable resonator having a filter output node, an oscillator having an oscillator output node, a resistance element connected between the oscillator output node and the filter output node when the self-aligning resonator filter circuit is in a tuning mode, and a phase detector loop controller coupled between the oscillator output node and the filter output node. The phase detector loop controller is configured to measure a phase difference across the resistance element, and to adjust the tunable resonator in response to the phase difference.

Abstract: A device (100) may use one or more conductive elements (112) to electrically couple a substrate (116) and a cap (114). In one embodiment, an acceleration sense element may be formed on the substrate (116), and the cap (114) may be used to provide hermetic protection to the acceleration sense element. In one embodiment, conductive elements (112) may be formed by dispensing conductive die attach material. Wire bonds (e.g. 322) bonded to bond pads (e.g. 332) on the substrate (e.g. 316) may be used to couple substrate (116), the conductive element pad (335), and the cap (114), to a desired predetermined potential.

Abstract: An electronic device can include an inductor overlying a shock-absorbing layer. In one aspect, the electronic device can include a substrate, an interconnect level overlying the substrate, and the shock-absorbing layer overlying the interconnect level. The inductor can include conductive traces and looped wires. The conductive traces can be attached to the conductive traces over the shock-absorbing layer. In another aspect, a process can be used to form the electronic device including the inductor. In still another aspect, an electronic device can a toroidal-shaped inductor that includes linear inductor segments that are connected in series.

Abstract: A method for forming a split gate memory cell (10,11) using a semiconductor substrate (12) includes forming a select gate structure (48) and a sacrificial structure (50) over the substrate. An opening is between the select gate structure and the sacrificial structure. The opening is lined with a storage layer (56,168). The opening is further filled with select gate material (58,170). The sacrificial structure is removed after filling the opening with the select gate material.

Abstract: An RF power transistor with a metal design (70) comprises a drain pad (72) and a plurality of metal drain fingers (74) extending from the drain pad, wherein at least one metal drain finger comprises one or more sections of metal (74-1, 74-2, 100-1, 100-2, 100-3), each section of metal including of one or more branch (54-1, 54-2, 116-1, 116-2, 116-11, 116-21, 116-41) of metal having a metal width maintained within a bamboo regime.

Abstract: A semiconductor process and apparatus includes forming first and second metal gate electrodes (151, 161) over a hybrid substrate (17) by forming the first gate electrode (151) over a first high-k gate dielectric (121) and forming the second gate electrode (161) over at least a second high-k gate dielectric (122) different from the first gate dielectric (121). By forming the first gate electrode (151) over a first SOI substrate (90) formed by depositing (100) silicon and forming the second gate electrode (161) over an epitaxially grown (110) SiGe substrate (70), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (161) having improved hole mobility.

Abstract: A memory includes a plurality of memory arrays. Each of the plurality of memory arrays includes a plurality of sub-arrays. A plurality of power supply conductors are provided over the memory for supplying power to the plurality of memory arrays. When accessing the memory to simultaneously read a plurality of bits from the memory, the sub-arrays are accessed so as to provide a relatively uniform current demand on the plurality of power supply conductors. In one embodiment, the accessed sub-arrays are organized so that sides, or edges, of each accessed sub-array are not adjacent to each other.

Abstract: A brown out detector includes a first resistive element connected to a first voltage and a first node. A capacitor is connected to the first node and a second voltage. The detector also includes a second transistor and a third transistor. The second transistor has a drain connected to a second node, a source connected to the first node, and a gate connected to the first voltage. The third transistor has a source connected to the second voltage and the capacitor, a drain connected to the second node, and a gate connected to the first voltage. The detector also includes a latch having an input connected to the second node and a detector output, which generates a reset signal when the first voltage is less than a detection threshold voltage.

Abstract: Storage circuits (180-183 and 280-281) may be used for low power operation while allowing fast read access. In one embodiment (e.g. circuit 100), shared complementary write bit lines (101, 102), separate read bit lines (103-106), a shared read word line (107), and separate write word lines (108-111) are used. In an alternate embodiment (e.g. circuit 200), shared complementary write bit lines (201, 202), a shared read bit line (203), separate read word lines (206-207), and separate write word lines (208-209) are used. The storage circuit may be used in a variety of contexts, such as, for example, a register file (17), a branch unit (15), an SRAM (19), other modules (20), a cache (18), a buffer (21), and/or a memory (14).

Abstract: A method is intended to make it possible to drive a PTC electrical load element with a switching unit with the highest possible operational reliability. For this purpose, the electric current is switched off if a predetermined current threshold value is exceeded, the magnitude of the current threshold value being determined from the operating parameters of the load element.

Abstract: A method for dynamically determining frames required to build a complete picture in an MPEG video stream includes decoding an order of frames in the MPEG video stream according to a dependency vector model. The dependency vector model is configured for determining a dependency vector as a function of the decode order video stream for seamless operation over several types of MPEG streams. The method also includes performing frame accurate representations of the MPEG stream in a bidirectional fashion as a function of the dependency vector determined according to the dependency vector model.

Abstract: A polish pad (40, 42) and platen (50) assembly for use in chemical mechanical polishing of semiconductor devices includes a platen (50) having a vented endpoint window (62, 72, 82) with one or more venting passageways (e.g., 64, 66) and/or a grooved or channeled platen surface (176) to prevent air pressure buildup in the air gap (46) by discharging or venting air through one or more vent pathways (52) formed in the platen to provide a pathway to ambient or sub-ambient environment. The air permeable construction of the vented endpoint window (72) provides pressure relief for the air gap (46) between the pad endpoint window (44) and the vented endpoint window (72), but may also include passages (75, 76) that are filled with an air permeable hydrophobic material which protects the underlying endpoint detection system (30, 32) from contamination during cleaning of the platen endpoint window (72).

Abstract: A direct digital synthesizer (DDS) such as a Quantized Interpolated Edge Timed (QuIET) synthesizer is implemented in the feedback path of a translational Phase Lock Loop (PLL). The frequency translation introduced by the synthesizer reduces the amplification of reference feedback path noise sources, thereby enabling a wider loop bandwidth and improving high-pass filtering of phase noise without the addition of a second PLL.

Abstract: A sensor unit for a three-axis accelerometer enabling reduction in chip size. The sensor unit is connected to an accelerometer that detects a plurality of acceleration values for a plurality of axis directions. The sensor unit includes a correction value generation circuit that sequentially generates a plurality of correction values for correcting the plurality of acceleration values. A correction circuit is connected to the correction value generation circuit to sequentially correct the plurality of acceleration values with a plurality of correction values and generate a plurality of corrected acceleration values.

Abstract: A method includes an integrated circuit with a memory. The memory operates with an operating voltage. A value of a minimum operating voltage of the memory is determined. The value of the minimum operating voltage is stored in a non-volatile memory location that maybe a non-volatile register. This minimum operating voltage information can then be used in determining when an alternative power supply voltage may be switched to the memory or ensuring that the minimum voltage is otherwise met. The minimum voltage can be used only internal to the integrated circuit or also provided externally to a user.

Abstract: A method for forming a semiconductor device includes forming a liner over a semiconductor material including a control electrode. The method further includes forming a first spacer adjacent to the control electrode, wherein the first spacer has a first width. The method further includes implanting current electrode dopants. The method further includes removing the first spacer. The method further includes forming a second spacer adjacent the control electrode, wherein the second spacer has a second width and wherein the second width is less than the first width. The method further includes using the second spacer as a protective mask to selectively remove the liner. The method further includes forming a stressor layer overlying the control electrode and current electrode regions.

Abstract: A semiconductor optical device includes an insulating layer, a photoelectric region formed on the insulating layer, a first electrode having a first conductivity type formed on the insulating layer and contacting a first side of the photoelectric region, and a second electrode having a second conductivity type formed on the insulating layer and contacting a second side of the photoelectric region. The photoelectric region may include nanoclusters or porous silicon such that the device operates as a light emitting device. Alternatively, the photoelectric region may include an intrinsic semiconductor material such that the device operates as a light sensing device. The semiconductor optical device may be further characterized as a vertical optical device. In one embodiment, different types of optical devices, including light emitting and light sensing devices, may be integrated together.