Patents Assigned to Frontec Incorporated
  • Patent number: 5837559
    Abstract: A method for producing an electro-optical device comprising a first photolithographic step of forming a transparent pixel electrode, a second photolithographic of forming a gate electrode and a gate wiring, a third photolithographic step of forming a contact holes in an insulator film leading to the pixel electrode and the gate wiring, a fourth photolithographic step of forming a source electrode and a drain electrode and a channel portion above the gate electrode, and a fifth photolithographic step of forming a contact hole in a passivation film and isolating the semiconductor active film below the source electrode, the drain electrode and the source wiring from other adjacent portions.The number of photolithographic steps can be reduced, to improve the yield and decrease the production cost, adjacent thin film transistors.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: November 17, 1998
    Assignee: Frontec Incorporated
    Inventors: Ken Kawahata, Akira Nakano, Hirofumi Fukui, Hiroyuki Hebiguchi, Kenji Yamamoto, Chisato Iwasaki
  • Patent number: 5824572
    Abstract: A method of manufacturing a thin film transistor comprising the steps of: forming a gate electrode on the surface of a substrate; forming a gate insulation film covering the gate electrode; forming an active semiconductor layer and an ohmic contact layer on the gate insulation film; forming a source/drain electrode made of Cr; and removing a portion of the ohmic contact layer except for the portion in contact with the source/drain electrode by an etching solution, wherein the step of removing the ohmic contact layer is conducted in a state of at least partially or entirely peeling a resist on the source/drain electrode made of Cr.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: October 20, 1998
    Assignee: Frontec Incorporated
    Inventors: Hirofumi Fukui, Chae Gee Sung
  • Patent number: 5740488
    Abstract: The present invention provides a resist developing method and apparatus which achieves high in-plane uniformity and high reproducibility of resist pattern accuracy and low consumption of developer. The resist developing method sprays developer on a patterned resist formed on a substrate while rotating the substrate at high speed, drips the developer on the resist while rotating the substrate at low speed, and then, stops the substrate to hold the developer on the surface of the resist. The resist developing apparatus has a rotating substrate holder whose rotation speed is variable, a nozzle for supplying developer onto a substrate, and a device for supplying the developer to the nozzle. The nozzle includes a spray nozzle and a drip nozzle.
    Type: Grant
    Filed: February 27, 1996
    Date of Patent: April 14, 1998
    Assignee: Frontec Incorporated
    Inventor: Satoshi Fujimoto
  • Patent number: 5726077
    Abstract: A method for producing an electo-optical device including only five photolithographic steps, including a first photolithographic step for forming a gate electrode and gate wiring, a second photolithographic step for forming a semiconductor portion above the gate electrode, a third photolithographic step for forming a contact hole through the first insulator film to the gate wiring, a fourth photolithographic step for forming a source electrode, a source wiring and a drain electrode and then forming a channel portion above the gate electrode exposing said semiconductor active film and forming a transparent pixel electrode, and a fifth photolithographic step for forming a light-permeable opening above the transparent pixel electrode, and a contact hole for source wiring and gate wiring connection terminals.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: March 10, 1998
    Assignee: Frontec Incorporated
    Inventors: Ken Kawahata, Akira Nakano, Hirofumi Fukui, Hiroyuki Hebiguchi, Kenji Yamamoto, Chisato Iwasaki
  • Patent number: 5714407
    Abstract: An etching agent and an electronic device manufacturing method using the etching agent. The etching agent contains, in a solution, hydrofluoric acid at a concentration of 0.05 to 0.5 mol/l, and halooxoacid ions, represented by the formula (XO.sub.n).sup.p- (wherein X is a halogen element, n is 3, 4 or 6, p is 1, 2 or 3), at a concentration of at least 0.01 mol/l. An electronic device manufactured using the etching agent requires only a single etching step to etch both conductive layers (such as aluminum) as well as ohmic contact layers (a-Si).
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: February 3, 1998
    Assignees: Frontec Incorporated, Tadahiro Ohmi
    Inventors: Matagoro Maeno, Masayuki Miyashita, Hirohisa Kikuyama, Tatsuhiro Yabune, Jun Takano, Hirofumi Fukui, Satoshi Miyazawa, Chisato Iwasaki, Tadahiro Ohmi, Yasuhiko Kasama, Hitoshi Seki
  • Patent number: 5681487
    Abstract: The present invention provides a method of removing a photoresist film, which exhibits the high ability to remove photoresist and excellent safety and handling properties such as workability, In the removing method, the photoresist film is removed by chemical decomposition in an inorganic aqueous solution under ultraviolet-light irradiation. The inorganic aqueous solution is an aqueous solution of peroxomonosulfate or an aqueous solution containing 4.5 to 36 wt % of sulfuric acid and 0.05 to 0.8 wt % of hydrogen peroxide.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: October 28, 1997
    Assignees: Frontec Incorporated, Tadahiro Ohmi
    Inventors: Hitoshi Seki, Chisato Iwasaki, Akane Sekiya, Yasuhiko Kasama, Tadahiro Ohmi
  • Patent number: 5623161
    Abstract: An electronic element having a sufficient dielectric strength remarkably superior to any of the conventional ones. In this element, a conductive wire pattern is formed on the surface of a substrate which is insulative at least in its surface, and an insulating layer is so formed as to cover the substrate and the wire pattern either partially or entirely. The insulating layer is composed of a silicon nitride film where the oxygen content is less than 10 atomic percent at least in the vicinity of a step portion of the wire pattern. There is also provided a method of producing such electronic element, wherein the insulating layer is formed by plasma enhanced CVD under the conditions that the following relationship among a film forming temperature T (.degree. C.), an ion flux I (A) and a film forming speed v (nm/min): T.gtoreq.-651 (I/v)+390, 150.ltoreq.T.ltoreq.350 (where the ion flux denotes the current (A) per 60.times.60 cm.sup.2).
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: April 22, 1997
    Assignees: Frontec, Incorporated, Tadahiro Ohmi
    Inventors: Koichi Fukuda, Tomofumi Oba, Chisato Iwasaki, Yasuhiko Kasama, Tadahiro Ohmi
  • Patent number: 5609737
    Abstract: A method for manufacturing thin films in which a first film is formed on a substrate using chemical-vapor deposition (CVD), and a second film is formed on the substrate using sputtering, wherein the processes are sequentially performed in the same deposition chamber without exposing the substrate to an oxidative atmosphere. The deposition chamber includes a first electrode, and a second electrode located under the first electrode. During the CVD process, a dummy target is mounted on the first electrode and the substrate is mounted on the second electrode, a reactive gas is introduced into the chamber, and high frequency electrical power is applied to both the first and second electrodes, thereby causing the constituents of the reactive gas to deposit on the substrate to form the first film. Subsequently, any remaining reactive gas is removed from the chamber and an automated mechanism removes the dummy target from the first electrode and stores the dummy target in a storage chamber.
    Type: Grant
    Filed: August 12, 1994
    Date of Patent: March 11, 1997
    Assignee: Frontec Incorporated
    Inventors: Hirofumi Fukui, Masanori Miyazaki, Masami Aihara, Chisato Iwasaki, Koichi Fukuda, Yasuhiko Kasama
  • Patent number: 5605576
    Abstract: An object of the present invention is to increase the energy efficiency of a plasma apparatus and provide a high-frequency magnetron plasma apparatus which can precisely control plasma. The plasma apparatus has a susceptor electrode, a plasma exciting electrode, magnets mounted on the plasma exciting electrode, and a magnetic shield provided around the plasma exciting electrode, all of which are arranged in a vacuum chamber. The magnetic shield has a high impedance for a high frequency. The magnetic shield is preferably earthed with a direct current, more preferably earthed through an inductance.
    Type: Grant
    Filed: November 9, 1994
    Date of Patent: February 25, 1997
    Assignees: Frontec Incorporated, Tadahiro Ohmi
    Inventors: Makoto Sasaki, Hirofumi Fukui, Masami Aihara, Tadahiro Ohmi
  • Patent number: 5598012
    Abstract: A thin-film transistor for connecting a signal electrode line to a pixel electrode of a liquid crystal display, the thin-film transistor including: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a semiconductor layer formed on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer; a source electrode formed on the ohmic contact layer over a first end of the semiconductor layer; a drain electrode formed on the ohmic contact layer over a second end of the semiconductor layer such that a channel region is formed; and a protective film formed on the gate insulating layer, the source electrode, the channel region of the semiconductor layer, and the drain electrode. A width of the gate electrode is wider than a width of the semiconductor layer.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: January 28, 1997
    Assignee: Frontec Incorporated
    Inventor: Hiroyuki Hebiguchi
  • Patent number: 5573958
    Abstract: A method of fabricating a thin film transistor of an inverted stagger structure having a gate terminal, a gate insulator a semiconductor film, a source electrode and a drain electrode formed in that order; a gate terminal and a gate wiring are provided for supplying a scanning signal to the gate electrode; and a source terminal and a source wiring are provided for supplying a data signal to the source electrode, wherein the gate terminal is formed on an upper side of the gate insulating film and electrically connected to the gate wiring through a contact hole formed in the gate insulator.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: November 12, 1996
    Assignee: Frontec Incorporated
    Inventors: Hirofumi Fukui, Masanori Miyazaki, Hitoshi Seki, Makoto Sasaki, Yasuhiko Kasama
  • Patent number: 5570031
    Abstract: There is provided a surface potential measuring apparatus cable of accurately measuring the potential of a substrate regardless of the material of the substrate, and a plasma equipment capable of accurately measuring and controlling ion energy. The substrate surface potential measuring apparatus measures the surface potential of a substrate in a plasma processing apparatus and includes a terminal electrically connected to a suscepter electrode for holding the substrate, a first condenser disposed between the terminal and the ground and a potential measuring device for measuring the potential of the terminal. The surface potential of the substrate is found from the potential of the suscepter electrode measured by the potential measuring means.
    Type: Grant
    Filed: November 10, 1994
    Date of Patent: October 29, 1996
    Assignees: Frontec Incorporated, Tadahiro Ohmi
    Inventors: Makoto Sasaki, Hirofumi Fukui, Masami Aihara, Koichi Fukuda, Yasuhiko Kasama, Tadahiro Ohmi
  • Patent number: 5550091
    Abstract: There is provided an electronic device like a TFT using a silicon nitride insulating film of a single layer structure having an excellent dielectric voltage, and a method of producing the electronic device with reliability. In the electronic device, a conductive wiring pattern is deposited on a surface of an electrically insulated substrate, and an insulating layer is formed to cover the wiring pattern and the substrate. The insulating layer is made of a silicon nitride insulating film. A contact angle .theta. between the wiring pattern and the substrate is equals 60.degree. or more, and a value Tn1/Tg of a thickness Tn1 of the silicon nitride insulating film and a thickness Tg of the wiring pattern equals 2 or more. A horizontal distance Tn2 between a rise start position, where the silicon nitride film rises because of a step of the wiring pattern and the top end of the wiring pattern, and Tn1 are in a relation where 0.6.ltoreq.Tn2/Tn1.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: August 27, 1996
    Assignees: Frontec Incorporated, Tadahiro Ohmi
    Inventors: Koichi Fukuda, Tomofumi Oba, Masanori Miyazaki, Hirofumi Fukui, Chisato Iwasaki, Yasuhiko Kasama, Tadahiro Ohmi, Masaru Kubota, Hitoshi Kitagawa, Akira Nakano, Osamu Yoshida
  • Patent number: 5550484
    Abstract: An apparatus and a method for inspecting a thin film transistor easily and securely with good reproducibility without adverse effect on elements of the thin film transistor even if the thin film transistor is not provided with a capacitative element. The apparatus includes an inspection signal generating device for inputting drive pulse signals and test pulse signals, respectively to a gate electrode; a test voltage generating device for inputting a test voltage to the source electrode in synchronism with the drive pulse signals; an external electrode arranged to be opposed to the drive electrode and forming therebetween a capacitance for storing test charges; and an electric signal detecting device for detecting electric signals output from the capacitance formed between the drive electrode and the external electrode to the source electrode in synchronism with test pulse signals to be input to the gate electrode.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: August 27, 1996
    Assignee: Frontec Incorporated
    Inventors: Kenichi Mitsumori, Koji Kikuchi
  • Patent number: 5497146
    Abstract: A matrix wiring substrate is provided which can perform an electrostatic countermeasure until drive circuits are connected to a matrix wiring substrate, whereby the circuit wiring can be inspected at an earlier stage. The matrix wiring substrate, where circuit wiring is formed over a substrate, includes a guard ring formed around the circuit wiring and connected to the circuit wiring, and separable portions arranged between the circuit wiring and the guard ring for controlling the conduction between the circuit wiring and the guard ring. Since the circuit wiring is conducted with the guard ring by effecting externally the separable portion, lines of the circuit wiring are short-circuited electrically. No potential difference between the wires causes any electric discharge, thus resulting in increased manufacturing yield.
    Type: Grant
    Filed: May 27, 1993
    Date of Patent: March 5, 1996
    Assignee: Frontec, Incorporated
    Inventor: Hiroyuki Hebiguchi
  • Patent number: 5480563
    Abstract: There are provided a method and an apparatus for removing electrostatic charges from high resistivity liquid. An insulating film is formed on the surface of a conductive element which is in contact with the high resistivity liquid wherein the insulating film has such a thickness that a tunneling current may flow through the insulating film, thereby preventing the highly purified high resistivity liquid from being contaminated, as well as from becoming acid. Thus, objects to be treated with the high resistivity liquid become free of electrostatic charges without any contamination.
    Type: Grant
    Filed: March 29, 1994
    Date of Patent: January 2, 1996
    Assignee: Frontec Incorporated
    Inventors: Kenichi Mitsumori, Yasuhiko Kasama, Akira Nakano, Akira Abe, Tadahiro Ohmi