Patents Assigned to FUJITSU LIMITED of Kawasaki
  • Publication number: 20020143537
    Abstract: A process of creating a translation-example dictionary for an Example-based Machine Translation is provided. The process of the invention includes the steps of: a) comparing first translation-example information and another first translation-example information to detect if there is any differing portion; specifying a word class of each of differing portions, if any, detected in the step a); c) generating variables by linking the at least one differing portion detected in the step a) and the word class specified in the step b) so as to create second translation-example information; and d) registering the second translation-example information into the translation-example dictionary.
    Type: Application
    Filed: August 31, 2001
    Publication date: October 3, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventors: Hitoshi Ozawa, Kyoko Kawazu
  • Publication number: 20020133797
    Abstract: A uniform-density layout problem requires an optimal layout of multiple elements in a predetermined region under a set of conditions including a density-uniformization condition. The method determines an optimal solution to the problem and comprises the steps of: (a) obtaining an initial layout of the multiple elements in the predetermined region; (b) generating a linear combination of a first objective function, which represents the remaining conditions other than the density-uniformalization condition, and a second objective function, which represents the density-uniformalization condition, as a third objective function, which is assumed to represent the set of conditions of the problem; and (c) optimizing the third objective function by executing an iterative-improvement algorithm on the third objective function using the initial layout as an initial solution. The invention is especially useful to determine a layout of multiple circuit elements in designing LSI circuits and the like.
    Type: Application
    Filed: November 13, 2001
    Publication date: September 19, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventors: Fumiyoshi Sasagawa, Akio Shinagawa
  • Publication number: 20020124229
    Abstract: The present invention relates to an LCR extraction method for extracting LCR values from layout data having wiring pattern data in a plurality of wiring layers. The method has the steps of: generating the LCR values, for a wiring pattern, based on the layout data; finding the pattern congestion level in an area of the wiring pattern; and correcting the LCR values, based on pattern fluctuation values depending on the pattern interval between the wiring pattern and an adjacent pattern. Pattern width fluctuations occur in manufacturing processes in conjunction with the finer miniaturization of layout data, wherefore the precision of extracted LCR values can be enhanced by subjecting the LCR values found from layout data to corrections corresponding to those pattern width fluctuations.
    Type: Application
    Filed: July 11, 2001
    Publication date: September 5, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventors: Hisayoshi Ohba, Jun Watanabe
  • Publication number: 20020113796
    Abstract: An image division unit divides an original image. Each divided image is assigned an identifier, and additional information for generating an image corresponding to each divided image. An image distribution unit transmits the divided image and a reference drawing to a corresponding image generation terminal device. The image generation terminal device displays the reference drawing, generates an image corresponding to the received divided image, and transmit the generated image to an image distribution device. The image generation unit generates an entire image by integrating images received from a plurality of image generation terminal devices.
    Type: Application
    Filed: July 25, 2001
    Publication date: August 22, 2002
    Applicant: Fujitsu Limited of Kawasaki
    Inventors: Tomoyuki Oshiyama, Nobuyuki Mori
  • Publication number: 20020110945
    Abstract: An optical semiconductor device includes an SiC substrate having an n-type conductivity, and an AlGaN buffer layer having an n-type conductivity formed on the SiC substrate with a composition represented as AlxGa1−xN, wherein the AlGaN buffer layer has a carrier density in the range between 3×1018−1×1012cm−3, and the compositional parameter x is larger than 0 but smaller than 0.4 (0<x<0.4).
    Type: Application
    Filed: May 18, 1999
    Publication date: August 15, 2002
    Applicant: FUJITSU LIMITED OF KAWASAKI, JAPAN
    Inventors: AKITO KURAMATA, SHINICHI KUBOTA, KAZUHIKO HORINO, REIKO SOEJIMA
  • Publication number: 20020107710
    Abstract: The system comprises a technical information exchanging server device that is connected to in-office use client devices in respective departments in a company through a network and an outsider cooperative server device that is connected to agent-use client devices in respective departments outside the company through a network, and these server devices are mutually connected so as to communicate with each other.
    Type: Application
    Filed: June 18, 2001
    Publication date: August 8, 2002
    Applicant: Fujitsu Limited of Kawasaki
    Inventors: Osamu Takizawa, Shunichiro Koiso, Midori Suto
  • Publication number: 20020099820
    Abstract: A server displays a co-evaluation request containing an evaluation scheme of a first evaluator on a homepage. A second evaluator browsing the co-evaluation request through a terminal device transmits a proportion of user's own assignment as an answer to the server. The server displays the proportion of assignment of the second evaluator on the homepage. Thereafter, each of the first and second evaluators respectively transmits evaluation results of the co-evaluation to the server. The server displays each evaluation result received on the homepage.
    Type: Application
    Filed: March 14, 2002
    Publication date: July 25, 2002
    Applicant: FUJITSU LIMITED., Kawasaki , JAPAN
    Inventors: Kenichi Kishi, Hiromasa Kimura, Takeshi Yabuta, Masaru Seita, Yujiro Yoshida, Kazumasa Moriya
  • Publication number: 20020084308
    Abstract: A method of evaluating configuration of solder external terminals of a BGA-type tape-based semiconductor device mounted on a board such that the external terminals are joined to lands provided on the mounting board is provided. The method includes the step of obtaining geometric data related to opening of a tape substrate of the semiconductor device, solder balls to be placed at positions corresponding to the openings, and the lands of the mounting board and the step of deribing configuration of the solder external terminal based on the geometric date. The method further includes the step of calculating the volume of voids to be produced in the external terminals, so as to compensate for the geometric data related to the tape substrate.
    Type: Application
    Filed: March 20, 2001
    Publication date: July 4, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventors: Kanako Imai, Nobutaka Ito, Fumihiko Ando
  • Patent number: 6411325
    Abstract: It is an exemplified object of the present invention to provide an optical unit that can easily and inexpensively align an optical axis of the lens and a beam from a light source during continuous operation, and to provide an electrophotographic recording device that has such an optical unit and thereby can form a high-quality latent image on a photosensitive body. The optical unit as an exemplified embodiment of the present invention is configured to have the optical axis of the lens and a mounting position thereof substantially aligned with each other, and thus reduce or eliminate a misalignment of the optical axis with the light source and lens even if temperature rises.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: June 25, 2002
    Assignee: Fujitsu Limited Kawasaki
    Inventors: Yukihiro Matsushita, Takao Sugano
  • Publication number: 20020073147
    Abstract: A system for dispersing the load of a network that can avoid local traffic congestion in a communication route within a broadband network is provided.
    Type: Application
    Filed: February 14, 2002
    Publication date: June 13, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventor: Yoshikazu Aoki
  • Publication number: 20020051163
    Abstract: The printer prints in logical-page units, and is capable of printing a plurality of logical pages on the same physical page when printing a plurality of logical pages on one physical page. This printer apparatus comprises: a mechanical controller for receiving printing commands and controls the printing engine that prints on the printing medium; and a printer controller for receiving printing instructions from the host to print in logical-page units and creating printing data. The printer controller calculates the total physical length of the logical-pages after creating the printing data, then references the physical length of one page of the printing medium, and depending on the results, sends a printing command and the printing data to the mechanical control unit, and also according to the reference results, controls the detection operation of the mechanical controller for detecting when there is no printing medium.
    Type: Application
    Filed: April 2, 2001
    Publication date: May 2, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Kiyoaki Fujikura
  • Publication number: 20020048475
    Abstract: In an image-forming apparatus, which discharges to a stacker a sheet on which an image has been formed, the sorting of printed matter is performed on the stacker without providing optional equipment. Because of being constituted so as to independently drive a plurality of discharging rollers (30, 31), which discharge a sheet (100) to a stacker (19), and such that a controller (50) differs the driving of this plurality of discharging rollers for a normal mode and an attitude control mode, sorting of printed matter can be performed on top of the stacker with a single paper feeding means and a single stacker without providing optional equipment.
    Type: Application
    Filed: February 9, 2001
    Publication date: April 25, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Takeshi Kojima
  • Publication number: 20020044145
    Abstract: A flat display employs at least one high voltage different from logic voltages. The display has a voltage detection unit and a drive control signal control unit. The voltage detection unit is used to detect the high voltage. The drive control signal control unit is used to control drive control signals of the flat display in accordance with the detected high voltage. This arrangement eliminates charging currents that are applied to a display panel but have nothing to do on the actual displaying of data, or reactive currents due to unnecessary switching operations, thereby reducing power consumption.
    Type: Application
    Filed: October 12, 2001
    Publication date: April 18, 2002
    Applicant: Fujitsu Limited of Kawasaki
    Inventors: Shigetoshi Tomio, Naoki Matsui, Shinpei Yao
  • Publication number: 20020046328
    Abstract: In a write process through channels Ch1, Ch2, and Ch3, the deadline of each channel is set based on the transfer rate variable by the ratio of dummy packets to valid packets, and deadline information is written with write data on a disk. In a read process through a channel Ch4, the deadline is set according to the deadline information read with read data from the disk. Then, data is sequentially processed in order from the data having the earliest deadline. Considering the difference in transfer rate between outer and inner zones on the disk, a write zone is determined. When data is simultaneously recorded through the channels Ch1 and Ch2 on an ASMO in a groove-land record system, the data is sequentially recorded through the channel Ch1 on the groove and through the channel Ch2 on the land.
    Type: Application
    Filed: July 11, 2001
    Publication date: April 18, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventor: Yoshiyuki Okada
  • Publication number: 20020040411
    Abstract: An input/output request sent from a host is once cued through a channel adapter and is then transferred to a resource manager and is cued, and the cuing is distributed. Even if sequential input/output requests of the host are separated through a distribution processing to a plurality of paths, they are recognized on the device controller side and a countermeasure is taken. In the case in which a path from the host to the device controller is caused to be redundant into an operation system and a standby system, a path confirmation command is issued to the device drivers of a standby system path in order to confirm that the standby system path is normally operated or not. When the issuance of the input/output request is transferred to another path, a command for releasing the reserve of a transfer path is issued from another path.
    Type: Application
    Filed: August 16, 2001
    Publication date: April 4, 2002
    Applicant: Fujitsu Limited of Kawasaki, Japan
    Inventors: Sawao Iwatani, Sanae Kamakura
  • Publication number: 20020040421
    Abstract: To perform a data replace control activated prior to the execution of a cache memory reference instruction so as to reduce the latency when a miss occurs to a cache memory.
    Type: Application
    Filed: March 27, 2001
    Publication date: April 4, 2002
    Applicant: FUJITSU LIMITED KAWASAKI, JAPAN
    Inventor: Toshiyuki Muta
  • Publication number: 20020033956
    Abstract: The image processing equipment produces an image of enhanced quality, having dots with higher density than in an original image, by collating an original image with templates. The present invention reduces required number of templates. Original image data in a collation window is either mirror-converted, flip-converted or flip-and-mirror-converted in an array converter (33) and selected on a time-division basis to collate with a single template pattern (34). The effect is equivalent to the collation with maximum four templates. Thus the number of template patterns to be prepared is greatly reduced. Also, by preparing additional patterns to be stored into an area that became vacant attributed to the reduction of patterns, more sophisticated image enhancement may be attained.
    Type: Application
    Filed: February 9, 2001
    Publication date: March 21, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Mikio Koga
  • Publication number: 20020021907
    Abstract: This invention relates to a device for detecting when the magnetic toner in the developing unit of an image formation device is empty, and prevents erroneous detection of empty toner even when the fluidity of the magnetic toner becomes poor. The developing device (3) comprises a stirring unit (30) having a cleaning member (22) for cleaning the position of a toner sensor (10), a toner accumulation section (24), and a magnetic metal member (21). The magnetic metal member (21) and toner accumulation section (24) for preventing erroneous detection of the toner-empty alarm are located at the sensor position of the stirring unit, so it is possible for the toner sensor to synthetically generate output that toner is detected, and thus making it possible to prevent erroneous detection that the toner is empty.
    Type: Application
    Filed: February 9, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Toshiyuki Itoh
  • Publication number: 20020017659
    Abstract: A semiconductor memory has a buried bit line structure. One end of the bit line and one end of the diffused impurity layer are connected by being overlapped with each other, and the surface of the source/drain of the selection transistor and the surface of the diffused impurity layer including the connecting portion are silicidized by using metals having high melting points, Ti and Si in this case, thereby forming the titanium silicide layer thereon. This invention not only solves the various problems arising from the buried bit line structure but also realizes sure formation of the silicide, low resistance, greater fineness and high speed operation.
    Type: Application
    Filed: December 19, 2000
    Publication date: February 14, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventors: Hiroshi Hashimoto, Koji Takahashi
  • Publication number: 20020019953
    Abstract: In a clock supply control apparatus and method of the invention, a clock signal is generated, and supply of the generated clock signal from a clock supply logic unit to a second device of a computer system is controlled in response to a clock control signal, the second device being operable with the clock signal supplied from the clock supply logic unit. The clock control signal is set at one of a supply inhibition level and a supply allowance level in response to a state of a clock run signal line, the resulting clock control signal being supplied to the clock supply logic unit. A first device of the computer system is operable with the generated clock signal and outputs an interrupt signal to an interrupt signal line regardless of whether the clock control signal is set at the clock supply inhibition level or the clock supply allowance level.
    Type: Application
    Filed: March 20, 2001
    Publication date: February 14, 2002
    Applicant: Fujitsu Limited, Kawasaki, Japan
    Inventor: Kenji Urita