Abstract: Apparatus addresses 0A, 0B are respectively set to redundant apparatuses each of which is provided first and second unit and status addresses 01, 02 are respectively assinged to active state and stanby state. An address decision means decides an unit address of respective one of the first and second units in the redundant apparatus by combining an apparatus address of the redundant apparatus and the unit status address determined in accordance with whether the unit is active or standby. A source unit generates a destination address by combining the status address of the destination unit and the apparatus address of destination redundant apparatus to which the destination unit belongs and sends data to a system bus with said destination address attached thereto. A destination unit having an unit address which is the same as the destination address receives the data from the system bus and performing processing in accordance with said data.

Abstract: A semiconductor device includes a first chip having a circuit arrangement, and a plurality of first terminals formed on a main surface of the first chip and substantially arranged into a line. The semiconductor device also includes a second chip having a circuit arrangement identical to that of the first chip, and a plurality of second terminals formed on a main surface of the second chip and substantially arranged into a line. The first and second chips are arranged in a predetermined direction perpendicular to the main surfaces of the first and second chips. The semiconductor device also includes a plurality of connecting members connected to the first terminals and the second terminals and provided for external connections.

Abstract: A semiconductor memory device is disclosed, which is supplied with power from a power supply and which includes memory cells and a sense amplifier connected to the cells via bit lines. The memory device further includes a circuit for enabling the sense amplifier in response to a supplied enable signal, and for allowing the sense amplifier to rewrite cell data, read on the bit lines, into the memory cell again in self-refresh mode. The enabling circuit incorporates a noise suppression circuit which suppresses rapid changes in an operation current flowing between the power supply and the sense amplifier in order to minimize power supply related noise.

Abstract: When sending electronic mail, a sender designates the payer of the communications fee for the transmission between an electronic mail center and a receiver, that is, the sender or the receiver. When the receiver accesses the electronic mail center, the electronic mail center notifies as the mail summary information for each mail the payer of the fee for the communication between the electronic mail center and the receiver. The fee payer information is displayed on the terminal of the receiver. When the receiver receives from the electronic mail center the electronic mail addressed to him, the electronic mail center generates a bill according to the fee required for the delivery of the electronic mail separately for senders and receivers. In this case, the communications fee for the transmission between the electronic mail center and the receiver is charged to the payer designated by the sender when the electronic mail is sent.

Abstract: A semiconductor integrated circuit includes a chip (10a), a core area (12) on the chip in which tester circuits (14) are placed, and an I/O area (13) on the chip. The I/O area is provided at the periphery of the core area, and in the I/O area a plurality of tester circuits (17) are placed for testing the functions of respectively testee circuits in, respectively core area. The I/O area is provided with test control circuits (15) for supplying a control signal (C2) and a clock signal (C3), for testing said tester circuits, to the test circuits and testee circuits, on the basis of an external control signal supplied from outside.

Abstract: A rotational position-detecting device detects the rotational position of various kinds of rotating shafts in an accurate and simplified manner. A parameter element is mounted on a rotating shaft of a motor or the like for providing a parameter which varies in a manner corresponding to the rotational position of the rotating shaft. The parameter element may be formed by a variable resistor a resistance of which varies in a manner corresponding to the rotational position of the rotating shaft, or alternatively by a variable capacitor a capacitance of which varies in a manner corresponding to same. An oscillator generates a signal having a frequency dependent on the resistance or capacitance of the parameter element. The oscillator may be formed by a VCO to which is applied voltage dependent on the resistance of the parameter element, to generate a signal having a frequency dependent on the applied voltage.

Abstract: A semiconductor integrated circuit device has a dual configuration involving a first latch circuit and a second latch circuit that are connected in parallel with each other. The first latch circuit is provided with an input terminal to operate the first latch circuit independently of the second latch circuit. This semiconductor integrated circuit device is capable of individually testing the latch circuits of the dual configuration, to ensure the merit of the dual configuration.

Abstract: Disclosed herein is a battery driven equipment including an equipment body, a battery pack detachably mounted in the equipment body, a locking mechanism for releasably locking the battery pack with respect to the equipment body, a device for determining whether or not the battery pack is allowed to be removed from the equipment body, and a device for instructing the locking mechanism to lock or unlock the battery pack according to a result of determination by the determining device.

Abstract: A data processing system including a small throughput access source and a large throughput access source therein for accessing a main storage unit in a consecutive block access mode. The system further includes a detecting unit and a selecting unit. The detecting unit detects an access conflict expected to occur at the same address of the main storage unit. The selecting unit responds to the detection by the detecting unit and momentarily stops the access by the small throughput access source to give priority to the large throughput access source for accessing the conflicting address of the main storage unit.

Abstract: An optical disk drive which does not require a high precision servo mechanism and intensive error correction technique. The recording surface of a recording medium is stationary and is completed as a spherical or semi-spherical plane. An optical head is provided at the center of curvature. A laser beam emitted from the optical head, provided at the center of curvature, is displaced physically or electrically, without rotating the recording surface.

Abstract: A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

Abstract: A multilayer insulating film of a semiconductor device, where the distributed quantity of carbon or fluorine is maximized at the interface between insulating films. The concentration of carbon present at the interface is 1.times.10.sup.20 atoms/cm.sup.3 or more.

Abstract: A parallel data processing system performs a data processing by using a plurality of data processing units, namely, processor elements, synchronously. The parallel data processing system comprises a plurality of data processing units, a plurality of trays, and a clock generator. The plurality of trays are connected to respective data processing units and have a function of storing a plurality of data and a function of transmitting the data. The clock generator is producing a clock so that the data transfer between the trays and between the trays and the data processing units, and the data processing in the data processing unit is executed synchronously. Data are transferred between trays during the period in which they are processed, thus substantially eliminating the data transmission time.

Abstract: Disclosed is a data reading process as well as an improved semiconductor memory device. Input data supplied to the memory device is written in one of memory cells via a pair of bit lines when a write enable signal is active. After writing of the input data is completed, an equalizing circuit is activated to equalize the potential levels of bit lines used in data writing. An output circuit of the memory device is controlled such that the input data is forcibly output as output data from the memory device during the equalization immediately after writing of the input data is completed.

Abstract: An amount-of-data identifying portion identifies the amount of data transmitted by referring to a specific portion in the upper layers of the information transmitted from the terminal of a LAN, and a bandwidth control line monitor portion calculates the band which is necessary for communication. Communication between LANs is executed through the number of wide area network interface portions which is determined on the basis of the calculated band. In the case that the communication is performed after securing the band corresponding to the traffic characteristics (transfer speed, etc.

Abstract: A projector comprising liquid crystal display panels and a projection lens for projecting the modulated light to a screen. A back surface reflection mirror including a transparent plastic sheet and a reflecting film is arranged between the projection lens and the screen. The mirror is thin and light and may have optical anisotropy. In order to eliminate an uneven pattern appearing in the screen caused by optical isotropy of the mirror and the difference between the light distribution characteristics in the screen for P- and S-polarized light, the projection lens and the back surface reflection mirror are arranged in such a relationship that a wave normal vector of an arbitrary component of the light projected by the projection lens and made incident to the back surface reflection mirror is not parallel to the optical axis of the plastic sheet.

Abstract: A silicon-on-insulator (SOI) structure having a single crystal layer of a group III-V compound semiconductor material contacting a single crystal substrate of sapphire such that a principal surface of the single crystal layer establishes an intimate contact with a corresponding principal surface of the single crystal substrate and the single crystal layer, and the single crystal substrate are bonded with each other while elevating a temperature.

Abstract: A video information distribution system allows users to call a video center and receive required video information from the video center through high- and low-speed transmission lines. The system employs trunk units. The trunk units are arranged in the video center or between the video center and the users, to receive video information repeatedly transmitted at high speed through the high-speed transmission lines. The trunk units reproduce the received video information at normal speed and transmit the reproduced information to the users through the low-speed transmission lines. Each of the trunk units has a reproduction memory, a fast-forward memory, and a rewind memory to provide the users with reproduction, fast-forward, and rewind functions similar to a video deck.

Abstract: Herein disclosed a card type storage medium which can solve inconvenience to owners of the card type storage medium upon PIN verification or data restoration, and a card type storage medium issuing apparatus which issues such card type storage medium. The card type storage medium comprises a storage unit holding a file area including a dedicated file served to hold PINs and file names of data files stored in a directory area in the storage unit such that the PIN and file name of each data file correspond to each other. The card type storage medium holds control information including a master PIN for the dedicated file in the directory area in the storage unit. A recovery information unit is additionally provided in a data file in the file area in the storage unit, which holds recovery information obtained every time the data file is updated. This card type storage medium is applicable to, for example, an IC card.

Abstract: An input/output request control system in a multi-processor system includes a plurality of information processing modules (PM). The system comprises a plurality of input/output adapters (ADP) commonly used by each of said information processing modules and a plurality of input/output devices (DVC) divided into groups, each group controlled by one of the input/output adapters. An input/output request maintaining table (LDVC) manages input/output requests from respective information processing modules for each of the input/output devices controlled by said information processing modules by using a queue. Input/output requests from respective information processing modules are processed based on the state of the input/output request maintaining table and the input/output devices.