Patents Assigned to Fujitsu
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Publication number: 20070046104Abstract: An information apparatus 1 receiving power from a portable power source 16 is provided with an external power receiving section 17 receiving the power by connection to non-portable power sources 20 and 21; an operation section SW switching supply and cutoff of the power from the non-portable power sources 20, 21 that are connected to the portable power source 16 or to the external power receiving section 17; judging sections 11 and 19 for judging, when the information apparatus 1 is activated by the supply of power, whether or not the activation is a first activation since the information apparatus 1 is shipped from a factory; and an informing section 13 for prompting a user to connect the external power receiving section 17 to the non-portable power sources 20 and 21 when the activation is the first activation since the information apparatus 1 is shipped.Type: ApplicationFiled: December 20, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Naoki Iwasa, Teruhiko Kimura
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Publication number: 20070049097Abstract: A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.Type: ApplicationFiled: September 21, 2006Publication date: March 1, 2007Applicants: FUJITSU LIMITED, INTERNATIONAL SUPERCONDUCTIVITY TECHNOLOGY CENTER, THE JURIDICAL FOUNDATIONInventors: Satoru Hirano, Hideo Suzuki, Keiichi Tanabe, Akira Yoshida, Tsunehiro Hato, Michitaka Maruyama
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Publication number: 20070045280Abstract: A thermal head driving method of driving thermal heads is disclosed. The method includes a step of dividing the thermal heads into plural groups, providing for each of the groups a common potential terminal, a step of using a drive circuit to drive the thermal heads of one or more of the groups, and a step of applying an operating voltage to the common potential terminal of said one or more groups driven by the drive circuit.Type: ApplicationFiled: May 24, 2006Publication date: March 1, 2007Applicant: FUJITSU COMPONENT LIMITEDInventors: Sumio Watanabe, Fumio Sakurai, Yukihiro Mori, Norio Endo, Shuko Yamaji, Tomoyuki Yokoyama
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Publication number: 20070048857Abstract: A cell trapping plate traps a cell by applying a negative pressure suction through a trapping hole provided therein. A capillary needle is stuck into the trapped cell to inject an injectant. The cell trapping plate includes trapping holes arranged at irregular intervals in directions of two coordinate axes in a two-dimensional orthogonal coordinate system.Type: ApplicationFiled: November 29, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Akio Ito, Akihiko Yabuki, Satoru Sakai, Moritoshi Ando, Sachihiro Youoku
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Publication number: 20070049024Abstract: An insulating film having a concave portion is formed on a semiconductor substrate. The inner surface of the concave portion and the upper surface of the insulating film are covered with an auxiliary film made of Cu alloy containing a first metal element other than Cu. A conductive member containing Cu as a main composition is deposited on the auxiliary film, the conductive member being embedded in the concave portion. Heat treatment is performed in an atmosphere containing P compound, Si compound or B compound. With this method, a content of element other than Cu in the conductive member can be reduced and a resistivity can be lowered.Type: ApplicationFiled: December 6, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Nakao, Hideki Kitada, Nobuyuki Ohtsuka, Noriyoshi Shimizu
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Publication number: 20070048916Abstract: The method for fabricating a semiconductor device comprises the steps of: forming on a silicon substrate 10 a hard mask 20 of a silicon oxide film 12, and a silicon nitride film 14 having a width smaller than a width of the silicon oxide film 12; etching the silicon substrate 10 with the hard mask 20 as the mask to form a trench 26 for defining an active region 24 in the silicon substrate 10; and forming a silicon oxide film 28 on the silicon substrate 10 with the trench 26 formed in.Type: ApplicationFiled: November 28, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Rintaro Suzuki, Hiroshi Morioka, Masanori Terahara
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Publication number: 20070047969Abstract: The present invention is directed toward a method for setting a driving voltage of a differential quadrature phase-shift modulator, this method making signal quality superior in response to an individual difference in extinction ratio due to variations in manufacture of a device. To this end, signal quality of differential quadrature phase-shift modulated light output from a differential quadrature phase-shift modulator is acquired. An average amplitude of a first or second driving voltage signal is adjusted according to the signal quality of the thus-acquired differential quadrature phase-shift modulated light.Type: ApplicationFiled: November 16, 2005Publication date: March 1, 2007Applicant: FUJITSU LIMITEDInventors: Hisao Nakashima, Takeshi Hoshida
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Patent number: 7184333Abstract: First dummy memory cells connected to a first dummy signal line have the same shape and characteristics as those of a real memory cell. The first dummy memory cells are arranged to be adjacent to outermost real memory cells. A voltage setting circuit changes the voltage of the first dummy signal line from a first voltage to a second voltage in order to write test data onto the first dummy memory cell during a test mode. By writing data of a logic opposite to that of the test data onto the real memory cell adjacent to the first dummy memory cell by means of an operation control circuit, a leak failure that may occur between the first dummy memory cell and the real memory cell adjacent thereto can be checked.Type: GrantFiled: December 3, 2004Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Shinichi Yamada, Waichiro Fujieda, Shinichiroh Ikemasu
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Patent number: 7184945Abstract: A service distribution device and method for balancing load distribution among servers without placing the servers in a high load or overloaded state. Models of the servers and services are generated from the record of monitored packets. Simulations are performed to predict the server load, and based on the results of the predictions, settings are determined to distribute the services among the servers so that load is balanced.Type: GrantFiled: September 28, 2000Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Eiichi Takahashi, Ken Yokoyama, Naohiro Tamura
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Patent number: 7183839Abstract: A diode detecting circuit which cancels temperature dependence of a detecting diode so as to obtain highly sensitive detection. The diode detecting circuit has a first diode detecting unit in which a first diode detects an input signal biased by a bias voltage, a second diode detecting unit in which a second diode receives the bias voltage, and an output unit which compares an output from the first diode detecting unit with an output from the second diode detecting unit.Type: GrantFiled: November 30, 2004Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Shinji Saito
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Patent number: 7183659Abstract: A semiconductor integrated circuit device having a plurality of circuit elements and a plurality of wires connecting the circuit elements, includes an orthogonal wire having a first minimum wire width which is formed on a first wiring layer and extends horizontally or vertically; a diagonal wire having a second minimum wire width which is substantially equal to the first minimum wire width, formed on a second wiring layer which differs from the first wiring layer and extending in a diagonal direction in relation to the orthogonal wire; and a via having a size which is no greater than the first or second wire width, formed at point at which the orthogonal wire and diagonal wire overlap so as to connect the orthogonal wire and diagonal wire, wherein one of the diagonal wire and orthogonal wire includes an enlarged wire width region in the position at which the via is formed, the wire width of the enlarged wire width region being enlarged beyond the first or second minimum wire width.Type: GrantFiled: January 25, 2006Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Masato Suga
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Patent number: 7184243Abstract: A cartridge loading mechanism including a carrier movable between a first position where a magnetic tape cartridge having an openable shutter and a notch is inserted into the carrier and a second position where the cartridge is mounted onto a reel motor, and a shutter opening mechanism fixed to a base of a magnetic tape drive and having an engaging portion adapted to engage the shutter of the cartridge to open the shutter. The loading mechanism further includes a leaf spring mounted on the carrier and having a hook adapted to engage the notch of the cartridge, and a driving mechanism for moving the carrier between the first position and the second position. After the hook of the leaf spring comes into engagement with the notch of the cartridge at a third position during the movement of the carrier from the first position to the second position, the engaging portion of the shutter opening mechanism starts to engage the shutter of the cartridge.Type: GrantFiled: April 22, 2005Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Kengo Yamakawa
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Patent number: 7183748Abstract: A charging control unit decides the number of battery cells on the basis of an output voltage of a battery pack, and an output voltage of a charging circuit is determined in accordance with the decided number of battery cells. Even though supply of an external power supply is detected, when a battery connection is not detected, the power supply circuit of the charging control unit is set in a stop state. In addition, when disconnection of the battery is detected, a canceling voltage for canceling a cutoff state caused by overdischarging of the battery is output. In a power supply device for a portable terminal, a capacitor electrically charged by an output voltage of main DC/DC converter is connected as an auxiliary power supply of a backup DC/DC converter to make exchange of the auxiliary battery unnecessary.Type: GrantFiled: February 7, 2000Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Hirokazu Unno, Hisashi Hayasaka
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Patent number: 7185240Abstract: An apparatus for testing codec software includes a processor unit operative to execute a test program to read input data from a memory unit, to transform the input data according to transformation conditions by referring to data of the transformation conditions stored in the memory unit, and to generate a plurality of transformed data sets for storage in the memory unit, operative to execute a codec program to perform a plurality of encoding processes in parallel with respect to the plurality of transformed data sets stored in the memory unit to generate a plurality of encoded data sets, and to perform a plurality of decoding processes in parallel with respect to the plurality of encoded data sets to generate a plurality of decoded data sets, and operative to execute the test program to evaluate quality of at least one of the encoded data sets and the decoded data sets.Type: GrantFiled: June 22, 2005Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Kenji Saito, Kazuyoshi Oyama
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Patent number: 7185296Abstract: A method and program for capacitance extraction enabling reduction of the need for division into segments during extraction of capacitances in an LSI device having diagonal wires, so that increases in the number of processes for capacitance extraction can be suppressed are provided. In the method and program, a wire model is generated in which, for a wire segment such that the wire of interest and an adjacent wire are not parallel, either the wire of interest or the adjacent wire is replaced so as to be parallel to the other, and the capacitance of the wire of interest is extracted for this wire model, so that the number of processes in the capacitance extraction process can be reduced.Type: GrantFiled: July 27, 2004Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Hisayoshi Ohba, Jun Watanabe
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Patent number: 7183200Abstract: A semiconductor device has a multi-layer interconnection structure with a first interlayer insulation film and a second interlayer insulation film that is formed on the first interlayer insulation film and has a hardness and an elastic modulus larger than those of the first interlayer insulation film, and is fabricated by a step of forming a resist film on the second interlayer insulation film via an antireflective film, a step of exposing to light and developing the resist film to form a resist pattern, and a step of patterning the antireflective film and the multi-layer interconnection structure using the resist pattern as a mask, wherein a film with no stress or for storing compressive stress is used as the antireflective film.Type: GrantFiled: February 28, 2005Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Kengo Inoue
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Patent number: 7184349Abstract: A semiconductor memory device is provided for minutely changing a refresh interval according to a detected temperature and thereby lowering its power consumption. A temperature detector detects a temperature of a chip and outputs the corresponding temperature signal. A reference temperature signal output unit outputs the corresponding reference temperature signal with each of different reference temperatures to be compared with the chip temperature according to a selection signal. A temperature comparison unit compares the chip temperature with the reference temperature through the temperature signal and the reference temperature signal. A selection signal output unit outputs the selection signal according to the compared result of the temperature comparison unit. A refresh interval control unit changes the refresh interval according to the compared result of the temperature comparison unit.Type: GrantFiled: July 5, 2005Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Atsumasa Sako
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Patent number: 7185055Abstract: A server and plural terminal devices form a network. Messages are transferred among the terminal devices via a plurality of virtual communication spaces formed on the network. The transmitted and received messages are displayed on a display device of each terminal device together with the message sender identifying information. The identifiers of members utilizing the virtual communication spaces and character-train information corresponding to the respective identifiers are stored in a display name management table. When an identifier and a message are sent from a terminal device, the server converts the identifier into a character train by means of the display name management table and sends the character train to the terminal devices.Type: GrantFiled: March 13, 2001Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Yasuhide Matsumoto, Masahiko Murakami, Sumiyo Okada
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Patent number: 7183831Abstract: A clock switching circuit suitably adapted to stable switching operation of high-frequency multiphase clock signals. The clock switching circuit receives two clock signals and selectively outputs one of the two clock signals in accordance with a selection signal. The clock switching circuit includes a switching controller that transfers the selection signal at the beginning of a period in which both of the two clock signals are active, and an internal selector that selectively outputs one of the two clock signals in response to the selection signal transferred from the switching controller.Type: GrantFiled: October 27, 2004Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventor: Akimitsu Ikeda
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Patent number: 7183117Abstract: A supply apparatus for preparing a mixed chemical solution of a predetermined mixing ratio at a low cost and for supplying the mixed chemical solution stably. The supply apparatus includes a measuring apparatus located on an intermediate portion of a flow channel through which the chemical solution flows upward for measuring properties of the mixed chemical solution. In the lower portion of the measuring apparatus, disposed is a nozzle for spouting the chemical solution upward.Type: GrantFiled: October 22, 2002Date of Patent: February 27, 2007Assignee: Fujitsu LimitedInventors: Masataka Fukuizumi, Hiroshi Osuda, Toru Matoba, Takeshi Nakamura