Abstract: The present invention relates to a portable terminal device, such as a cellular phone, which has a screen display section, such as an LCD module, in its upper part and a key manipulation section having an array of plural keys in its lower part. The portable terminal device has a removable battery and is highly protected from water especially in a battery area. There is provided a pair of inner housings, that are a backside inner housing and a front side inner housing, which form a battery compartment having an opening for battery insertion/removal. A key manipulation sheet is disposed on the front side inner housing, and the whole components are covered with a pair of outer housings.

Abstract: In order to realize a display having good contrast and stable addressing by using a gas discharge display device having a screen of a three-electrode surface discharge structure having a characteristics that a counter discharge start voltage is higher than a surface discharge start voltage, prior to starting of initialization of an electrified state as canceling of setting of addressing that was performed last, positive charge is formed between opposed electrodes so that a discharge can be generated easily in the addressing after the initialization, and the initialization is performed so that the formed positive charge does not vanish.

Abstract: The present invention has been made to allow a user to easily grasp the operation area and thereby to easily and quickly perform the operation even in the case where the operation area extends across the entire system. An operation guidance display unit displays the entire appearance of a system to be operated as well as displays the operation position, in a specific manner, relative to the entire appearance of the system to thereby provide guidance of the operation position in the entire system and further displays, in an enlarged manner, the operation method related to the operation position displayed in a specific manner to thereby provide guidance of the operation method.

Abstract: A superconducting circuit includes a first transformer to produce a first alternating-current output at a secondary-side inductor, a second transformer to produce a second alternating-current output at a secondary-side inductor, a first pulse generating circuit to produce a single flux quantum pulse responsive to the first alternating-current output, a second pulse generating circuit to produce a single flux quantum pulse responsive to the second alternating-current output, and a confluence buffer circuit to merge the single flux quantum pulses from the pulse generating circuits, wherein each of the pulse generating circuits includes a superconducting loop including the secondary-side inductor, a first Josephson junction situated in the superconducting loop to generate the single flux quantum pulse, and a second Josephson junction situated in the superconducting loop, a threshold value of the second Josephson junction for an electric current flowing through the secondary-side inductor being different from tha

Abstract: A semiconductor device manufacturing method allowing effective inspection at low cost of a wafer having formed thereon chips. When forming chips on the wafer, a reticle having formed thereon chip patterns, monitor element/circuit patterns and connection patterns is used according to a formation step of the chips. The reticle is constructed such that a part of the monitor element/circuit patterns and the connection patterns are formed in the inner side area of an outer peripheral dicing area and when exposing adjacent shot positions, the pattern is formed on a portion where no outer peripheral dicing areas overlap whereas no pattern is formed on a part of a portion where outer peripheral dicing areas overlap. When using the reticle, a circuit which surrounds the whole chip formation area can be formed with the chips.

Abstract: When reserved mail fails to be transmitted, an error message is promptly displayed in a partial field of a display unit for a predetermined period of time. A user operates a specific key in the predetermined period of time, thereby allowing the user to return to a screen for editing the failed mail. The user can promptly take an appropriate action on the failed reserved mail.

Abstract: To provide a compact and low-cost glass antenna in which an antenna position can be easily recognized by emitting a light near the antenna position, and thus a passerby or the like can easily grasp the position when he or she holds up a tag. The glass antenna has plate-like glasses 11A and 11B, antennas 12A and 12B provided on the plate-like glasses 11A and 11B, and a light emitting unit 16a that is provided so as at least a part thereof to be overlapped with the antennas as seen from the direction that the antennas 12A and 12B are directed, and scatters the light guided by the plate-like glasses 11A and 11B to emit light in the vicinity of the antenna.

Abstract: A mobile device controlling method for changing a setting of a mobile device. A receiving of an application for a setting change of the mobile device, a specifying of an e-mail address an e-mail address of the mobile device, and creating a setting change e-mail are conducted. Then, the setting change e-mail created is sent to the specified e-mail address.

Abstract: To achieve an air bag system in which a safing determination processing circuit can be implemented on one integrated circuit, the air bag system, which is equipped with first and second sensors (101, 103) for detecting a vehicle crash, and which outputs a signal for expanding an air bag when it is determined that a vehicle crash has occurred based on the outputs of the first and second sensors, comprises: a processing unit (3) for processing an output signal of the first sensor (101) by software; and a processing circuit (2) for processing an output signal of the second sensor (103) by hardware, wherein the processing unit (3) includes a non-activation fault diagnosis section (33) which, based on the output signal of the second sensor (103), detects a failure that can lead to non-activation of the air bag, and the processing circuit (2) includes an erroneous-activation fault diagnosis section (240) which, based on the output signal of the second sensor (103), detects a failure that can lead to erroneous activ

Abstract: A semiconductor device comprises a semiconductor chip which is mounted on a stage. A plurality of leads are electrically connected with the semiconductor chip. A package encloses the semiconductor chip and a part of the plurality of leads. A first corner lead is provided in the stage and outwardly extends from at least one of vertex portions at four corners of the stage to an exterior of the package.

Abstract: A reproducing system having a simultaneous recording and reproducing means that is functionally more sophisticated. This sophisticated recording and reproducing means can perform recording and reproducing of received data more properly even when the power is turned off, or the received channel is changed. The reproducing system includes a simultaneous recording and reproducing means which, as recording received data in a recording means, can either arbitrarily choose and reproduce data recorded in the recording means or arbitrarily choose and reproduce in-reception data according to operations, and a recording continuing means operable to maintain the reception and continue recording data into the recording means for a prescribed period from a reception stop.

Abstract: Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to arrange the memory area.

Abstract: A protecting route design method is disclosed for a communication network including a plurality of nodes having preset information on a protecting route to switch over in parallel from a working route thereto when link or node failure occurs, according to a failure notification message including failure location information being transmitted from a failure detection node to each node. The protecting route design method includes the steps of searching a protecting route which can minimize a transfer time of the failure notification message from the failure detection node; and then, updating the searched protecting route to a protecting route having a spare communication capacity sharable for a different failure and having a route switchover time to be completed within a given time limit.

Abstract: The present invention provides a confidential information management system which allows users to securely obtain confidential information files containing various confidential information, which files are securely stored in the present system, anywhere and anytime, using a minimum of confidential information. A confidential information file and encoding/decoding software are downloaded to an information terminal from a confidential information managing server and an encoding/decoding software managing server, respectively, so that the confidential information file is decoded on the information terminal by using the encoding/decoding software. The present system is applicable to various (computer) systems which store and manage confidential information (ID numbers, passwords, encryption keys, digital certificates, etc.) for use in user verification.

Abstract: The present invention aims to provide a programmable logic device (PLD), and a related control program, capable of improving a product yield by avoiding a defect point according to defect point detected after PLD fabrication. The PLD includes a plurality of logical blocks including programmable logic circuits; storage in which both circuit information specifying path connecting the plurality of logical blocks using information specifying resources included in the path and defect point information specifying fault resource are stored in advance; replacement control section which refers to defect point information, decides whether fault resource is included in the path specified by circuit information, and when fault path is included, obtains replacement path, and rewrites circuit information with data identifying resources included in replacement path; and wiring resource section which reads out circuit information stored in storage, and forms a predetermined logic circuit based on readout circuit information.

Abstract: In a packet data processing apparatus for processing a packet received from a network by a processor, a packet data access part includes a plurality of registers arranged in series and sequentially shifts the received packet through the plurality of registers toward an outlet of the packet data access part in synchronization with a clock. The processor processes the received packet by accessing the packet data access part while the received packet is being shifting through the plurality of registers.

Abstract: A first transparent latch receives a first synchronised signal changing its logic state synchronously with respect to a clock signal. A second transparent latch receives a second synchronised signal output by the first latch. When the clock signal has a first logic state the first latch has a non-responsive state and the second latch has a responsive state, and when the clock signal has a second logic state the first latch has the responsive state and the second latch has the non-responsive state. The change in logic state of a third synchronised signal output by the second latch is guaranteed to occur in a particular half-cycle of the clock signal, irrespective of process/voltage/temperature (PVT) variations of the circuitry.

Abstract: In a two-dimensional data processing technique according to the present invention, there is provided a mechanism for inputting two-dimensional data, and for outputting a piece of two-dimensional data after subjected selectively to one of a plurality of predefined operations to a row or a column of the two-dimensional data; operation contents comprising an operation type which specifies the operation to be performed by the mechanism, an input target and an output target are designated; and at least one piece of operation contents is recorded in the designation order of the operation contents.

Abstract: In a semiconductor device manufacturing method, the step of calculating an exposure time of a photoresist includes (a) a step of deciding whether or not a variation of a line width of a device pattern 104 or a resist pattern 102a in a reference chip in a plurality of semiconductor wafers 101 that are manufactured in the past and have the same wafer information as an subject semiconductor wafer 101 is contained within a tolerance over a plurality of semiconductor wafers 101 in the past, and (b) a step of correcting the exposure time every chip by using an exposure correction table 22 if it is decided in the step (a) that the variation falls within the tolerance.

Abstract: A broadband pulse width modulation circuit is provided which can achieve high speed responsibility while assuring an advantage of a pulse width modulation (PWM) circuit having a good power efficiency in order to satisfy a demand for reduction of power consumption and a demand for high speed responsibility in the field of optical communication. The broadband PWM circuit includes a PWM circuit for modulating and smoothing a pulse width in response to an input voltage signal to supply electric current to a load, a frequency band selection and amplification circuit for selectively amplifying only a specific frequency band of the input voltage signal, and a composition circuit for combining electric current from the pulse width modulation circuit and the electric current amplified by the frequency band selection and amplification circuit.