Abstract: The present invention includes circuitry wherein a pair of voltage supply terminals are included, with a first current source connected to one voltage supply terminal and a second current source connected to the other voltage supply terminal. A load connects the first and second currect sources. A field effect transistor has a first current handling terminal connected between the first current source and load, a second current handling terminal connected to the other voltage supply terminal, and a current control terminal connected between the load and the second current source. The second current source is of the type wherein the current thereacross is substantially independent of changes in voltage thereacross.

Abstract: The present electrical circuit is capable of coupling operation between other circuits which may have different signal levels, such as small-swing ECL-like signals and large-swing TTL-like signals.

Abstract: A semiconductor device includes as part of the integrated circuit thereof a test structure which allows testing of the semiconductor device through the device pins, to allow adjustment of various parameters of the circuit if desired for obtainment of optimum performance, and with the circuit being operable under normal conditions without degradation in relation to its optimum design situation.

Abstract: This invention discloses an oscillator circuit wholly contained in a single integrated circuit and implemented in compound semiconductor technology, wherein the oscillation frequency thereof is substantially stable over variations in supply voltage, process variations in fabrication, and temperature.

Abstract: This invention discloses an integrated circuit implemented in compound semiconductor technology including an input signal lead and an output signal lead, and buffer circuitry interconnecting those leads, the circuit being compatible with standard logic signals thereinto and therefrom.

Abstract: This invention discloses a logic circuit including first, second and third transistors with the control terminals of two of those transistors being connected to the input signal lead, with the output signal lead being connected to one of the current handling terminals of one of those transistors, and with a load device connected to the respective current handling terminals of those two transistors and one of the voltage supply terminals.

Abstract: This invention discloses a push pull logic circuit which includes a capacitor connected to the output signal lead of the circuit, and also a plurality of diodes, in parallel with the capacitor and connected to the output signal lead.

Abstract: This invention discloses a TTL compatible output buffer circuit which provides that in the state where the output signal thereof is high, no substantial current is provided inward of the buffer circuit from the output signal lead over a wide range of voltages applied to the output signal lead, including applied voltages substantially greater than that supplied by the voltage supply terminals of the circuit, with the circuit being further implemented in compound semiconductor technology.

Abstract: This invention discloses a TTL compatible input buffer which includes means for preventing appreciable current flow into the buffer circuit upon input voltage being supplied to the input signal lead which is substantially above the voltages supplied to the voltage supply terminals of the circuit.