Patents Assigned to GLO AB
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Patent number: 9893041Abstract: Backplane-side bonding structures including a common metal are formed on a backplane. Multiple source coupons are provided such that each source coupon includes a transfer substrate and an array of devices to be transferred. Each array of devices are arranged such that each array includes a unit cell structure including multiple devices of the same type and different types of bonding structures including different metals that provide different eutectic temperatures with the common metal. Different types of devices can be sequentially transferred to the backplane by sequentially applying the supply coupons and selecting devices providing progressively higher eutectic temperatures between respective bonding pads and the backplane-side bonding structures. Previously transferred devices stay on the backplane during subsequent transfer processes, enabling formation of arrays of different devices on the backplane.Type: GrantFiled: April 12, 2017Date of Patent: February 13, 2018Assignee: GLO ABInventors: Anusha Pokhriyal, Sharon N. Farrens
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Patent number: 9882086Abstract: A core-shell nanowire device includes an eave region having a structural discontinuity from the p-plane in the upper tip portion of the shell to the m-plane in the lower portion of the shell. The eave region has at least 5 atomic percent higher indium content than the p-plane and m-plane portions of the shell.Type: GrantFiled: August 7, 2015Date of Patent: January 30, 2018Assignee: GLO ABInventors: Linda Romano, Ping Wang
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Patent number: 9799796Abstract: A method for treating a LED structure with a substance, the LED structure includes an array of nanowires on a planar support. The method includes producing the substance at a source and causing it to move to the array along a line. The angle between the line followed by the substance and the plane of the support is less than 90° when measured from the center of the support. The substance is capable of rendering a portion of the nanowires nonconductive or less conductive compared to before being treated by the substance.Type: GrantFiled: October 29, 2015Date of Patent: October 24, 2017Assignee: GLO ABInventors: Scott Brad Herner, Daniel Bryce Thompson, Cynthia Lemay
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Patent number: 9761757Abstract: A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.Type: GrantFiled: March 4, 2016Date of Patent: September 12, 2017Assignee: GLO ABInventors: Linda Romano, Sungsoo Yi, Patrik Svensson, Nathan Gardner
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Patent number: 9748437Abstract: A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.Type: GrantFiled: April 16, 2015Date of Patent: August 29, 2017Assignee: GLO ABInventors: Jonas Ohlsson, Carl Patrik Theodor Svensson
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Patent number: 9741895Abstract: Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.Type: GrantFiled: May 19, 2016Date of Patent: August 22, 2017Assignee: GLO ABInventors: Daniel Bryce Thompson, Cynthia Lemay
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Patent number: 9726802Abstract: A light emitting device includes a support having an interstice and at least one LED located in the interstice and at least one of a waveguide or an optical launch having a transparent material encapsulating the at least one LED located in the interstice.Type: GrantFiled: September 22, 2014Date of Patent: August 8, 2017Assignee: GLO ABInventors: Ping Wang, Douglas Harvey, Tyler Kakuda, Ronald Kaneshiro
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Patent number: 9722135Abstract: A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.Type: GrantFiled: October 9, 2015Date of Patent: August 1, 2017Assignee: GLO ABInventors: Carl Patrik Theodor Svensson, Nathan Gardner
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Patent number: 9720163Abstract: An optical display system includes a polarizer, an integrated back light unit optically connected to a first face of the polarizer and a display comprising an array of pixels optically connected to a second face of the polarizer. The first face of the polarizer and the second face of the polarizer are not parallel and the polarizer is configured to direct light from the integrated back light unit to the display.Type: GrantFiled: December 5, 2014Date of Patent: August 1, 2017Assignee: GLO ABInventors: Ping Wang, Douglas Harvey, Tyler Kakuda, Ronald Kaneshiro
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Patent number: 9640723Abstract: Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.Type: GrantFiled: December 11, 2015Date of Patent: May 2, 2017Assignee: GLO ABInventor: Scott Brad Herner
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Patent number: 9620559Abstract: A set of light emitting devices can be formed on a substrate. A growth mask having a first aperture in a first area and a second aperture in a second area is formed on a substrate. A first nanowire and a second nanowire are formed in the first and second apertures, respectively. The first nanowire includes a first active region having a first band gap and a second active region having a second band gap. The first band gap is greater than the second band gap. The second nanowire includes an active region having the first band gap and does not include, or is adjoined to, any material having the second band gap.Type: GrantFiled: September 25, 2015Date of Patent: April 11, 2017Assignee: GLO ABInventors: Martin Schubert, Daniel Bryce Thompson, Michael Grundmann, Nathan Gardner
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Patent number: 9595649Abstract: The device according to the invention comprises a nanostructured LED with a first group of nanowires protruding from a first area of a substrate and a contacting means in a second area of the substrate. Each nanowire of the first group of nanowires comprises a p-i-n-junction and a top portion of each nanowire or at least one selection of nanowires is covered with a light reflecting contact layer. The contacting means of the second area is in electrical contact with the bottom of the nanowires, the light-reflecting contact layer being in electrical contact with the contacting means of the second area via the p-i-n-junction. Thus when a voltage is applied between the contacting means of the second area and the light-reflecting contact layer, light is generated within the nanowire. On top of the light-reflecting contact layer, a first group of contact pads for flip-chip bonding can be provided, distributed and separated to equalize the voltage across the layer to reduce the average serial resistance.Type: GrantFiled: January 30, 2014Date of Patent: March 14, 2017Assignee: GLO ABInventors: Steven Konsek, Jonas Ohlsson, Yourii Martynov, Peter Jesper Hanberg
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Patent number: 9570651Abstract: A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer.Type: GrantFiled: April 16, 2015Date of Patent: February 14, 2017Assignee: GLO ABInventors: Patrik Svensson, Linda Romano, Sungsoo Yi, Olga Kryliouk, Ying-Lan Chang
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Patent number: 9444007Abstract: Aspects of the invention provide methods and devices. In one embodiment, the invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanopyramids are grown utilizing a CVD based selective area growth technique. The nanopyramids are grown directly or as core-shell structures.Type: GrantFiled: December 2, 2014Date of Patent: September 13, 2016Assignee: GLO ABInventors: Olga Kryliouk, Nathan Gardner, Giuliano Portilho Vescovi
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Patent number: 9419185Abstract: A method of dicing semiconductor devices from a substrate includes forming a Bragg reflector over a bottom side of the substrate, where the bottom side is opposite of a top side, generating a pattern of defects in the substrate with a laser beam from the bottom side of the substrate, and applying pressure to the substrate to dice the substrate along the pattern of defects. The Bragg reflector includes a first layer of dielectric material having a first index of refraction and a second dielectric material having a second index of refraction different from the first index of refraction.Type: GrantFiled: January 26, 2015Date of Patent: August 16, 2016Assignee: GLO ABInventor: Scott Brad Herner
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Patent number: 9419183Abstract: An opto-electric structure includes a plurality of nano elements arranged side by side on a support layer, where each nano element includes at least a first conductivity type semiconductor nano sized core, and where the core and a second conductivity type semiconductor form a pn or pin junction. A first electrode layer that extends over the plurality of nano elements and is in electrical contact with at least a portion of the second conductivity type semiconductor, and a mirror provided on a second conductivity type semiconductor side of the structure.Type: GrantFiled: December 16, 2014Date of Patent: August 16, 2016Assignee: GLO ABInventors: Truls Lowgren, Ghulam Hasnain
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Patent number: 9412899Abstract: A method of dicing semiconductor devices includes depositing a continuous first layer over the substrate, such that the first layer imparts a compressive stress to the substrate, and etching grooves in the first layer to increase local stress at the grooves compared to stress at the remainder of the first layer located over the substrate. The method also includes generating a pattern of defects in the substrate with a laser beam, such that a location of the defects in the pattern of defects substantially corresponds to a location of at least some of the grooves in the in the first layer, and applying pressure to the substrate to dice the substrate along the grooves.Type: GrantFiled: November 21, 2014Date of Patent: August 9, 2016Assignee: GLO ABInventors: Scott Brad Herner, Linda Romano, Daniel Bryce Thompson, Martin Schubert
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Patent number: 9368672Abstract: Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.Type: GrantFiled: June 17, 2014Date of Patent: June 14, 2016Assignee: GLO ABInventors: Daniel Bryce Thompson, Cynthia Lemay
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Patent number: 9312442Abstract: A light emitting diode (LED) structure includes a plurality of devices arranged side by side on a support layer. Each device includes a first conductivity type semiconductor nanowire core and an enclosing second conductivity type semiconductor shell for forming a pn or pin junction that in operation provides an active region for light generation. A first electrode layer extends over the plurality of devices and is in electrical contact with at least a top portion of the devices to connect to the shell. The first electrode layer is at least partly air-bridged between the devices.Type: GrantFiled: August 18, 2015Date of Patent: April 12, 2016Assignee: GLO ABInventor: Truls Lowgren
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Patent number: 9287468Abstract: A submount for light emitting diode (LED) die includes a substrate containing a plurality of tubs configured to receive an LED die, and a plurality of integrated interconnects integrated into the substrate. At least a portion of the interconnects for each tub have an exposed portion on a side of the submount and at least some of the plurality of the interconnects are not connected to other interconnects in the submount.Type: GrantFiled: November 21, 2014Date of Patent: March 15, 2016Assignee: GLO ABInventors: Scott Brad Herner, Linda Romano, Daniel Bryce Thompson, Martin Schubert