Abstract: A method for growing a single crystal silicon ingot by the Czochralski method having reduced deviation in diameter is disclosed.

Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

Abstract: A semiconductor substrate includes a high-resistivity silicon carbide layer and a gallium nitride epitaxial layer. The gallium nitride epitaxial layer is formed on a surface, a thickness of the gallium nitride epitaxial layer is less than 2 ?m, and a full width at half maximum (FWHM) of an X-ray diffraction analysis (002) plane is less than 100 arcsec. The thickness of the high-resistivity silicon carbide layer ranges from 20 ?m to 50 ?m. The surface of the high-resistivity silicon carbide layer has an angle ranging from 0° to +/?8° with respect to a (0001) plane. The micropipe density (MPD) of the high-resistivity silicon carbide layer is less than 0.5 ea/cm2, the basal plane dislocation (BPD) of the high-resistivity silicon carbide layer is less than 10 ea/cm2, and the threading screw dislocation (TSD) of the high-resistivity silicon carbide layer is less than 500 ea/cm2.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A method for producing a silicon ingot by the horizontal magnetic field Czochralski method includes rotating a crucible containing a silicon melt, applying a horizontal magnetic field to the crucible, contacting the silicon melt with a seed crystal, and withdrawing the seed crystal from the silicon melt while rotating the crucible to form a silicon ingot. The crucible has a wettable surface with a cristobalite layer formed thereon.

Abstract: Methods for etching a semiconductor structure and for conditioning a processing reactor in which a single semiconductor structure is treated are disclosed. An engineered polycrystalline silicon surface layer is deposited on a susceptor which supports the semiconductor structure. The polycrystalline silicon surface layer may be engineered by controlling the temperature at which the layer is deposited, by grooving the polycrystalline silicon surface layer or by controlling the thickness of the polycrystalline silicon surface layer.

Abstract: A processing method of a single crystal material includes the following steps. A single crystal material is provided as an object to be modified. The amorphous phase modification apparatus is used for emitting a femtosecond laser beam to process an internal portion of the object to be modified. The processing includes using a femtosecond laser beam to form a plurality of processing lines in the internal portion of the object to be modified, wherein each of the processing lines include a zigzag pattern processing, and a processing line spacing between the plurality of processing lines is in a range of 200 ?m to 600 ?m, wherein after the object to be modified is processed, a modified layer is formed in the object to be modified. Slicing or separating out a portion in the object to be modified that includes the modified layer.

Abstract: A semiconductor device includes a substrate, an initial layer, and a superlattice stack. The initial layer is located on the substrate and includes aluminum nitride (AlN). The superlattice stack is located on the initial layer and includes a plurality of first films, a plurality of second films and at least one doped layer, and the first films and the second films are alternately stacked on the initial layer, wherein the at least one doped layer is arranged in one of the first films and the second films, and dopants of the at least one doped layer are selected from a group consisting of carbon, iron, and the combination thereof.

Abstract: An epitaxial structure includes a substrate, a lower super-lattice laminate, a middle super-lattice laminate, an upper super-lattice laminate and a channel layer. The lower super-lattice laminate includes a plurality of first lower film layers and a plurality of second lower film layers stacked alternately. The first lower film layer includes aluminum nitride. The second lower film layer includes aluminum gallium nitride. The middle super-lattice laminate includes a plurality of first middle film layers and a plurality of second middle film layers stacked alternately. The first middle film layer includes aluminum nitride. The second middle film layer includes gallium nitride doped with a doping material. The upper super-lattice laminate includes a plurality of first upper film layers and a plurality of second upper film layers stacked alternately. The first upper film layer includes gallium nitride doped with the doping material. The second upper film layer includes gallium nitride.

Abstract: A semiconductor wafer imaging system for imaging a semiconductor wafer includes shroud panels defining a black box, a camera positioned in the black box for imaging the semiconductor wafer, and an illumination panel for directing diffuse light to the semiconductor wafer. A portion of the diffuse light is reflected off the semiconductor wafer and the camera images the semiconductor wafer by detecting the reflected diffuse light.

Abstract: A high electron mobility transistor epitaxial structure includes a substrate, a nucleation layer, a buffer layer, a first nitride layer, a second nitride layer, a channel layer, and a barrier layer. The nucleation layer is located above the substrate. The buffer layer is located above the nucleation layer. The first nitride layer is located above the buffer layer and is in contact with the buffer layer. The second nitride layer is located above the first nitride layer and is in contact with the first nitride layer. A film thickness of the first nitride layer is less than a film thickness of the second nitride layer. The second nitride layer is carbon doped. A carbon concentration of the first nitride layer is less than a carbon concentration of the second nitride layer. The channel layer is located above the second nitride layer.

Abstract: A method for epitaxy of a high electron mobility transistor includes: provide a substrate; form a nucleation layer on the substrate; form a buffer layer on the nucleation layer; form a first nitride layer being in contact with the buffer layer on the buffer layer; form a second nitride layer being in contact with the first nitride layer on the first nitride layer, and perform carbon doping on the second nitride layer; form a channel layer on the second nitride layer; and form a barrier layer on the channel layer; a two-dimensional electron gas is formed in the channel layer along an interface between the channel layer and the barrier layer; a growth temperature of the second nitride layer is less than a growth temperature of the first nitride layer; a film thickness of the first nitride layer is less than a film thickness of the second nitride layer.

Abstract: A light-emitting element structure includes a substrate, a nucleation layer located above the substrate, a buffer layer located above the nucleation layer, a first nitride layer located above the buffer layer and being in contact with the buffer layer, a second nitride layer located above the first nitride layer and being in contact with the first nitride layer, a first semiconductor layer located above the second nitride layer, a light-emitting layer, and a second semiconductor layer located above the light-emitting layer. A film thickness of the first nitride layer is smaller than a film thickness of the second nitride layer. A dislocation defect density of the second nitride layer is smaller than or equal to 3×109 cm?2. The light-emitting layer is located above the first semiconductor layer and is adapted to emit light when electrons and holes recombine.

Abstract: A method of manufacturing a light-emitting element, including: provide a substrate; form a nucleation layer above the substrate; form a buffer layer above the nucleation layer; form a first nitride layer being in contact with the buffer layer above the buffer layer; form a second nitride layer being in contact with the first nitride layer above the first nitride layer; form a first semiconductor layer above the second nitride layer; form a light-emitting layer above the first semiconductor layer; form a second semiconductor layer above the light-emitting layer. The light-emitting layer is adapted to emit light when electrons and holes recombine. A film thickness of the first nitride layer is smaller than a film thickness of the second nitride layer, and a growth pressure of the first nitride layer is smaller than a growth pressure of the second nitride layer.

Abstract: A semiconductor-on-insulator (e.g., silicon-on-insulator) structure having superior radio frequency device performance, and a method of preparing such a structure, is provided by utilizing a single crystal silicon handle wafer sliced from a float zone grown single crystal silicon ingot.

Abstract: A semiconductor substrate and a method of manufacturing the same are provided. The method includes epitaxially growing a buffer layer and a silicon carbide layer on a silicon surface of an N-type silicon carbide substrate, and the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide (N—SiC). Next, a gallium nitride epitaxial layer is epitaxially grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer, and the gallium nitride epitaxial layer. After the epitaxial growth of the gallium nitride epitaxial layer, a laser is used to form a damaged layer in the semiconductor structure, and a chip carrier is bonded to the surface of the gallium nitride epitaxial layer, and then the N-type silicon carbide and the semiconductor structure are separated at the location of the damaged layer.

Abstract: Ingot puller apparatus for preparing a single crystal silicon ingot by the Czochralski method are disclosed. The ingot puller apparatus includes a heat shield. The heat shield has a leg segment that includes a void (i.e., an open space without insulation) disposed in the leg segment. The heat shield may also include insulation partially within the heat shield.

Abstract: A method for producing a silicon ingot by the horizontal magnetic field Czochralski method includes rotating a crucible containing a silicon melt, applying a horizontal magnetic field to the crucible, contacting the silicon melt with a seed crystal, and withdrawing the seed crystal from the silicon melt while rotating the crucible to form a silicon ingot. The crucible has a wettable surface with a cristobalite layer formed thereon.

Abstract: A crystal growing method for crystals include the following steps. A first crystal seed is provided, the first crystal seed has a first monocrystalline proportion and a first size. N times of crystal growth processes are performed on the first crystal seed, wherein each of the crystal growth process will increase the monocrystalline proportion, and the N times of crystal growth processes are performed until a second crystal having a monocrystalline proportion of 100% is reached, and wherein the N times includes more than 3 times of crystal growth processes. Each crystal growth process includes adjusting a ratio difference (?Tz/?Tx) between an axial temperature gradient (?Tz) and a radial temperature gradient (?Tx) of the crystal, so as to control the ratio difference within a range of 0.5 to 3 for forming the second crystal.

Abstract: A silicon carbide crystal and a silicon carbide wafer, wherein a monocrystalline proportion of the silicon carbide crystal and the silicon carbide wafer is 100%, the resistivity thereof is in a range of 15 m?·cm to 20 m?·cm, and a deviation of an uniformity of the resistivity thereof is less than 0.4%.